CN113990242A - Display device and control method thereof - Google Patents
Display device and control method thereof Download PDFInfo
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- CN113990242A CN113990242A CN202111298015.7A CN202111298015A CN113990242A CN 113990242 A CN113990242 A CN 113990242A CN 202111298015 A CN202111298015 A CN 202111298015A CN 113990242 A CN113990242 A CN 113990242A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
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Abstract
The embodiment of the invention discloses a display device and a control method thereof, wherein the display device of one embodiment comprises a display panel and a driving chip for driving the display panel, wherein: the driving chip comprises a frequency detection unit, a frequency control unit and a control unit, wherein the frequency detection unit is used for generating a frequency control signal according to the display frequency of an input display signal; the display panel comprises a plurality of sub-pixels arranged in an array, each sub-pixel comprises a light emitting device and a pixel driving circuit for driving the light emitting device, and the pixel driving circuit forms different storage capacitors according to the frequency control signal so as to store input data signals. According to the invention, the pixel driving circuit forms different storage capacitors under different display frequencies through the frequency control signal generated by the frequency detection unit, so that the corresponding storage capacitors are matched according to the different display frequencies, the pixel driving circuit can give consideration to the different display frequencies, the display effect of the display panel under the different refreshing display frequencies is effectively improved, and the user experience is improved.
Description
Technical Field
The present invention relates to the field of display technologies, and in particular, to a display device and a control method thereof.
Background
Along with the diversification of product application, people are to the continuous improvement of display effect requirement, and display device more and more needs work under the great different frequency of brushing the screen of span. For example, when a user watches a video or plays a game, the refresh frequency of the display device may be set higher, such as 120Hz, in order to ensure that the dynamic pictures displayed by the display device are smoother. In order to reduce power consumption of the display device when the user is looking at a still picture or is not using the display device, the refresh frequency of the display device may be set low, for example, 1 Hz.
Disclosure of Invention
In order to solve at least one of the above problems, a first embodiment of the present invention provides a display device including: display panel and drive the driver chip of display panel, wherein:
the driving chip comprises a frequency detection unit, a frequency control unit and a control unit, wherein the frequency detection unit is used for generating a frequency control signal according to the display frequency of an input display signal;
the display panel comprises a plurality of sub-pixels arranged in an array, each sub-pixel comprises a light emitting device and a pixel driving circuit for driving the light emitting device, and the pixel driving circuit forms different storage capacitors according to the frequency control signal so as to store input data signals.
In a specific embodiment, the frequency detection unit comprises a frequency detection chip and a decoding unit, wherein
The frequency detection chip is used for generating a frequency gear signal according to the display frequency of the input display signal;
and the decoding unit is used for generating a frequency control signal according to the frequency gear signal.
In a specific embodiment, the decoding unit is electrically connected with at least one frequency control signal line to transmit the frequency control signal;
the pixel driving circuit comprises a driving unit, a data writing unit, a compensation unit and a capacitance variable unit
The capacitance variable unit is used for responding to the frequency control signal transmitted by the frequency control signal line to form different storage capacitances;
the data writing unit is used for responding to an input scanning signal, accessing the data signal and storing the data signal in the storage capacitor through the driving unit and the compensation unit;
the driving unit drives the light emitting device to emit light in response to the input first power signal and the data signal stored in the storage capacitor.
In a specific embodiment, the frequency control signal line comprises a first frequency control signal line, and the capacitance variable unit comprises a first capacitance component and a second capacitance connected in series, wherein
The first capacitive assembly includes: the circuit comprises a first capacitor and a first control switch connected in parallel at two ends of the first capacitor, wherein the first control switch
Opens in response to a frequency control signal transmitted by the first frequency control signal line to access the first capacitor and form a storage capacitor comprising a first capacitor and a second capacitor connected in series, or
The frequency control signal transmitted in response to the first frequency control signal line is closed to form a storage capacitor including a second capacitor.
In a specific embodiment, the frequency control signal line comprises a second frequency control signal line, and the capacitance variable unit comprises a third capacitance component and a fourth capacitance connected in parallel, wherein
The third capacitive component includes: a third capacitor and a second control switch connected in series with the third capacitor, the second control switch
Open in response to the frequency control signal transmitted from the second frequency control signal line to form a storage capacitor including the fourth capacitor, or
The frequency control signal transmitted in response to the second frequency control signal line is closed to form a storage capacitor comprising a third capacitor and a fourth capacitor connected in parallel.
In one embodiment, the frequency control signal lines include a third frequency control signal line and a fourth frequency control signal line,
the capacitance variable unit comprises a fifth capacitance component and a sixth capacitance component which are connected in series, wherein
The fifth capacitive component includes: a fifth capacitor and a third control switch connected in parallel across the fifth capacitor, the third control switch being opened or closed in response to the third frequency control signal line,
the sixth capacitive assembly includes: a sixth capacitor and a fourth control switch connected in parallel across the sixth capacitor, the fourth control switch being opened or closed in response to the fourth frequency control signal line,
the capacitance variable unit responds to the frequency control signals transmitted by the third frequency control signal line and the fourth frequency control signal line to control the third control switch and the fourth control switch to form different storage capacitors;
or
The capacitance variable unit comprises a seventh capacitance component and an eighth capacitance component which are connected in parallel, wherein
The seventh capacitive assembly includes: a seventh capacitor and a fifth control switch in series with the seventh capacitor, the fifth control switch being opened or closed in response to the third frequency control signal line,
the eighth capacitive assembly comprises: an eighth capacitor and a sixth control switch in series with the eighth capacitor, the sixth control switch being opened or closed in response to the fourth frequency control signal line,
the capacitance variable unit responds to the frequency control signals transmitted by the third frequency control signal line and the fourth frequency control signal line to control the fifth control switch and the sixth control switch to form different storage capacitors.
In one embodiment, the frequency control signal lines include a fifth frequency control signal line, a sixth frequency control signal line, and a seventh frequency control signal line,
the capacitance variable unit comprises a ninth capacitance component, a tenth capacitance component and an eleventh capacitance component which are connected in series, wherein
The ninth capacitive assembly includes: a ninth capacitor and a seventh control switch connected in parallel across the ninth capacitor, the seventh control switch being opened or closed in response to the fifth frequency control signal line,
the tenth capacitive assembly comprises: a tenth capacitor and an eighth control switch connected in parallel across the tenth capacitor, the eighth control switch being opened or closed in response to the sixth frequency control signal line,
the eleventh capacitive assembly includes: an eleventh capacitor and a ninth control switch connected in parallel across the eleventh capacitor, the ninth control switch being opened or closed in response to the seventh frequency control signal line,
the capacitance variable unit responds to frequency control signals transmitted by the fifth frequency control signal line, the sixth frequency control signal line and the seventh frequency control signal line to control the seventh control switch, the eighth control switch and the ninth control switch to form different storage capacitors;
or
The capacitance variable unit comprises a twelfth capacitance component, a thirteenth capacitance component and a fourteenth capacitance component which are connected in parallel, wherein
The twelfth capacitive component comprises: a twelfth capacitor and a tenth control switch in series with the twelfth capacitor, the tenth control switch being opened or closed in response to the fifth frequency control signal line,
the thirteenth capacitive component includes: a thirteenth capacitor and an eleventh control switch in series with the thirteenth capacitor, the eleventh control switch being opened or closed in response to the sixth frequency control signal line,
the fourteenth capacitive component includes: a fourteenth capacitor and a twelfth control switch in series with the fourteenth capacitor, the twelfth control switch being opened or closed in response to the seventh frequency control signal line,
the capacitance variable unit controls the tenth control switch, the eleventh control switch and the twelfth control switch to form different storage capacitances in response to frequency control signals transmitted by the fifth frequency control signal line, the sixth frequency control signal line and the seventh frequency control signal line.
In a specific embodiment, the driving unit includes a first transistor, a gate of the first transistor is electrically connected to a first node, a first pole of the first transistor is connected to a first power signal, and a second pole of the first transistor is electrically connected to a second node;
the data writing unit comprises a second transistor, a grid electrode of the second transistor is connected with the scanning signal, a first stage of the second transistor is connected with the data signal, and a second stage of the second transistor is electrically connected with a first pole of the first transistor;
the compensation unit comprises a third transistor, the grid electrode of the third transistor is connected with the scanning signal, the first stage of the third transistor is electrically connected with the second pole of the first transistor, and the second stage of the third transistor is electrically connected with the first node;
the variable capacitance unit comprises a first end and a second end, the first end of the variable capacitance unit is connected to the first power supply signal, and the second end of the variable capacitance unit is electrically connected with the first node;
the light emitting device comprises a first end and a second end, the first end of the light emitting device is electrically connected with the second node, and the second end of the light emitting device is connected to a second power supply signal.
In a specific embodiment, the pixel driving circuit further comprises at least one of a first reset circuit, a second reset circuit and a first light emission control circuit, wherein
The first reset circuit comprises a fourth transistor, wherein a grid electrode of the fourth transistor is connected with a first reset signal, a first stage of the fourth transistor is electrically connected with the first node, and a second pole of the fourth transistor is connected with a third power supply signal;
the second reset circuit comprises a fifth transistor, a grid electrode of the fifth transistor is connected with a second reset signal, a first stage of the fifth transistor is electrically connected with the second node, and a second pole of the fifth transistor is connected with the third power supply signal;
the first light emitting control circuit comprises a sixth transistor, a grid electrode of the sixth transistor is connected with a light emitting signal, a first stage of the sixth transistor is electrically connected with a first pole of the first transistor, and a second pole of the sixth transistor is connected with the first power supply signal.
A second embodiment of the present application provides a method for controlling a display device according to the foregoing embodiments, including:
the frequency detection unit of the driving chip generates a frequency control signal according to the display frequency of the input display signal;
and the pixel driving circuit of each sub-pixel of the display panel forms different storage capacitors according to the frequency control signal so as to store the input data signal.
The invention has the following beneficial effects:
aiming at the existing problems, the invention sets a display device and a control method thereof, and the frequency control signal generated by a frequency detection unit enables a pixel drive circuit to form different storage capacitors under different display frequencies so as to meet the requirements of the different display frequencies on the charging rate and the grid voltage change rate of a first transistor, thereby reducing the storage capacitors during high-frequency display, improving the charging rate during data writing, improving the storage capacitors during low-frequency display, reducing the grid voltage change rate of the first transistor, enabling the pixel drive circuit to take high-frequency display and low-frequency display into account, making up the problems in the prior art, greatly improving the display effect of a display panel under different refreshing display frequencies, and having practical application value.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a block diagram illustrating a structure of a display device according to an embodiment of the present invention;
FIG. 2 shows a schematic diagram of a pixel driving circuit according to an embodiment of the invention;
3a-3b illustrate timing diagrams of a pixel driving circuit according to one embodiment of the invention;
FIG. 4 shows a schematic diagram of a pixel driving circuit according to yet another embodiment of the invention;
FIG. 5 shows a schematic diagram of a pixel driving circuit according to yet another embodiment of the invention;
FIG. 6 shows a schematic diagram of a pixel driving circuit according to yet another embodiment of the invention;
fig. 7 illustrates a flowchart of a control method of a display apparatus according to an embodiment of the present invention.
Detailed Description
In order to more clearly illustrate the invention, the invention is further described below with reference to preferred embodiments and the accompanying drawings. Similar parts in the figures are denoted by the same reference numerals. It is to be understood by persons skilled in the art that the following detailed description is illustrative and not restrictive, and is not to be taken as limiting the scope of the invention.
Unless otherwise defined, technical or scientific terms used in the embodiments of the present invention should have the ordinary meaning as understood by those having ordinary skill in the art to which the present invention belongs. The use of "first," "second," and similar language in the embodiments of the present invention does not denote any order, quantity, or importance, but rather the terms "first," "second," and similar language are used to distinguish one element from another. In the description of the embodiments of the present disclosure, "a plurality" means two or more unless otherwise specified. The word "comprising" or "comprises", and the like, means that the element or item listed before the word covers the element or item listed after the word and its equivalents, but does not exclude other elements or items. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect.
With the diversification of product application, the requirement of high-low frequency switching display is gradually improved, the existing display product adopts a smaller storage capacitor to meet the requirement of a driving circuit on the charging rate during high-frequency display, and the phenomenon that the storage capacitor leaks electricity to a transistor during low-frequency display exists, so that the display effect is influenced; however, when a large storage capacitor is used, the requirement of the driving circuit for the charging rate cannot be met, and the display effect is further affected.
To this end, an embodiment of the present application proposes a display device, as shown in fig. 1, including: a display panel 10 and a driving chip 20 driving the display panel 10, wherein:
the driving chip 20 includes a frequency detecting unit for generating a frequency control signal according to a display frequency of an input display signal;
the display panel 10 includes a plurality of sub-pixels arranged in an array, each of which includes a light emitting device and a pixel driving circuit that drives the light emitting device, and the pixel driving circuit forms different storage capacitors according to the frequency control signal to store an input data signal.
The embodiment enables the pixel driving circuit to form different storage capacitors under different display frequencies through the frequency control signal generated by the frequency detection unit, so as to meet the requirements of different display frequencies on the charging rate and the grid voltage change rate of the first transistor, thereby reducing the storage capacitors during high-frequency display, improving the charging rate during data writing, improving the storage capacitors during low-frequency display, reducing the grid voltage change rate of the first transistor, and being capable of enabling the pixel driving circuit to give consideration to high-frequency display and low-frequency display, thereby overcoming the problems in the prior art, greatly improving the display effect of the display panel under different refreshing display frequencies, and having wide application prospects.
In the present application, the specific form of the display device is not particularly limited, and may be a mobile phone, a tablet computer, a Personal Digital Assistant (PDA), a vehicle-mounted computer, or the like. In addition, the display panel 10 may be a self-Light Emitting display panel such as an Organic Light Emitting Diode (OLED) display panel, a Quantum Dot Light Emitting Diode (QLED) display panel, a Micro Light Emitting Diode (Micro LED) display panel, and a Mini Light Emitting Diode (Mini LED) display panel, which is not limited in this application.
In this embodiment, the frequency detection unit includes a frequency detection chip and a decoding unit, and the frequency detection chip is configured to generate a frequency step signal according to a display frequency of an input display signal; the decoding unit is used for generating a frequency control signal according to the frequency gear signal.
In a specific example, the frequency detection chip detects an input display signal and generates a frequency step signal according to the detected display frequency, the decoding unit further generates a frequency control signal according to the frequency step signal, and the frequency control signal is transmitted to the pixel driving circuit in the display panel through a frequency control signal line, so that the pixel driving circuit can form different storage capacitance values at different display frequencies, high-frequency display and low-frequency display are both considered, and the display effect of the display panel at different refresh display frequencies is improved.
The pixel driving circuit is implemented using at least one frequency control signal line in this example to form a plurality of different storage capacitance values, for example, when one frequency control signal line is used, the display device has two frequency steps, and when two frequency control signal lines are used, the display device has four frequency steps; when three frequency control signal lines are adopted, the display device has eight frequency gears. The decoding unit generates corresponding frequency control signals according to the input frequency step signals and the set frequency control signal lines, so that the pixel driving circuit forms different storage capacitors under different display frequencies.
It should be noted that, the number of the frequency control signal lines is not limited in the present application, and a person skilled in the art can set corresponding frequency control signal lines according to actual requirements to transmit the frequency control signals, so as to form different storage capacitance values.
In this embodiment, the pixel driving circuit includes a driving unit, a data writing unit, a compensation unit, and a capacitance variable unit, wherein the capacitance variable unit forms different storage capacitances in response to the frequency control signal transmitted by the frequency control signal line; the data writing unit is used for responding to an input scanning signal, accessing the data signal and storing the data signal in the storage capacitor through the driving unit and the compensation unit; the driving unit drives the light emitting device to emit light in response to the input first power signal and the data signal stored in the storage capacitor, specifically, referring to fig. 2:
the driving unit comprises a first transistor T3, a gate of the first transistor T3 is electrically connected with a first node N1, a first pole of the first transistor T3 is connected to a first power signal VDD, and a second pole of the first transistor T3 is electrically connected with a second node;
the DATA writing unit includes a second transistor T4, a gate of the second transistor T4 is connected to the scan signal, a first stage of the second transistor T4 is connected to the DATA signal DATA, and a second stage of the second transistor T4 is electrically connected to a first pole of the first transistor T3;
the compensation unit includes a third transistor T2, a Gate of the third transistor T2 is connected to the scan signal Gate, a first stage of the third transistor T2 is electrically connected to a second pole of the first transistor T3, and a second stage of the third transistor T2 is electrically connected to the first node N1;
the capacitance variable unit comprises a first end and a second end, the first end of the capacitance variable unit is connected to the first power supply signal VDD, and the second end of the capacitance variable unit is electrically connected with the first node N1; the light emitting device OLED includes a first terminal and a second terminal, the first terminal of the light emitting device OLED is electrically connected to the second node N2, and the second terminal of the light emitting device OLED is connected to a second power signal VEE.
In an alternative example, as shown in fig. 2, to enhance the Reset capability of the first node N1, the pixel driving circuit further includes a first Reset circuit, wherein the first Reset circuit includes a fourth transistor T1, a gate of the fourth transistor T1 is connected to a first Reset signal Reset, a first stage of the fourth transistor T1 is electrically connected to the first node N1, and a second pole of the fourth transistor T1 is connected to a third power signal Vinit.
In yet another alternative example, as shown in fig. 2, to realize the initialization of the light emitting device potential, the pixel driving circuit further includes a second Reset circuit, wherein the second Reset circuit includes a fifth transistor T7, and a gate of the fifth transistor T7 is connected to a second Reset signal Resetn+1The first stage of the fifth transistor T7 is electrically connected to the second node N2, and the second pole of the fifth transistor T7 is connected to the third power signal Vinit. It should be noted that the second Reset signal Reset of the present embodimentn+1Is the scanning signal Gate.
In yet another alternative example, as shown in fig. 2, to enhance the light emission control of the light emitting device OLED, the pixel driving circuit further includes a first light emission control circuit, wherein the first light emission control circuit includes a sixth transistor T5, a gate of the sixth transistor T5 is connected to the light emission signal EM, a first stage of the sixth transistor T5 is electrically connected to a first pole of the first transistor T3, and a second pole of the sixth transistor T5 is connected to the first power signal.
It can be understood that, in the Data writing phase, the Data signal Data provided by the Data signal access terminal is stored in the capacitance variable unit through the driving unit and the compensation unit. In the light emitting stage, the driving unit may be controlled using the data signal stored in the capacitance varying unit.
It should be noted that, the larger the capacitance value of the capacitance variable unit is, the lower the charging rate of the capacitance variable unit is in the Data writing stage under the condition that the Data signal Data provided by the Data signal access terminal is constant; the smaller the capacitance of the variable capacitance unit is, the less the amount of power stored, the more the TFT leakage exists in the driving circuit, and thus the voltage change rate of the variable capacitance unit in the voltage holding stage increases.
In this embodiment, the variable capacitance unit forms different storage capacitors in response to the frequency control signal transmitted by the frequency control signal line, so as to solve the problem that charging rate and voltage holding ratio cannot be considered simultaneously in high-frequency and low-frequency display in the prior art.
In an alternative example, when one frequency control signal line is used, the display device has two frequency steps, as shown in fig. 2, the capacitance varying unit includes a first capacitance component and a second capacitance C2 connected in series, wherein the first capacitance component includes: a first capacitor Cst1 and a first control switch T8 connected in parallel across the first capacitor Cst1, wherein:
the first control switch T8 is opened in response to a frequency control signal change transmitted from the first frequency control signal line to switch in the first capacitor Cst1 and form a storage capacitor including the first capacitor Cst1 and the second capacitor Cst2 connected in series, or is closed in response to a frequency control signal transmitted from the first frequency control signal line to form a storage capacitor including the second capacitor Cst 2.
For example, when the display frequency is 120Hz, the frequency detection chip generates a frequency shift signal corresponding to 120Hz, i.e. a high-frequency shift signal in this example, the decoding unit further generates a frequency control signal according to the high-frequency shift signal to control the first control switch T8 to be turned on, so as to switch in the first capacitor Cst1, at this time, the capacitance value of the variable capacitor unit is equal to the series capacitance value of the first capacitor Cst1 and the second capacitor Cst2, and if the capacitance value of the first capacitor C1 is C1 and the capacitance value of the second capacitor C2 is C2, the capacitance value of the variable capacitor unit is C ═ 1/(1/C1+ 1/C2).
Specifically, at high frequency, as shown in fig. 3a, the frequency control signal change is always high, i.e. T8 is turned on, the storage capacitor formed by the variable capacitance unit is the first capacitor Cst1 and the second capacitor Cst2 connected in series, and the capacitance value is smaller than c1 and smaller than c 2.
Similarly, when the display frequency is 10Hz, the frequency detection chip generates a frequency shift signal corresponding to 10Hz, i.e. a low-frequency shift signal in this example, and the decoding unit further generates a frequency control signal according to the low-frequency shift signal to control the first control switch T8 to be closed, where the capacitance value of the capacitance variable unit is equal to the capacitance value C2 of the second capacitor C2.
Specifically, at low frequency, as shown in fig. 3b, the frequency control signal change is always at low level, i.e. T8 is closed, and the storage capacitor formed by the variable capacitance unit is the second capacitor Cst 2.
In the embodiment, when the display frequency is 120Hz, namely, when the display is performed at high frequency, a lower storage capacitor is used, and the charging rate of the data writing process is improved; when the display frequency is 10Hz, namely, a higher storage capacitor is used in low-frequency display, the change rate of the grid voltage of the first transistor is reduced, and the purpose of reducing the electric leakage of the storage capacitor is achieved.
The control element T8 may be a Thin Film Transistor (TFT) or a MOS transistor. For convenience of explanation, the control element is a thin film transistor. On this basis, in the case that the control element is a Thin Film Transistor, the control element includes, but is not limited to, an Oxide Thin Film Transistor (Oxide TFT), an amorphous silicon Thin Film Transistor (a-silicon TFT), and a low temperature polysilicon Thin Film Transistor (LTPSTFT). Since the leakage currents of the oxide thin film transistor and the amorphous silicon thin film transistor are small, in order to avoid the voltage holding ratio of the capacitance variable unit from being reduced due to the leakage current, in some embodiments of the present invention, the control element is an oxide thin film transistor or an amorphous silicon thin film transistor.
In yet another alternative example, also when one frequency control signal line is used, the display device has two frequency steps, as shown in fig. 4, the capacitance varying unit includes a third capacitance component and a fourth capacitance Cst4 connected in parallel, wherein the third capacitance component includes: a third capacitor Cst3 and a second control switch T8 in series with the third capacitor Cst3, wherein:
the second control switch T8 is opened in response to the frequency control signal transmitted from the second frequency control signal line to form a storage capacitor including the fourth capacitor Cst4, or is closed in response to the frequency control signal transmitted from the second frequency control signal line to form a storage capacitor including the third capacitor Cst3 and the fourth capacitor Cst4 connected in parallel.
For example, when the display frequency is 120Hz, the frequency detection chip generates a frequency shift signal corresponding to 120Hz, i.e. a high-frequency shift signal in this example, and the decoding unit further generates a frequency control signal according to the high-frequency shift signal to control the second control switch T8 to close, so that the third capacitor C3 is short-circuited, and the capacitance value of the variable capacitor unit is equal to the capacitance value C4 of the fourth capacitor Cst 4.
Specifically, at high frequency, as shown in fig. 3a, the frequency control signal change is always high, i.e., T8 is turned on, and the storage capacitor formed by the variable capacitor unit is the fourth capacitor Cst 4.
Similarly, when the display frequency is 10Hz, the frequency detection chip generates a frequency shift signal corresponding to 10Hz, which is a low-frequency shift signal in this example, the decoding unit further generates a frequency control signal according to the low-frequency shift signal to control the second control switch T8 to open, so as to access the third capacitor Cst3, at this time, the capacitance value of the variable capacitor unit is equal to the parallel capacitance value of the third capacitor Cst3 and the fourth capacitor Cst4, the capacitance value of the third capacitor Cst3 is assumed to be c3, and the capacitance value of the fourth capacitor Cst4 is assumed to be c4, and then the capacitance value of the variable capacitor unit is c3+ c 4.
Specifically, at low frequency, as shown in fig. 3b, the frequency control signal change is always at low level, i.e. T8 is closed, the storage capacitor formed by the variable capacitance unit is the third capacitor Cst3 and the fourth capacitor Cst4 connected in parallel, and the capacitance value is larger than c3 and larger than c 4.
In the embodiment, when the display frequency is 120Hz, namely, when the display is performed at high frequency, a lower storage capacitor is used, and the charging rate of the data writing process is improved; when the display frequency is 10Hz, namely, a higher storage capacitor is used in low-frequency display, the change rate of the grid voltage of the first transistor is reduced, and the purpose of reducing the electric leakage of the storage capacitor is achieved.
In order to further achieve a more precise correspondence between display frequency and frequency steps to improve the display effect, in an alternative example, two frequency control signal lines are used, the display device has four steps, as shown in fig. 5, and the capacitance variable unit includes a fifth capacitance component and a sixth capacitance component connected in series, wherein:
the fifth capacitive component includes: a fifth capacitor Cst1 and a third control switch T8 connected in parallel across the fifth capacitor Cst1, the third control switch T8 being responsive to the third frequency control signal line change1 to open or close; the sixth capacitive assembly includes: a sixth capacitor Cst2 and a fourth control switch T9 connected in parallel across the sixth capacitor Cst2, the fourth control switch T9 being opened or closed in response to the fourth frequency control signal line change 2.
As can be understood by those skilled in the art, when the third control switch T8 is opened, the fifth capacitor Cst1 is connected to the circuit, and when the third control switch T8 is closed, the fifth capacitor Cst1 is short-circuited; when the fourth control switch T9 is turned on, the sixth capacitor Cst2 is connected to the circuit, and when the third control switch T9 is turned off, the sixth capacitor Cst2 is short-circuited.
The capacitance variable unit controls the third and fourth control switches T8 and T9 to form different storage capacitances in response to the frequency control signals transmitted by the third and fourth frequency control signal lines.
The capacitance variable cell described in this example is capable of forming four different storage capacitance values, specifically the following four cases:
case (1): when the third control switch K3 is turned on and the fourth control switch K4 is turned on, the fifth capacitor C5 and the sixth capacitor C6 are both connected to the circuit, and at this time, the capacitance value of the variable capacitance unit is the series capacitance value of the fifth capacitor C5 and the sixth capacitor C6, the capacitance value of the fifth capacitor C5 is C5, and the capacitance value of the sixth capacitor C6 is C6, and the storage capacitance value of the variable capacitance unit is C1/(1/C5 + 1/C6).
Case (2): when the third control switch K3 is turned on and the fourth control switch K4 is turned off, the fifth capacitor C5 is connected to the circuit, and the sixth capacitor C6 is short-circuited, so that the capacitance of the variable capacitance unit is the capacitance C5 of the fifth capacitor C5.
Case (3): when the third control switch K3 is closed and the fourth control switch K4 is opened, the fifth capacitor C5 is short-circuited, and the sixth capacitor C6 is connected to the circuit, at this time, the capacitance value of the variable capacitance unit is the capacitance value C6 of the sixth capacitor C6.
Case (4): when the third control switch K3 is closed and the fourth control switch K4 is closed, the fifth capacitor C5 and the sixth capacitor C6 are both short-circuited, and the capacitance value of the variable capacitance unit is 0.
As can be understood by those skilled in the art, the situation described in the above situation (4) does not exist in the present application according to actual needs. That is, in the present embodiment, the display frequency is divided into three steps, and different steps correspond to different storage capacitors
In practical application, the frequency detection chip generates a frequency step signal corresponding to the display frequency according to the detected display frequency, and the decoding unit further generates a frequency control signal according to the frequency step signal to drive the third control switch and the fourth control switch to be opened or closed, so that different storage capacitors are formed at different display frequencies, the pixel driving circuit can give consideration to both high-frequency display and low-frequency display, and the display effect of the display panel at different refreshing display frequencies is improved.
In yet another alternative example, also using two frequency control signal lines, the display device has four stages as shown in fig. 6, and the capacitance varying unit includes a seventh capacitance component and an eighth capacitance component connected in parallel, wherein:
the seventh capacitive assembly includes: a seventh capacitor Cst3 and a fifth control switch T8 connected in series with the seventh capacitor Cst3, the fifth control switch T8 being responsive to the third frequency control signal line change3 to open or close; the eighth capacitive assembly comprises: an eighth capacitor Cst4 and a sixth control switch T9 connected in series with the eighth capacitor Cst4, the sixth control switch T9 being responsive to the fourth frequency control signal line change4 to open or close.
As can be understood by those skilled in the art, when the fifth control switch T8 is opened, the seventh capacitor Cst3 is open, and when the fifth control switch T8 is closed, the seventh capacitor Cst3 is connected to the circuit; when the sixth control switch T9 is turned on, the eighth capacitor Cst4 is open, and when the sixth control switch T9 is turned off, the eighth capacitor Cst4 is connected to the circuit.
The capacitance variable unit responds to the frequency control signals transmitted by the third frequency control signal line and the fourth frequency control signal line to control the fifth control switch and the sixth control switch to form different storage capacitors.
The capacitance variable cell described in this example is capable of forming four different storage capacitance values, specifically the following four cases:
case (1): when the fifth control switch K5 is turned on and the sixth control switch K6 is turned on, the seventh capacitor C7 and the eighth capacitor C8 are both open, and the capacitance value of the variable capacitance unit is 0.
Case (2): when the fifth control switch K5 is opened and the sixth control switch K6 is closed, the seventh capacitor C7 is open, and the eighth capacitor C8 is closed, and the capacitance value of the capacitance variable unit is the capacitance value C8 of the eighth capacitor C8.
Case (3): when the fifth control switch K5 is closed and the sixth control switch K6 is opened, the seventh capacitor C7 is connected to the circuit, and the eighth capacitor C8 is disconnected, at this time, the capacitance value of the variable capacitance unit is the capacitance value C7 of the seventh capacitor C7.
Case (4): when the fifth control switch K5 is closed and the sixth control switch K6 is closed, the seventh capacitor C7 and the eighth capacitor C8 are both connected to the circuit, and the capacitance value of the capacitance variable unit is equal to C7+ C8, which is the parallel capacitance value C of the seventh capacitor C7 and the eighth capacitor C8.
As can be understood by those skilled in the art, the situation described in the above situation (1) does not exist in the present application according to actual needs. Specifically, for example, if there are 3 effective steps with 2 lines for a display frequency of 0 to 120Hz, the maximum capacitance value is used when the display frequency is 0 to 40Hz, the middle step capacitance value is used when the display frequency is 41 to 80Hz, and the minimum capacitance value is used when the display frequency is 81 to 120Hz, thereby realizing matching of appropriate storage capacitance according to the display frequency.
In practical application, the frequency detection chip generates a frequency shift signal corresponding to the display frequency according to the detected display frequency, and the decoding unit further generates a frequency control signal according to the frequency shift signal to drive the fifth control switch and the sixth control switch to be opened or closed, so that different storage capacitors are formed at different display frequencies, the pixel driving circuit can give consideration to both high-frequency display and low-frequency display, and the display effect of the display panel at different refreshing display frequencies is improved.
Considering that adding multiple stages can subdivide different display frequencies into different frequency stages to generate a plurality of different frequency control signals, so that the capacitance variable unit forms different storage capacitances to meet the requirements of different display frequencies on the charging rate and the grid voltage change rate, in an optional example, three frequency signal control lines are used, and the display device has eight frequency stages, and the capacitance variable unit comprises a ninth capacitance component, a tenth capacitance component and an eleventh capacitance component which are connected in series, wherein:
the ninth capacitive assembly includes: a ninth capacitor and a seventh control switch connected in parallel across the ninth capacitor, the seventh control switch being opened or closed in response to the fifth frequency control signal line; the tenth capacitive assembly comprises: a tenth capacitor and an eighth control switch connected in parallel across the tenth capacitor, the eighth control switch being opened or closed in response to the sixth frequency control signal line; the eleventh capacitive assembly includes: an eleventh capacitor and a ninth control switch connected in parallel across the eleventh capacitor, the ninth control switch being opened or closed in response to the seventh frequency control signal line.
As can be understood by those skilled in the art, when the seventh control switch is turned on, the ninth capacitor is connected into the circuit, and when the seventh control switch is turned off, the ninth capacitor is short-circuited; when the eighth control switch is switched on, the tenth capacitor is connected into the circuit, and when the eighth control switch is switched off, the tenth capacitor is short-circuited; when the ninth control switch is turned on, the eleventh capacitor is connected into the circuit, and when the ninth control switch is turned off, the eleventh capacitor is short-circuited.
The capacitance variable unit controls the seventh control switch, the eighth control switch and the ninth control switch to form different storage capacitances in response to frequency control signals transmitted by the fifth frequency control signal line, the sixth frequency control signal line and the seventh frequency control signal line.
The capacitance variable cell described in this example is capable of forming eight different storage capacitance values, specifically there are eight cases:
case (1): when the seventh control switch is turned on, the eighth control switch is turned on, and the ninth control switch is turned on, the ninth capacitor, the tenth capacitor, and the eleventh capacitor are all connected to the circuit, and at this time, the capacitance value of the variable capacitance unit is the series capacitance value of the ninth capacitor, the tenth capacitor, and the eleventh capacitor, assuming that the capacitance value of the ninth capacitor is c9, the capacitance value of the tenth capacitor is c10, and the capacitance value of the eleventh capacitor is c11, then the storage capacitance value of the variable capacitance unit is c 1/(1/c9+1/c10+1/c 11).
Case (2): when the seventh control switch is turned on, the eighth control switch is turned on, and the ninth control switch is turned off, the storage capacitance value of the capacitance variable unit is 1/(1/c9+1/c 10).
Case (3): when the seventh control switch is open, the eighth control switch is closed, and the ninth control switch is open, the storage capacitance value of the capacitance variable unit is 1/(1/c9+1/c 11).
Case (4): when the seventh control switch is open, the eighth control switch is closed, and the ninth control switch is closed, the storage capacitance value of the capacitance variable unit is c 9.
Case (5): when the seventh control switch is closed, the eighth control switch is opened, and the ninth control switch is opened, the storage capacitance value of the capacitance variable unit is 1/(1/c10+1/c 11).
Case (6): when the seventh control switch is closed, the eighth control switch is opened, and the ninth control switch is closed, the storage capacitance value of the capacitance variable unit is c 8.
Case (7): when the seventh control switch is closed, the eighth control switch is closed, and the ninth control switch is opened, the storage capacitance value of the capacitance variable unit is c 11.
Case (8): when the seventh control switch is turned on, the eighth control switch is turned on, and the ninth control switch is turned off, the storage capacitance value of the capacitance variable unit is 0.
As can be understood by those skilled in the art, the situation described in the above situation (8) does not exist in the present application according to actual needs. Specifically, for example, if there are 7 effective levels in 3 lines for display frequency of 0-140Hz, the maximum capacitance value is used when the display frequency is 0-20, and the minimum capacitance value is used when the display frequency is 120-140 Hz, so as to match the appropriate storage capacitance according to the display frequency.
In practical application, the frequency detection chip generates a frequency shift signal corresponding to the display frequency according to the detected display frequency, and the decoding unit further generates a frequency control signal according to the frequency shift signal to drive the seventh control switch, the eighth control switch and the ninth control switch to be opened or closed, so that different storage capacitors are formed at different display frequencies, the pixel driving circuit can give consideration to high-frequency display and low-frequency display, and the display effect of the display panel at different refreshing display frequencies is improved.
In yet another alternative example, also using three frequency signal control lines, the display device has eight frequency steps, and the capacitance varying unit includes a twelfth capacitance component, a thirteenth capacitance component, and a fourteenth capacitance component connected in parallel, wherein:
the twelfth capacitive component comprises: a twelfth capacitor and a tenth control switch in series with the twelfth capacitor, the tenth control switch being opened or closed in response to the fifth frequency control signal line; the thirteenth capacitive component includes: a thirteenth capacitor and an eleventh control switch in series with the thirteenth capacitor, the eleventh control switch being opened or closed in response to the sixth frequency control signal line; the fourteenth capacitive component includes: a fourteenth capacitor and a twelfth control switch in series with the fourteenth capacitor, the twelfth control switch being opened or closed in response to the seventh frequency control signal line.
As can be understood by those skilled in the art, when the tenth control switch is turned on, the twelfth capacitor is disconnected, and when the tenth control switch is turned off, the twelfth capacitor is connected into the circuit; when the eleventh control switch is switched on, the thirteenth capacitor is disconnected, and when the eleventh control switch is switched off, the thirteenth capacitor is connected into the circuit; when the twelfth control switch is turned on, the fourteenth capacitor is disconnected, and when the twelfth control switch is turned off, the fourteenth capacitor is connected into the circuit.
The capacitance variable unit controls the tenth control switch, the eleventh control switch and the twelfth control switch to form different storage capacitances in response to frequency control signals transmitted by the fifth frequency control signal line, the sixth frequency control signal line and the seventh frequency control signal line.
The capacitance variable cell described in this example is capable of forming eight different storage capacitance values, specifically there are eight cases:
case (1): when the tenth control switch is turned on, the eleventh control switch is turned on, and the twelfth control switch is turned on, the storage capacitance value of the capacitance variable unit is 0.
Case (2): when the tenth control switch is turned on, the eleventh control switch is turned on, and the twelfth control switch is turned off, the storage capacitance value of the capacitance variable unit is c 14.
Case (3): when the tenth control switch is open, the eleventh control switch is closed, and the twelfth control switch is open, the storage capacitance value of the capacitance variable unit is c 13.
Case (4): when the tenth control switch is turned on, the eleventh control switch is turned on, and the twelfth control switch is turned off, the storage capacitance value of the capacitance variable unit is c13+ c 14.
Case (5): when the tenth control switch is closed, the eleventh control switch is opened, and the twelfth control switch is opened, the storage capacitance value of the capacitance variable unit is c 12.
Case (6): when the tenth control switch is closed, the eleventh control switch is opened, and the twelfth control switch is closed, the storage capacitance value of the capacitance variable unit is c12+ c 14.
Case (7): when the tenth control switch is closed, the eleventh control switch is closed, and the twelfth control switch is opened, the storage capacitance value of the capacitance variable unit is c12+ c 13.
Case (8): when the tenth control switch is closed, the eleventh control switch is closed, and the twelfth control switch is closed, the storage capacitance value of the capacitance variable unit is c12+ c13+ c 14.
As can be understood by those skilled in the art, the situation described in the above situation (1) does not exist in the present application according to actual needs. Specifically, for example, if there are 7 effective levels in 3 lines for display frequency of 0-140Hz, the maximum capacitance value is used when the display frequency is 0-20, and the minimum capacitance value is used when the display frequency is 120-140 Hz, so as to match the appropriate storage capacitance according to the display frequency.
In practical application, the frequency detection chip generates a frequency step signal corresponding to the display frequency according to the detected display frequency, and the decoding unit further generates a frequency control signal according to the frequency step signal to drive the tenth control switch, the eleventh control switch and the twelfth control switch to be opened or closed, so that different storage capacitors are formed at different display frequencies, the pixel driving circuit can give consideration to high-frequency display and low-frequency display, and the display effect of the display panel at different refreshing display frequencies is improved.
It should be understood that the above examples are only examples for better understanding of the technical solutions of the embodiments of the present invention, and are not to be taken as the only limitation of the embodiments of the present invention. The number of the frequency control signal lines is not limited, and a person skilled in the art can set the corresponding frequency control signal lines according to actual requirements to transmit the frequency control signals, so that different storage capacitance values are formed.
The embodiment enables the pixel driving circuit to form different storage capacitors under different display frequencies through the frequency control signal generated by the frequency detection unit, so as to meet the requirements of different display frequencies on the charging rate and the grid voltage change rate of the first transistor, thereby reducing the storage capacitors during high-frequency display, improving the charging rate during data writing, improving the storage capacitors during low-frequency display, reducing the grid voltage change rate of the first transistor, and being capable of enabling the pixel driving circuit to give consideration to high-frequency display and low-frequency display, thereby overcoming the problems in the prior art, greatly improving the display effect of the display panel under different refreshing display frequencies, and having wide application prospects.
The embodiments in the present specification are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. In each example, the connection relationship of the driving unit, the data writing unit, the compensation unit, the first reset circuit, the second reset circuit or the first light-emitting control circuit is the same.
A second embodiment of the present application provides a control method for a display device based on the foregoing embodiments, as shown in fig. 7, the method includes:
s10, the frequency detection unit of the driver chip generates a frequency control signal according to the display frequency of the input display signal.
And S20, forming different storage capacitors by the pixel driving circuit of each sub-pixel of the display panel according to the frequency control signal to store the input data signal.
Since the control method of the display device provided in the embodiment of the present application corresponds to the display devices provided in the above several embodiments, the foregoing embodiments are also applicable to the control method of the display device provided in the embodiment, and detailed description is omitted in the embodiment.
The embodiment enables the pixel driving circuit to form different storage capacitors under different display frequencies through the frequency control signal generated by the frequency detection unit, so as to meet the requirements of different display frequencies on the charging rate and the grid voltage change rate of the first transistor, thereby reducing the storage capacitors during high-frequency display, improving the charging rate during data writing, improving the storage capacitors during low-frequency display, reducing the grid voltage change rate of the first transistor, and being capable of enabling the pixel driving circuit to give consideration to high-frequency display and low-frequency display, thereby overcoming the problems in the prior art, greatly improving the display effect of the display panel under different refreshing display frequencies, and having wide application prospects.
It should be understood that the above-mentioned embodiments of the present invention are only examples for clearly illustrating the present invention, and are not intended to limit the embodiments of the present invention, and it will be obvious to those skilled in the art that other variations or modifications may be made on the basis of the above description, and all embodiments may not be exhaustive, and all obvious variations or modifications may be included within the scope of the present invention.
Claims (10)
1. A display device comprising a display panel and a driving chip that drives the display panel, wherein:
the driving chip comprises a frequency detection unit, a frequency control unit and a control unit, wherein the frequency detection unit is used for generating a frequency control signal according to the display frequency of an input display signal;
the display panel comprises a plurality of sub-pixels arranged in an array, each sub-pixel comprises a light emitting device and a pixel driving circuit for driving the light emitting device, and the pixel driving circuit forms different storage capacitors according to the frequency control signal so as to store input data signals.
2. The display device according to claim 1, wherein the frequency detection unit comprises a frequency detection chip and a decoding unit, wherein
The frequency detection chip is used for generating a frequency gear signal according to the display frequency of the input display signal;
and the decoding unit is used for generating a frequency control signal according to the frequency gear signal.
3. The display device according to claim 2,
the decoding unit is electrically connected with at least one frequency control signal line to transmit the frequency control signal;
the pixel driving circuit comprises a driving unit, a data writing unit, a compensation unit and a capacitance variable unit
The capacitance variable unit is used for responding to the frequency control signal transmitted by the frequency control signal line to form different storage capacitances;
the data writing unit is used for responding to an input scanning signal, accessing the data signal and storing the data signal in the storage capacitor through the driving unit and the compensation unit;
the driving unit drives the light emitting device to emit light in response to the input first power signal and the data signal stored in the storage capacitor.
4. The display device according to claim 3, wherein the frequency control signal line comprises a first frequency control signal line, and the capacitance variable unit comprises a first capacitance component and a second capacitance connected in series, wherein
The first capacitive assembly includes: the circuit comprises a first capacitor and a first control switch connected in parallel at two ends of the first capacitor, wherein the first control switch
Opens in response to a frequency control signal transmitted by the first frequency control signal line to access the first capacitor and form a storage capacitor comprising a first capacitor and a second capacitor connected in series, or
The frequency control signal transmitted in response to the first frequency control signal line is closed to form a storage capacitor including a second capacitor.
5. The display device according to claim 3, wherein the frequency control signal line comprises a second frequency control signal line, and the capacitance variable unit comprises a third capacitance component and a fourth capacitance in parallel, wherein
The third capacitive component includes: a third capacitor and a second control switch connected in series with the third capacitor, the second control switch
Open in response to the frequency control signal transmitted from the second frequency control signal line to form a storage capacitor including the fourth capacitor, or
The frequency control signal transmitted in response to the second frequency control signal line is closed to form a storage capacitor comprising a third capacitor and a fourth capacitor connected in parallel.
6. The display device according to claim 3, wherein the frequency control signal line includes a third frequency control signal line and a fourth frequency control signal line,
the capacitance variable unit comprises a fifth capacitance component and a sixth capacitance component which are connected in series, wherein
The fifth capacitive component includes: a fifth capacitor and a third control switch connected in parallel across the fifth capacitor, the third control switch being opened or closed in response to the third frequency control signal line,
the sixth capacitive assembly includes: a sixth capacitor and a fourth control switch connected in parallel across the sixth capacitor, the fourth control switch being opened or closed in response to the fourth frequency control signal line,
the capacitance variable unit responds to the frequency control signals transmitted by the third frequency control signal line and the fourth frequency control signal line to control the third control switch and the fourth control switch to form different storage capacitors;
or
The capacitance variable unit comprises a seventh capacitance component and an eighth capacitance component which are connected in parallel, wherein
The seventh capacitive assembly includes: a seventh capacitor and a fifth control switch in series with the seventh capacitor, the fifth control switch being opened or closed in response to the third frequency control signal line,
the eighth capacitive assembly comprises: an eighth capacitor and a sixth control switch in series with the eighth capacitor, the sixth control switch being opened or closed in response to the fourth frequency control signal line,
the capacitance variable unit responds to the frequency control signals transmitted by the third frequency control signal line and the fourth frequency control signal line to control the fifth control switch and the sixth control switch to form different storage capacitors.
7. The display device according to claim 3, wherein the frequency control signal line includes a fifth frequency control signal line, a sixth frequency control signal line, and a seventh frequency control signal line,
the capacitance variable unit comprises a ninth capacitance component, a tenth capacitance component and an eleventh capacitance component which are connected in series, wherein
The ninth capacitive assembly includes: a ninth capacitor and a seventh control switch connected in parallel across the ninth capacitor, the seventh control switch being opened or closed in response to the fifth frequency control signal line,
the tenth capacitive assembly comprises: a tenth capacitor and an eighth control switch connected in parallel across the tenth capacitor, the eighth control switch being opened or closed in response to the sixth frequency control signal line,
the eleventh capacitive assembly includes: an eleventh capacitor and a ninth control switch connected in parallel across the eleventh capacitor, the ninth control switch being opened or closed in response to the seventh frequency control signal line,
the capacitance variable unit responds to frequency control signals transmitted by the fifth frequency control signal line, the sixth frequency control signal line and the seventh frequency control signal line to control the seventh control switch, the eighth control switch and the ninth control switch to form different storage capacitors;
or
The capacitance variable unit comprises a twelfth capacitance component, a thirteenth capacitance component and a fourteenth capacitance component which are connected in parallel, wherein
The twelfth capacitive component comprises: a twelfth capacitor and a tenth control switch in series with the twelfth capacitor, the tenth control switch being opened or closed in response to the fifth frequency control signal line,
the thirteenth capacitive component includes: a thirteenth capacitor and an eleventh control switch in series with the thirteenth capacitor, the eleventh control switch being opened or closed in response to the sixth frequency control signal line,
the fourteenth capacitive component includes: a fourteenth capacitor and a twelfth control switch in series with the fourteenth capacitor, the twelfth control switch being opened or closed in response to the seventh frequency control signal line,
the capacitance variable unit controls the tenth control switch, the eleventh control switch and the twelfth control switch to form different storage capacitances in response to frequency control signals transmitted by the fifth frequency control signal line, the sixth frequency control signal line and the seventh frequency control signal line.
8. The display device according to any one of claims 3 to 7,
the driving unit comprises a first transistor, the grid electrode of the first transistor is electrically connected with a first node, the first pole of the first transistor is connected with a first power supply signal, and the second pole of the first transistor is electrically connected with a second node;
the data writing unit comprises a second transistor, a grid electrode of the second transistor is connected with the scanning signal, a first stage of the second transistor is connected with the data signal, and a second stage of the second transistor is electrically connected with a first pole of the first transistor;
the compensation unit comprises a third transistor, the grid electrode of the third transistor is connected with the scanning signal, the first stage of the third transistor is electrically connected with the second pole of the first transistor, and the second stage of the third transistor is electrically connected with the first node;
the variable capacitance unit comprises a first end and a second end, the first end of the variable capacitance unit is connected to the first power supply signal, and the second end of the variable capacitance unit is electrically connected with the first node;
the light emitting device comprises a first end and a second end, the first end of the light emitting device is electrically connected with the second node, and the second end of the light emitting device is connected to a second power supply signal.
9. The display device according to claim 8, wherein the pixel driving circuit further comprises at least one of a first reset circuit, a second reset circuit, and a first light emission control circuit, wherein
The first reset circuit comprises a fourth transistor, wherein a grid electrode of the fourth transistor is connected with a first reset signal, a first stage of the fourth transistor is electrically connected with the first node, and a second pole of the fourth transistor is connected with a third power supply signal;
the second reset circuit comprises a fifth transistor, a grid electrode of the fifth transistor is connected with a second reset signal, a first stage of the fifth transistor is electrically connected with the second node, and a second pole of the fifth transistor is connected with the third power supply signal;
the first light emitting control circuit comprises a sixth transistor, a grid electrode of the sixth transistor is connected with a light emitting signal, a first stage of the sixth transistor is electrically connected with a first pole of the first transistor, and a second pole of the sixth transistor is connected with the first power supply signal.
10. A control method based on the display device according to any one of claims 1 to 9, comprising:
the frequency detection unit of the driving chip generates a frequency control signal according to the display frequency of the input display signal;
and the pixel driving circuit of each sub-pixel of the display panel forms different storage capacitors according to the frequency control signal so as to store the input data signal.
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| CN111883050A (en) * | 2020-08-14 | 2020-11-03 | 京东方科技集团股份有限公司 | Pixel circuit, display panel, display device and control method thereof |
| CN112365844A (en) * | 2020-12-09 | 2021-02-12 | 武汉华星光电半导体显示技术有限公司 | Pixel driving circuit and display panel |
| CN113178170A (en) * | 2021-06-29 | 2021-07-27 | 深圳小米通讯技术有限公司 | Pixel driving circuit, method and device and display panel |
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| US20180286308A1 (en) * | 2017-04-04 | 2018-10-04 | Samsung Display Co., Ltd. | Organic light-emitting display device and method of driving the same |
| CN110197644A (en) * | 2019-06-10 | 2019-09-03 | 武汉华星光电半导体显示技术有限公司 | Pixel-driving circuit |
| CN111883050A (en) * | 2020-08-14 | 2020-11-03 | 京东方科技集团股份有限公司 | Pixel circuit, display panel, display device and control method thereof |
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