CN113987992A - High-speed mainboard of CPU gateway based on modular design - Google Patents

Abstract

The invention discloses a CPU gateway high-speed mainboard based on modular design, and belongs to the technical field of CPU high-speed circuit board design. By designing the high-speed mainboard of the CPU gateway into 3 modules, high-speed signals with the signal frequency of more than 6GT/s are concentrated on the core board module, the core board module adopts 18 layers of PCB boards with high speed and low signal loss, low-speed signals with the frequency of less than 6GT/s are concentrated on the management interface module, and 8-10 layers of PCB boards with lower cost are adopted; the core board module and the management interface module are connected through a high-speed connector, only necessary signals which are mutually interacted are connected, and other signals are processed in the core board and the management interface board as much as possible; thereby reduced manufacturing cost, the function of nuclear core plate is simplified moreover, the PCB area reduces, the solder joint has reduced about 25% by a wide margin, greatly reduced the engineering risk of design, processing, reduced the debugging degree of difficulty, improved the yields.

Description

High-speed mainboard of CPU gateway based on modular design

Technical Field

The invention relates to a CPU gateway high-speed mainboard based on modular design, and belongs to the technical field of CPU high-speed circuit board design.

Background

As is known, the performance, process level and engineering level of a domestic CPU have great differences from those of a foreign CPU, and the mass production capability and engineering consistency are poor, so that the design difficulty is increased, the production and manufacturing process is complex, the yield is difficult to improve, the manufacturing cost is high, and the popularization and application of the domestic CPU are seriously hindered by the problems.

The domestic CPU is integrated with a large number of high-speed signals and low-speed signals like other system CPUs; the problem of interference between signals is needed to be considered when designing the high-speed motherboard of the CPU gateway. The common practice is to adopt a multi-layer PCB board to achieve the effect of isolating the interference between signals; for example, X ter abroad, us super X use 12 layers PCB board; based on the difference between the design and the manufacturing process, the domestic CPU gateway high-speed motherboard needs to be provided with 18-20 layers of PCB boards, for example, the domestic Shenwei 3231 type CPU gateway high-speed motherboard adopts 20 layers of PCB boards, based on the high-quality requirement of high-speed signals on the PCB, the domestic CPU gateway high-speed motherboard is far higher than the cost of foreign X Te and American super X (about 30-50%) in terms of PCB cost alone, and because the thickness and the size of the CPU gateway high-speed motherboard are required, the difficulty coefficient of arranging 18-20 layers of PCB boards in 2mm is higher than that of 12 layers of PCB boards, so that the production yield of the domestic CPU is lower.

Disclosure of Invention

In order to solve the problems of complex production and manufacturing process, difficult improvement of yield and high manufacturing cost of a domestic CPU, the invention provides a CPU gateway high-speed mainboard based on modular design, which divides the CPU gateway high-speed mainboard into 3 modules, including a core board module, a management interface module and an external interface card module; integrating the high-rate signals into a core board module; the low rate signal is integrated on the management interface module.

A CPU gateway high-speed mainboard based on modular design comprises a core board module, a management interface module and an external interface card module; wherein, the core board module is integrated with high-speed signals with the signal frequency of more than 6 GT/s; the management interface module is integrated with a low-speed signal with the frequency below 6 GT/s; the core board module and the management interface module are connected through a high-speed connector.

Optionally, the core board module is provided with a CPU chip, a DDR4 memory, a pci 4.0 Root, a corresponding power supply VR part, and a high-speed clock circuit part; the core board module adopts 18 layers of PCB boards.

Optionally, the PCB board adopted by the core board module includes TU883 and IT 968.

Optionally, the management interface module is provided with power distribution management, external interface management, an out-of-band management circuit, and a CPLD; the external interface card module selects a standard PCIe3.0/4.0 interface.

Optionally, the management interface module adopts a 10-layer PCB.

Optionally, the management interface module uses PCB boards including TUC862 and IT150 GS.

The core board module is provided with a CPU chip, a DDR4 internal memory, a PCIe4.0 Root, a corresponding power supply VR part and a high-speed clock circuit part; the core board module adopts high-speed and low-signal-loss PCB boards and is provided with 18 layers; the management interface module is provided with power distribution management, external interface management, an out-of-band management circuit and a CPLD; the external interface card module selects a standard PCIe3.0/4.0 interface.

The invention has the beneficial effects that:

by designing the CPU gateway high-speed mainboard into 3 modules, high-speed signals with the signal frequency of more than 6GT/s are concentrated on the core board module, the core board module adopts 18 layers of PCB boards with high speed and low signal loss, and low-speed signals with the frequency of less than 6GT/s are concentrated on the management interface module, and the PCB boards with lower cost are adopted; the core board module and the management interface module are connected through a high-speed connector, only necessary signals which are mutually interacted are connected, the number of the connected signals is as small as possible, and other signals are processed in the core board and the management interface board as much as possible; thereby reduced CPU's manufacturing cost, moreover because the function of nuclear core plate is simplified, the PCB area reduces, the solder joint reduces by a wide margin (about 20000 solder joint), can the engineering risk of greatly reduced design, processing, reduce the debugging degree of difficulty, improve the yields.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

Fig. 1 is a schematic block diagram of a high-speed motherboard of a CPU gateway based on a modular design according to an embodiment of the present invention;

fig. 2 is a schematic diagram of core board modules of a CPU gateway high-speed motherboard based on a modular design according to an embodiment of the present invention;

fig. 3 is a schematic diagram of a management interface module of a high-speed motherboard of a CPU gateway based on a modular design according to an embodiment of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

Introduction of related knowledge:

the high-speed signals on the CPU gateway high-speed mainboard are divided into PCIe signals and DDR signals, wherein the signal frequency of the PCIe4.0 reaches 16GT/S, the signal frequency of the PCI5.0 reaches 32GT/S, each CPU chip of the latest Shenwei 32-core CPU is provided with 40 pairs of PCIe4.0 signals, and the mainboard is often connected with a PCIe4.0 exchange chip for expanding the interface capability and then is added with 40 pairs of PCIe4.0 high-speed differential signals; each CPU chip is provided with 8 DDR4 memory controllers and 8 memory channels, the mode that each channel pushes 2 DIMM memory slots is adopted, the DDR4 memory rate reaches 3200MT/s, each CPU is connected with 16 DIMM memory slots, a mainboard of a 2-path CPU chip is connected with 32 DIMM memory slots, each pair of DDR4 differential signals requires 6.4GT/s for the rate, and each DIMM memory slot is provided with 240 pins.

As described above, for PCIe and DDR signals, the signal transmission rate is high, there are many signal lines, the number of solder joints is about 80000 in the production process of the motherboard, the principle logic design of the lines, the PCB layout and wiring, and the later-stage PCB manufacturing and mounting are very complex and difficult.

On the other hand, the low-speed signals on the high-speed motherboard of the CPU gateway, such as the signals of the south bridge, the north bridge, and the out-of-band management part, have relatively low signal frequency, which is only 6GT/s at most, and the number of differential signal lines is also small.

The first embodiment is as follows:

the present embodiment provides a CPU gateway high-speed motherboard based on modular design, and referring to fig. 1, the CPU gateway high-speed motherboard based on modular design includes a core board module, a management interface module, and an external interface card module; wherein, the core board module is integrated with high-speed signals with the signal frequency of more than 6 GT/s; the management interface module is integrated with a low-speed signal with the frequency below 6 GT/s; the core board module and the management interface module are connected through a high-speed connector.

The core board module is provided with a CPU chip, a DDR4 internal memory, a PCIe4.0 Root, a corresponding power supply VR part and a high-speed clock circuit part. Because the signal frequency of the part is high, the PCB adopts a high-speed and low-signal-loss 18-layer PCB, such as TU883 and IT 968.

As shown in fig. 2, the core board module includes a CPU, a DDR4 socket, a PCIe bridge chip, and necessary power and clock modules for these chips. The CPU module is provided with two CPU chips of a CPU0 and a CPU1, the CPU0 and the CPU1 are connected by using an interconnection bus, the interconnection bus is divided into three paths of A/B/C, each path of bus has 9 lanes, 27 lanes are shared, namely 108 signals, and the highest 28Gbps rate of the single lane is achieved. The single CPU chip is internally integrated with 8 DDR4 memory controllers, each controller 72 bit: 64bit data +8bit ECC, and 1256 DDR4 memory controller interface signals in total are stored in the CPU; each DIMM occupies 72bit data bits and 18 DQS +45 address line signals, the highest rate of 3200M is supported, and each CPU chip stores 2160 high-speed signals.

As shown in fig. 2, each CPU chip integrates 6 PCIe GEN4 interfaces (RCs), two X16 (split X8) + two X4, for a total of 40 lane; each interface supports the characteristics of polarity inversion, channel inversion and link auto-negotiation; the single lane supports the highest transmission rate of 16 GT/s; each CPU chip has 160 PCIe4.0 high-speed signals.

As shown in fig. 2, the core board module is provided with 8 SLOT connectors SLOT a to H and 8lane PCIe GEN3 at the sea, each SLOT connector contains 32 high-speed signals and 61 low-speed signals. The 8 SLOT connectors are used for being connected with the external interface card module, and the external interface card module comprises a network card.

As shown in FIG. 3, the external interface on the management interface module supports USB, SATA, 1000BASE-T and VGA. The signals integrated on the management interface module are only 6GT/s at most, so that 8-10 layers of PCB plates with lower cost are adopted.

The core board module and the management interface module are connected through a high-speed connector to meet the transmission rate of part of high-speed serdes interfaces, wherein the transmission rate comprises 40 high-speed signals and 45 low-speed signals. The high-speed connector part signals used are illustrated below:

1.9 lane PCIe GEN2, 36 signals in total, single lane rate 5 Gbps;

2. one PCIe clock, 100M-HCSL (complete machine system clock is homologous);

3. one path of LPC master (from a CPU chip) with the transmission rate of 16 MB/s;

4. one JTAG is used for testing;

5. part of general GPIO is used for system reset, power-on and power-off and other control signals;

6.40 high-speed signal points; 8+5+32 low speed signals.

The CPU gateway high-speed mainboard is ingeniously divided into 3 modules, the core board module with the highest design, simulation, manufacturing and debugging difficulty is used as the core board module, and the core board module is the largest in design difficulty, the highest in cost and the largest in engineering risk; the key of solving the problem of a core board is to solve the problem of a domestic Shenwei CPU circuit board. The peripheral interface, the out-of-band control and management part is called a management interface module which is designed to have a general function as much as possible and covers the interfaces and the management functions of most gateway equipment, the management interface module can be made of PCBs with fewer layers and lower cost, and is connected with a core board through a high-speed connector, and the interface card part is used for improving a standard PCIe3.0/4.0 interface by the core board and is connected with an external interface card through the high-speed connector; the interface cards can be designed and manufactured independently according to different users and use scenes, and flexible and various interface units can be formed only by connecting the standard PCIe3.0/4.0 interface with a core board. This application passes through modular design CPU, has reduced CPU's manufacturing cost, moreover because the function of nuclear core plate module is simplified, the PCB area reduces, the solder joint reduces by a wide margin (about 20000 solder joint), greatly reduced the engineering risk of design, processing, reduced the debugging degree of difficulty, improved the yields.

It should be noted that, the core board module in the present application uses a "PCB board with high speed and low signal loss" and the management interface module uses a "PCB board with relatively low cost" to design and produce a board that can be determined by a technician according to actual requirements for the high-speed motherboard of the CPU gateway.

Some steps in the embodiments of the present invention may be implemented by software, and the corresponding software program may be stored in a readable storage medium, such as an optical disc or a hard disk.

The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.

Claims (6)

1. A CPU gateway high-speed mainboard based on modular design is characterized in that the CPU gateway high-speed mainboard based on modular design comprises a core board module, a management interface module and an external interface card module; wherein, the core board module is integrated with high-speed signals with the signal frequency of more than 6 GT/s; the management interface module is integrated with a low-speed signal with the frequency below 6 GT/s; the core board module and the management interface module are connected through a high-speed connector.

2. The CPU gateway high-speed motherboard based on modular design as claimed in claim 1, wherein said core board module is provided with a CPU chip, DDR4 internal memory, PCIe4.0 Root and corresponding power supply VR part, high-speed clock circuit part; the core board module adopts 18 layers of PCB boards.

3. The CPU gateway high-speed motherboard based on modular design as recited in claim 2 wherein said core board module employs PCB boards including TU883 and IT 968.

4. The CPU gateway high-speed motherboard based on modular design as recited in claim 1, wherein said management interface module is provided with power distribution management, external interface management, out-of-band management circuit, CPLD; the external interface card module selects a standard PCIe3.0/4.0 interface.

5. The CPU gateway high-speed motherboard based on modular design as recited in claim 4 wherein said management interface module is a 10-layer PCB board.

6. The CPU gateway high-speed motherboard based on modular design as claimed in claim 5, wherein said management interface module adopts PCB board material comprising TUC862 and IT150 GS.

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