CN113965220B - Universal interface processing device for radio frequency terminal - Google Patents

Abstract

The universal interface processing device for the radio frequency terminal has the advantages of high degree of universalization, reasonable function area division and strong expandability. The invention is realized by the following technical scheme: the rigid-flex board is combined with the high-speed signal processing main board and the interface processing auxiliary board through the magnetic connector with the buckle, so that the interface connection of the main board and the auxiliary board is completed; the interface processing auxiliary board completes module interface processing and state detection, and the high-speed interface conversion circuit, the low-speed interface conversion circuit and detection circuit are detected, the high-speed data processing circuit adopts a plug-in DDR, an FPGA and a DSP of a plug-in memory SDRAM, the plug-in DDR, the FPGA is connected with an interactive architecture through an external memory interface EMIF interface, the FPGA receives, analyzes and processes telemetry data, the real-time processed data is sent to the DSP through the external memory interface EMIF, and then is returned to the FPGA through the EMIF, and the FPGA completes control management of all interfaces and monitors and reports the working state of the radio-frequency terminal.

Description

Universal interface processing device for radio frequency terminal

Technical Field

The invention relates to the fields of aerospace measurement and control, communication and the like, in particular to a universal interface processing device.

Background

Currently, the design thought based on a special hardware circuit is generally adopted by the aerospace measurement and control radio frequency equipment, and each radio frequency equipment realizes a specific function. Along with the rapid development of wireless measurement and control technology, the implementation way of the radio frequency electronic equipment is continuously enriched and perfected, and the problems of increased quantity of radio frequency equipment, complex electromagnetic environment among the equipment, huge system volume, large workload of test operation and maintenance, great personnel requirements and the like are brought while the measurement and control reliability is improved.

The interfaces of the electronic products are bridges for 'communication' between the same equipment and different equipment, and the interfaces use a unified protocol standard, so that the interaction between the equipment without distinction at the user side can be truly realized. Along with the increasing complexity of interface requirements, the radio frequency terminal interfaces required by various products are various, and currently common interfaces include interfaces such as low-voltage differential signal interfaces (LVDS), serial interfaces (RS 485/422) and LVTTL/TTL. The digital signals output by the liquid crystal display drive board comprise signals such as line synchronization, field synchronization and pixel clock besides RGB digital signals, wherein the highest frequency of the pixel clock signals can exceed 28MHz, TTL interfaces are adopted, the data transmission rate is not high, the transmission distance is short, the electromagnetic anti-interference capability is poor, certain influence can be caused on RGB data, in addition, TTL multipath data signals are transmitted in a wire arrangement mode, the number of the whole wire arrangement is tens of paths, and the connection is inconvenient and is not suitable for the trend of ultrathin. In a communication system, a radio frequency front end generally comprises: amplifiers, filters, frequency converters, and some radio frequency connections and matching circuits. The traditional interface processing device is generally directly connected by adopting a common connector, so that the module customization degree is high, the repeated design phenomenon is serious, the function area division is unreasonable, the expansibility is not strong, the system complexity is increased, the system reliability is reduced, and the interface device is difficult to adapt to the installation environment with higher space requirements such as missile-borne environment. The aerospace measurement and control system refers to special technical facilities for tracking, measuring and controlling all stages of aircrafts such as rockets, missiles, satellites and the like. With the development of application satellites, in particular to the convergence and butt joint of navigation satellites, high-resolution remote sensing satellites and manned spacecraft, spacecrafts and navigation between the satellites and further distances, higher requirements are put on a spaceflight measurement and control system. The universal interface processing device of the radio frequency terminal is a core component of the aerospace measurement and control comprehensive radio frequency terminal system, and the functions of the universal interface processing device of the radio frequency terminal generally comprise: 1) Telemetry data receiving and analyzing; 2) Monitoring and reporting the working state of the radio frequency terminal; 3) And controlling and managing other functional modules. Because of the missile-borne application environment, the components are required to be miniaturized, light-weighted, compact in structure, high in integration and the like as far as possible, and meanwhile, the reliable work of the radio frequency terminal is ensured. In recent years, the development of the embedded microkernel data processing technology, the design concept of a software radio design, an open system architecture and a generalized hardware platform design concept provide a solid technical foundation for developing the aircraft-mounted comprehensive radio-frequency terminal with high efficiency, low cost and good expansibility.

Disclosure of Invention

Aiming at the problems and the defects of the prior art, the invention provides the universal interface processing device with high universalization degree, reasonable function area division and strong expandability, so as to solve the problems of high customization degree, unreasonable function area division, low expandability reusability and the like of the traditional interface processing device.

The above object of the present invention can be achieved by a general interface processing device for a radio frequency terminal, comprising: the high-speed signal processing main board, the interface processing auxiliary board and the rigid-flexible connecting board for connecting the high-speed signal processing main board and the interface processing auxiliary board provide working power supply to complete a power supply circuit for supplying power to the main board; the method is characterized in that: the rigid-flex board is combined with the high-speed signal processing main board and the interface processing auxiliary board through the magnetic connector with the buckle, so that the interface connection of the main board and the auxiliary board is completed; the high-speed signal processing main board is provided with a high-speed data processing circuit and an interface processing auxiliary board thereof, wherein the high-speed data processing circuit is connected with a power circuit and a clock circuit, the clock circuit gives out a main board working clock, the high-speed data processing circuit finishes the real-time data processing function, the interface processing auxiliary board finishes the module interface processing and state detection, and the high-speed interface conversion circuit, the low-speed interface conversion circuit and the detection circuit detect, wherein the high-speed interface conversion circuit and the low-speed interface conversion circuit finish the various interface conversion of the module, and the detection circuit finishes the module working voltage and the environment temperature monitoring and reports to the control terminal through the interface conversion circuit; the high-speed data processing circuit adopts a digital signal processor DSP of an external double rate synchronous dynamic random memory DDR, a field programmable gate array FPGA and an external synchronous dynamic random memory SDRAM, the digital signal processor DSP is connected with an external memory interface EMIF interface, the FPGA receives, analyzes and processes telemetry data, the data processed in real time is sent into the DSP through the external memory interface EMIF, the data is returned to the FPGA through the EMIF after being processed, the FPGA completes control and management of each interface, and simultaneously monitors and reports the working state of the radio-frequency terminal.

Compared with the prior art, the invention has the following beneficial effects:

simple structure, reliable connection and convenient replacement. The invention adopts the rigid-flex connection board connected between the high-speed signal processing main board and the interface processing auxiliary board, and the rigid-flex connection board directly connected with the main board and the auxiliary board through the magnetic connector is simple and convenient to use and convenient to replace, reduces the direct connection of cables and reduces the risk of wiring errors; the magnetic connector with the buckle is selected, and the maintainability and the reliability of the device are forcefully improved under the condition of ensuring the connection reliability. Through the organic combination of the magnetic connector and the rigid-flex board, the magnetic connector is very convenient to replace on the premise of meeting the requirement of connection reliability, and simultaneously, the magnetic connector can adapt to the scene requirements of different connection lengths, and the maintainability and the expandability of the device are provided. LVDS overcomes the defects of large power consumption, large EMI electromagnetic interference and the like when broadband high-code rate data is transmitted in a TTL level mode, and has good universality and reusability. According to the invention, the high-speed data processing function is arranged on the main board, the interface processing part is arranged on the auxiliary board, and the design requirements of most application scenes on the main board can be met by reasonably dividing the functions of the main board and the auxiliary board, and the requirements of new application scenes can be met by only changing the rigid-flex connection board or the interface processing auxiliary board, so that the universality and reusability of the device are improved. The mainboard can meet the requirements of high-speed data real-time processing functions of most scenes, and provides enough IO ports through the magnetic connector. When the connection length between the main board and the auxiliary board does not meet the design requirement, the design requirement can be met only by changing the rigid-flex connector board; when the types and the number of the interfaces of the auxiliary board do not meet the requirements, only the design of the auxiliary board can be changed; and in the limit condition, the interface processing auxiliary board and the rigid-flex connector board need to be changed together, the rigid-flex connection board is changed, and even the signal processing main board is changed. Therefore, the device can greatly save development period and has good universality and reusability.

The invention adopts the high-speed signal processing main board of the high-speed data processing circuit connected with the power circuit and the clock reset circuit, realizes the temperature detection and voltage detection circuit, can conveniently monitor the working state of the device, improves the fault detection rate and increases the testability.

Drawings

The invention is further described below with reference to the drawings and examples.

FIG. 1 is a schematic diagram of a generic interface device for a radio frequency terminal according to the present invention;

FIG. 2 is a schematic circuit diagram of the high-speed data processing circuit of FIG. 1;

FIG. 3 is a schematic diagram of the clock circuit of FIG. 2;

FIG. 4 is a schematic diagram of the power circuit of FIG. 1;

FIG. 5 is a schematic diagram of the circuit principle of the FPGA of FIG. 1 for providing power and interface signals through a rigid-flex connection board;

FIG. 6 is a schematic circuit diagram of the detection circuit of FIG. 1;

the technical scheme of the invention is further described in detail below with reference to the accompanying drawings.

Detailed Description

See fig. 1 and 2. In the exemplary preferred embodiments described below, a radio frequency terminal universal interface processing apparatus includes: the high-speed signal processing main board, the interface processing auxiliary board and the rigid-flexible connecting board for connecting the high-speed signal processing main board and the interface processing auxiliary board provide working power supply to complete a power supply circuit for supplying power to the main board; the method is characterized in that: the rigid-flex board is combined with the high-speed signal processing main board and the interface processing auxiliary board through the magnetic connector with the buckle, so that the interface connection of the main board and the auxiliary board is completed; the high-speed signal processing main board is provided with a high-speed data processing circuit and an interface processing auxiliary board thereof, wherein the high-speed data processing circuit is connected with a power circuit and a clock circuit, the clock circuit gives out a main board working clock, the high-speed data processing circuit finishes the real-time data processing function, the interface processing auxiliary board finishes the module interface processing and state detection, and the high-speed interface conversion circuit, the low-speed interface conversion circuit and the detection circuit detect, wherein the high-speed interface conversion circuit and the low-speed interface conversion circuit finish the various interface conversion of the module, and the detection circuit finishes the module working voltage and the environment temperature monitoring and reports to the control terminal through the interface conversion circuit; the high-speed data processing circuit adopts a digital signal processor DSP of an external double rate synchronous dynamic random memory DDR, a field programmable gate array FPGA and an external synchronous dynamic random memory SDRAM, the digital signal processor DSP is connected with an external memory interface EMIF interface, the FPGA receives, analyzes and processes telemetry data, the data processed in real time is sent into the DSP through the external memory interface EMIF, the data is returned to the FPGA through the EMIF after being processed, the FPGA completes control and management of each interface, and simultaneously monitors and reports the working state of the radio-frequency terminal.

The rigid-flex board is combined with the high-speed signal processing main board and the interface processing auxiliary board through the magnetic connector with the buckle, and the interface connection of the main board and the auxiliary board is mainly completed. The magnetic connector is realized by two parts of male and female heads which are inserted in pairs, wherein the male heads are welded on a PCB (printed circuit board) of a main board, the female heads are welded on a rigid-flex board, the male heads and the female heads are in butt joint through pin insertion holes, the periphery of the connector has a magnetic function, the connection reliability is enhanced, and finally, the connection is reinforced through a buckle; and similarly, the auxiliary board is connected with the rigid-flex board by adopting the same method, and the rigid-flex board is mainly connected with the auxiliary board working power supply and required input and output signals, and the length of the connecting board is determined according to actual requirements. The connector and the rigid-flex board are convenient to replace after the connection, and the connection reliability is also ensured through magnetic attraction and clamping. The interface processing auxiliary board mainly completes the functions of high-speed interface conversion and low-speed interface conversion, wherein the high-speed interface covers the LVDS low-voltage differential signal interface, and the low-speed interface covers the intelligent terminal RS485/422, the LVTTL/TTL level signal interface and the like.

See fig. 3. Clock circuit is by crystal oscillator 25MH _Z Outputting to the FPGA, and generating a DSP clock by the FPGA.

See fig. 4. The power supply circuit is realized by connecting two DC/DC voltage-reducing micro module voltage regulators LTM4644 and LTM4622 and 1 low dropout linear voltage regulator LDO power supply chip SW1764 in parallel, the power supply input is 5.4V, five voltages of 5.0V, 3.3V, 1.8V, 1.2V and 1.0V are converted, and the five voltages are respectively used for supplying power to the FPGA, the DSP and other peripheral circuits.

See fig. 5. The power supply needed by the interface processing auxiliary board is directly provided by the high-speed signal processing main board in a PCB wiring mode through the rigid-flex connecting board. The IO interface of the high-speed signal processing main board FPGA chip is connected to the interface processing auxiliary board through the flex-rigid board PCB wiring, and then is correspondingly connected with the input interface of each conversion chip. The high-speed interface conversion circuit relates to an LVDS circuit, a low-voltage differential signal is realized through a GM8108 chip, signals with opposite polarities are transmitted on two lines used for differential transmission, common-mode noise is uniformly superimposed on the two signals, and the communication distance and the signal quality of LVDS are ensured; LVDS signal transmission is carried out by three parts of a differential signal transmitter, a differential signal interconnection device and a differential signal receiver, wherein an LVDS driver firstly converts TTL/CMOS signals into differential signals, the differential signals are transmitted to the LVDS receiver through transmission media (such as copper wires, PCB (printed circuit board) connecting wires and the like), and the LVDS receiver receives the signals and converts the signals into the TTL/CMOS signals. The differential signaling device converts unbalanced TTL signals into balanced LVDS signals, which can be implemented by an IC, for example: DS90C031; the differential signal receiver converts the balanced transmission LVDS signal into the unbalanced transmission TTL signal, which can be implemented by an IC, for example: DS90C032, differential signal interconnect includes: and a connecting wire (cable or PCB wire), and a terminal matched resistor. The LVDS output interface uses a very low voltage swing (about 350 mV) for data transmission by differential, i.e., low voltage differential signaling, over two PCB traces or a pair of balanced cables. The LVDS output interface can enable signals to be transmitted on the differential PCB line or the balance cable at the speed of hundreds of Mbit/s, and low noise and low power consumption are realized due to the adoption of a low-voltage and low-current driving mode. The low-speed conversion interface part completes the conversion of TTL and RS485/422 interfaces through SN74LVC8T245PW and MAX3490, and provides a welding port to the outside through a bonding pad or a connector mode.

See fig. 6. The detection circuit includes a temperature detection and voltage detection circuit. Wherein the temperature detection is realized by TMP423, and the temperature information is transmitted back to the FPGA through the I2C channel; the voltage detection is realized by MAX1290, the voltage detection can be carried out on the 5 paths of power supplies of the board, and the detection result is returned to the FPGA through the BPI interface.

The foregoing description is merely a preferred embodiment for implementing a universal interface processing device, it being understood that the invention is not limited to the forms disclosed herein, but is not to be construed as excluding other embodiments, and is capable of numerous other combinations, modifications and environments and of modification within the scope of the inventive concept, either by the foregoing teachings or by the skill or knowledge of the relevant art. And that modifications and variations which do not depart from the spirit and scope of the invention are intended to be within the scope of the appended claims.

Claims (9)

1. A radio frequency terminal universal interface processing device, comprising: the high-speed signal processing main board, the interface processing auxiliary board and the rigid-flexible connecting board for connecting the high-speed signal processing main board and the interface processing auxiliary board provide working power supply to complete a power supply circuit for supplying power to the main board; the method is characterized in that: the rigid-flex board is combined with the high-speed signal processing main board and the interface processing auxiliary board through the magnetic connector with the buckle, so that the interface connection of the main board and the auxiliary board is completed; the high-speed signal processing main board is provided with a high-speed data processing circuit and an interface processing auxiliary board thereof, wherein the high-speed data processing circuit is connected with a power circuit and a clock circuit, the clock circuit gives out a main board working clock, the high-speed data processing circuit finishes the real-time data processing function, the interface processing auxiliary board finishes the module interface processing and state detection, and the high-speed interface conversion circuit, the low-speed interface conversion circuit and the detection circuit detect, wherein the high-speed interface conversion circuit and the low-speed interface conversion circuit finish the various interface conversion of the module, and the detection circuit finishes the module working voltage and the environment temperature monitoring and reports to the control terminal through the interface conversion circuit; the high-speed data processing circuit adopts a digital signal processor DSP of an external double-rate synchronous dynamic random memory DDR, a field programmable gate array FPGA and an external synchronous dynamic random memory SDRAM, and an interactive architecture connected with an external memory interface EMIF interface is adopted, the FPGA receives, analyzes and processes telemetry data, the data processed in real time is sent into the DSP through the external memory interface EMIF, the data is returned to the FPGA through the EMIF after being processed, the FPGA completes control and management on each interface, and simultaneously monitors and reports the working state of the radio-frequency terminal; the magnetic connector is realized by two parts of male and female heads in opposite insertion, wherein the male heads are welded on a PCB (printed circuit board) of a main board, the female heads are welded on a rigid-flex board, the male heads and the female heads are in butt joint through pin insertion holes, the periphery of the connector has a magnetic function, the connection reliability is enhanced, and finally the connector is reinforced through a buckle, and the auxiliary board is connected with the rigid-flex board by adopting the same method.

2. The radio frequency terminal universal interface processing apparatus according to claim 1, wherein: the rigid-flex connection board completes the auxiliary board working power supply and required input and output signals, and the interface processing auxiliary board completes the high-speed interface conversion and low-speed interface conversion functions.

3. The radio frequency terminal universal interface processing apparatus according to claim 1, wherein: the clock circuit outputs the crystal oscillator 25MH Z to the FPGA, and the FPGA generates a DSP clock.

4. The radio frequency terminal universal interface processing apparatus according to claim 1, wherein: the power supply circuit is realized by connecting two DC/DC voltage-reducing micro module voltage regulators LTM4644 and LTM4622 and 1 low dropout linear voltage regulator LDO power supply chip SW1764 in parallel, the power supply input is 5.4V, five voltages of 5.0V, 3.3V, 1.8V, 1.2V and 1.0V are converted, and the five voltages are respectively used for supplying power to the FPGA, the DSP and other peripheral circuits.

5. The radio frequency terminal universal interface processing apparatus according to claim 1, wherein: the IO interface of the high-speed signal processing main board FPGA chip is connected to the interface processing auxiliary board through the flex-rigid board PCB wiring, and then is correspondingly connected with the input interface of each conversion chip.

6. The radio frequency terminal universal interface processing apparatus according to claim 1, wherein: the high-speed interface conversion circuit relates to an LVDS circuit, low-voltage differential signals are realized through a GM8108 chip, signals with opposite polarities are transmitted on two lines used for differential transmission, common-mode noise is equally superimposed on the two signals, and communication distance and signal quality of LVDS are ensured.

7. The radio frequency terminal universal interface processing apparatus according to claim 1, wherein: the low-speed conversion interface finishes conversion of TTL and RS485/422 interfaces through SN74LVC8T245PW and MAX3490, and provides a welding port to the outside through a bonding pad or connector mode.

8. The radio frequency terminal universal interface processing apparatus according to claim 1, wherein: the detection circuit comprises a temperature detection and voltage detection circuit, wherein the temperature detection is realized by the TMP423, and the temperature information is transmitted back to the FPGA through the I2C channel; the voltage detection is realized by MAX1290, the voltage detection is carried out on the 5 paths of power supplies of the board, and the detection result is returned to the FPGA through the BPI interface.

9. The radio frequency terminal universal interface processing apparatus according to claim 1, wherein: the LVDS signal transmission is carried out by three parts of a differential signal transmitter, a differential signal interconnection device and a differential signal receiver, wherein an LVDS driver firstly converts TTL/CMOS signals into differential signals, the differential signals are transmitted to the LVDS receiver through a transmission medium, the LVDS receiver receives the signals and converts the signals into TTL/CMOS signals, and the differential signal transmitter converts unbalanced transmitted TTL signals into balanced transmitted LVDS signals; the differential signal receiver converts the balanced transmission LVDS signals into unbalanced transmission TTL signals.

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