CN113964022A - Thinning and coating process for back of silicon wafer - Google Patents
Thinning and coating process for back of silicon wafer Download PDFInfo
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- CN113964022A CN113964022A CN202111245894.7A CN202111245894A CN113964022A CN 113964022 A CN113964022 A CN 113964022A CN 202111245894 A CN202111245894 A CN 202111245894A CN 113964022 A CN113964022 A CN 113964022A
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- silicon wafer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02008—Multistep processes
- H01L21/0201—Specific process step
- H01L21/02013—Grinding, lapping
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
Abstract
The invention discloses a thinning and film-coating process for the back surface of a silicon wafer, which comprises film pasting, thinning, ultrasonic cleaning, film tearing, binding and film coating. The back thinning and coating process of the silicon wafer removes the pickling step, the pickling step is changed into the pure water ultrasonic cleaning, the pollution of waste liquid to the environment after the pickling is removed, and meanwhile, the cost is saved; and before coating, the silicon wafer and the matched binding substrate are coated, so that the increased fragment rate after the pickling step is eliminated, and the qualification rate of the finished product is improved.
Description
Technical Field
The invention relates to the field of silicon wafer coating, in particular to a silicon wafer back thinning coating process.
Background
The prior silicon wafer thinning and film plating process is shown in figure 1 and comprises five steps of film pasting, thinning, acid washing, film tearing and film plating. However, the waste liquid from pickling causes environmental pollution, and the residual liquid affects the firmness of the film. The final purpose of pickling is to increase the film firmness and eliminate the thinning dark spots, thereby reducing the probability of chipping. However, since the thickness of the silicon wafer is only 0.15mm after thinning, chipping still easily occurs, and the cost is quite high in case of chipping because the chip on the front side of the silicon wafer is already manufactured.
Disclosure of Invention
In order to solve the technical problem, the invention designs a film-plating process for thinning the back surface of a silicon wafer.
The invention adopts the following technical scheme:
a process for thinning and coating a film on the back of a silicon wafer comprises the following steps:
s1, film pasting: taking out the silicon wafer with the front surface finished, and sticking a protective film on the front surface of the silicon wafer through an automatic film sticking machine;
s2, thinning: taking out the silicon wafer with the front surface subjected to film pasting, carrying out coarse grinding processing by a 320# coarse grinding wheel, and then carrying out fine grinding processing by a 8000# fine grinding wheel to reduce the thickness to the required thickness; after grinding, carrying out spin washing by using pure water;
s3, ultrasonic cleaning: taking out the silicon wafer treated in the step S2, carrying out ultrasonic cleaning for 30 minutes by using pure water, and drying for 5 minutes by using hot air at 90 ℃ after the cleaning is finished;
s4, tearing the film: starting a vacuum chuck to suck the back of the silicon wafer by using a special film tearing machine, heating the silicon wafer to 50 ℃, and tearing off a protective film;
s5, binding: selecting a binding substrate matched with a silicon wafer, attaching a layer of high-temperature-resistant protective film on the surface of the binding substrate, placing the silicon wafer with the front side facing downwards on the binding substrate, and fixing the edge of the silicon wafer by using a high-temperature adhesive tape;
s6, coating: sequentially plating a Ti layer, an NIV layer and an Ag layer on the back of the silicon wafer through sputtering coating, wherein the thickness ratio of the layers is 1: 2: and 10, cooling for 30-90s after the film coating of each layer is finished, tearing off the fixed high-temperature adhesive tape after the film coating is finished, and taking down the coated silicon wafer to finish the whole silicon wafer back thinning film coating process.
Preferably, the protective film is a BG protective film.
Preferably, the high-temperature adhesive tape is attached outside the film coating effective area at the edge of the silicon chip.
Preferably, in step S2, the silicon wafer with the front surface subjected to film pasting is a silicon wafer with a thickness of 725um, and the silicon wafer is roughly ground by using a 320# rough grinding wheel to process 190um, and then finely ground by using a 8000# fine grinding wheel to reduce the thickness to 150 um.
Preferably, the binding substrate is a circular plate with a diameter of 200mm and a thickness of 0.725 mm.
Preferably, in step S5, six high temperature adhesive tapes are uniformly and symmetrically fixed at the edges of the silicon wafer, and the silicon wafer is placed with the front side facing down and bonded to the substrate.
The invention has the beneficial effects that: (1) the back surface thinning and coating process of the silicon wafer removes the pickling step, the pickling step is changed into the pure water ultrasonic cleaning step, the pollution of waste liquid to the environment after the pickling is removed, and meanwhile, the cost is saved; (2) and before coating, coating the silicon wafer and the matched binding substrate, eliminating the increased wafer breakage rate after reducing the pickling step, and improving the qualification rate of finished products.
Drawings
FIG. 1 is a process flow diagram of a conventional silicon wafer thinning and coating process;
FIG. 2 is a process flow diagram of the present invention.
Detailed Description
The technical scheme of the invention is further described in detail by the following specific embodiments in combination with the attached drawings:
example (b): as shown in the attached figure 2, the process for thinning and coating the back of the silicon wafer comprises the following steps:
s1, film pasting: taking out the silicon wafer with the front surface finished, and sticking a protective film on the front surface of the silicon wafer through an automatic film sticking machine;
s2, thinning: taking out the silicon wafer with the front surface subjected to film pasting, carrying out coarse grinding processing by a 320# coarse grinding wheel, and then carrying out fine grinding processing by a 8000# fine grinding wheel to reduce the thickness to the required thickness; after grinding, carrying out spin washing by using pure water;
s3, ultrasonic cleaning: taking out the silicon wafer treated in the step S2, carrying out ultrasonic cleaning for 30 minutes by using pure water, and drying for 5 minutes by using hot air at 90 ℃ after the cleaning is finished;
s4, tearing the film: starting a vacuum chuck to suck the back of the silicon wafer by using a special film tearing machine, heating the silicon wafer to 50 ℃, and tearing off a protective film;
s5, binding: selecting a binding substrate matched with a silicon wafer, attaching a layer of high-temperature-resistant protective film on the surface of the binding substrate, placing the silicon wafer with the front side facing downwards on the binding substrate, and fixing the edge of the silicon wafer by using a high-temperature adhesive tape;
s6, coating: sequentially plating a Ti layer, an NIV layer and an Ag layer on the back of the silicon wafer through sputtering coating, wherein the thickness ratio of the layers is 1: 2: and 10, cooling for 30-90s after the film coating of each layer is finished, tearing off the fixed high-temperature adhesive tape after the film coating is finished, and taking down the coated silicon wafer to finish the whole silicon wafer back thinning film coating process.
The protective film is a BG protective film.
The high-temperature adhesive tape is attached outside the effective coating area at the edge of the silicon chip.
In step S2, the silicon wafer with the front surface being coated with the film is a silicon wafer with a thickness of 725um, and the silicon wafer is roughly ground by using a 320# rough grinding wheel to process 190um, and then finely ground by using a 8000# fine grinding wheel to thin the silicon wafer to 150 um.
The binding substrate is a circular plate with a diameter of 200mm and a thickness of 0.725 mm.
In step S5, six high temperature tapes are uniformly and symmetrically fixed at the edge of the silicon wafer, and the silicon wafer is placed with its front side facing down and bonded to the substrate.
The back thinning and coating process of the silicon wafer removes the pickling step, the pickling step is changed into the pure water ultrasonic cleaning, the pollution of waste liquid to the environment after the pickling is removed, and meanwhile, the cost is saved; and before coating, the silicon wafer and the matched binding substrate are coated, so that the increased fragment rate after the pickling step is eliminated, and the qualification rate of the finished product is improved.
The above-described embodiments are only preferred embodiments of the present invention, and are not intended to limit the present invention in any way, and other variations and modifications may be made without departing from the spirit of the invention as set forth in the claims.
Claims (6)
1. A silicon wafer back thinning coating process is characterized by comprising the following steps:
s1, film pasting: taking out the silicon wafer with the front surface finished, and sticking a protective film on the front surface of the silicon wafer through an automatic film sticking machine;
s2, thinning: taking out the silicon wafer with the front surface subjected to film pasting, carrying out coarse grinding processing by a 320# coarse grinding wheel, and then carrying out fine grinding processing by a 8000# fine grinding wheel to reduce the thickness to the required thickness; after grinding, carrying out spin washing by using pure water;
s3, ultrasonic cleaning: taking out the silicon wafer treated in the step S2, carrying out ultrasonic cleaning for 30 minutes by using pure water, and drying for 5 minutes by using hot air at 90 ℃ after the cleaning is finished;
s4, tearing the film: starting a vacuum chuck to suck the back of the silicon wafer by using a special film tearing machine, heating the silicon wafer to 50 ℃, and tearing off a protective film;
s5, binding: selecting a binding substrate matched with a silicon wafer, attaching a layer of high-temperature-resistant protective film on the surface of the binding substrate, placing the silicon wafer with the front side facing downwards on the binding substrate, and fixing the edge of the silicon wafer by using a high-temperature adhesive tape;
s6, coating: sequentially plating a Ti layer, an NIV layer and an Ag layer on the back of the silicon wafer through sputtering coating, wherein the thickness ratio of the layers is 1: 2: and 10, cooling for 30-90s after the film coating of each layer is finished, tearing off the fixed high-temperature adhesive tape after the film coating is finished, and taking down the coated silicon wafer to finish the whole silicon wafer back thinning film coating process.
2. The process of claim 1, wherein the protective film is a BG protective film.
3. The process of claim 1, wherein the high temperature adhesive tape is attached to the edge of the silicon wafer outside the effective coating area.
4. The process of claim 1, wherein in step S2, the silicon wafer with the front surface coated with the film is a silicon wafer with a thickness of 725um, and the silicon wafer is roughly ground by a grinding wheel # 320 to 190um and then finely ground by a grinding wheel # 8000 to 150 um.
5. The process of claim 1, wherein the binding substrate is a circular plate with a diameter of 200mm and a thickness of 0.725 mm.
6. The process of claim 1, wherein in step S5, six high temperature adhesive tapes are used to symmetrically fix the edge of the silicon wafer uniformly, and the front side of the silicon wafer is placed on the substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111245894.7A CN113964022A (en) | 2021-10-26 | 2021-10-26 | Thinning and coating process for back of silicon wafer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111245894.7A CN113964022A (en) | 2021-10-26 | 2021-10-26 | Thinning and coating process for back of silicon wafer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN113964022A true CN113964022A (en) | 2022-01-21 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202111245894.7A Pending CN113964022A (en) | 2021-10-26 | 2021-10-26 | Thinning and coating process for back of silicon wafer |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113964022A (en) |
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2021
- 2021-10-26 CN CN202111245894.7A patent/CN113964022A/en active Pending
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