CN113935276A - Design data mapping relation construction system - Google Patents
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- CN113935276A CN113935276A CN202111537355.0A CN202111537355A CN113935276A CN 113935276 A CN113935276 A CN 113935276A CN 202111537355 A CN202111537355 A CN 202111537355A CN 113935276 A CN113935276 A CN 113935276A
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Abstract
The invention relates to a design data mapping relation construction system, which comprises a user input interface, a pre-established constraint rule base, a pre-configured mapping data structure, a processor and a memory for storing a computer program, wherein the constraint rule base is used for storing a father node and child node design type mapping constraint rule and a father node and child node design level constraint rule; the mapping data structure comprises a father node data segment and a child node data segment, the father node data segment comprises a father node design data name data segment, a father node component name data segment and a father node level data segment, and the child node design data name data segment comprises a child node design data name data segment, a child node component name data segment and a child node level data segment. The invention can establish the matching mapping relation between different design data, thereby realizing the connectivity check of system-level interconnection and improving the accuracy and efficiency of design data detection.
Description
Technical Field
The invention relates to the technical field of electronic design, in particular to a design data mapping relation construction system.
Background
In designs (devices) such as a PCB (Printed Circuit Board), a Package, an Interposer (Package carrier), an IC (integrated Circuit), etc., the designs are usually manufactured by different manufacturers, so that each design data is independent, and the network names, pin numbers, etc. configured by different design data may be different. In the design data detection process, all the design data are required to be nested together for detection. In the prior art, a small number of different designs are usually checked manually, but with the development of electronic technology, tens of thousands or even dozens of designs may be involved in one system to form multi-level interconnection, and the manual detection cannot guarantee the detection efficiency and accuracy, and is obviously not suitable for the manual detection any more. Since the design data are independent, the connectivity of system-level interconnection cannot be guaranteed, so that how to establish a matching mapping relationship between different design data, implement connectivity check of system-level interconnection, and improve the accuracy and efficiency of design data detection becomes a technical problem to be solved urgently.
Disclosure of Invention
The invention aims to provide a design data mapping relation construction system, which establishes a matching mapping relation between different design data, thereby realizing connectivity check of system-level interconnection and improving the accuracy and efficiency of design data detection.
According to a first aspect of the present invention, there is provided a design data mapping relationship construction system, including a user input interface, a pre-established constraint rule base, a pre-configured mapping data structure, a processor, and a memory storing a computer program, wherein the constraint rule base is configured to store design type mapping constraint rules of parent nodes and child nodes, and design hierarchy constraint rules of the parent nodes and the child nodes; the mapping data structure comprises a father node data segment and a son node data segment, the father node data segment comprises a father node design data name data segment, a father node component name data segment and a father node level data segment, the son node design data name data segment comprises a son node design data name data segment, a son node component name data segment and a son node level data segment, and when the processor executes the computer program, the following steps are realized:
step S1, acquiring user input data based on the user input interface, and generating to-be-processed design data mapping information according to the mapping data structure;
step S2, calling the constraint rule base based on the to-be-processed design data mapping information and the current design data mapping table, wherein the initial state of the design data mapping table is configured to be empty;
step S3, determining whether the to-be-processed design data mapping information conforms to all constraint rules, and if so, adding the to-be-processed design data mapping information to the design data mapping table.
Compared with the prior art, the invention has obvious advantages and beneficial effects. By means of the technical scheme, the design data mapping relation construction system provided by the invention can achieve considerable technical progress and practicability, has wide industrial utilization value and at least has the following advantages:
the invention establishes the matching mapping relation among different design data, thereby realizing the connectivity check of system-level interconnection and improving the accuracy and efficiency of design data detection.
The foregoing description is only an overview of the technical solutions of the present invention, and in order to make the technical means of the present invention more clearly understood, the present invention may be implemented in accordance with the content of the description, and in order to make the above and other objects, features, and advantages of the present invention more clearly understood, the following preferred embodiments are described in detail with reference to the accompanying drawings.
Drawings
Fig. 1 is a schematic diagram of a design data mapping relationship construction system according to an embodiment of the present invention.
Detailed Description
To further illustrate the technical means and effects of the present invention adopted to achieve the predetermined objects, the following detailed description will be given to a specific embodiment of a design data mapping relationship construction system and its effects according to the present invention with reference to the accompanying drawings and preferred embodiments.
An embodiment of the present invention provides a design data mapping relationship building system, as shown in fig. 1, including a user input interface, a pre-established constraint rule base, a pre-configured mapping data structure, a processor, and a memory storing a computer program. The constraint rule base is used for storing the design type mapping constraint rules of the father node and the child nodes and the design level constraint rules of the father node and the child nodes, and the mapping relation meeting all the constraint rules in the constraint rule base can be established. The mapping data structure comprises a father node data segment and a child node data segment, the father node data segment comprises a father node design data name data segment, a father node component name data segment and a father node level data segment, and the child node design data name data segment comprises a child node design data name data segment, a child node component name data segment and a child node level data segment. The design data name is generally set by a corresponding vendor, for example, pkg _ design, hbm _ info, and the corresponding design data type can be determined based on the design data name.
When the processor executes the computer program, the following steps are implemented:
step S1, acquiring user input data based on the user input interface, and generating to-be-processed design data mapping information according to the mapping data structure;
step S2, calling the constraint rule base based on the to-be-processed design data mapping information and the current design data mapping table, wherein the initial state of the design data mapping table is configured to be empty;
step S3, determining whether the to-be-processed design data mapping information conforms to all constraint rules, and if so, adding the to-be-processed design data mapping information to the design data mapping table.
It can be understood that the design data mapping table obtained after all the to-be-processed design data mapping information is processed is the design data mapping relationship to be established, that is, the logical relationship of the design data is established, and based on the mapping relationship, the connectivity check of system-level interconnection can be realized, and the accuracy and efficiency of the design data detection are improved.
As an embodiment, the design data names, the component names, and the corresponding hierarchical information corresponding to all the design data may be obtained in advance from the design data information published by each manufacturer. The system also comprises a database used for storing design parameter sets of different design data, wherein the design parameter sets comprise design data names, component name sets corresponding to the design data names, and level sets corresponding to the component names.
The generation of pending design data mapping information based on user input is described below by two embodiments:
the first embodiment,
The step S1 includes:
step S11, receiving node design data name information input by a user based on the user input interface, wherein the node is a father node or a son node;
step S12, presenting a corresponding node component name set on the user input interface based on the node design data name information, and determining a component name according to a component name selection instruction input by a user;
step S13, presenting a corresponding node hierarchy set on the user input interface based on the determined component names, and determining hierarchy information according to a hierarchy selection instruction input by a user;
and step S14, generating to-be-processed design data mapping information according to the mapping data structure based on the design data name information, the component name and the level information corresponding to the node.
Based on the pre-constructed database, corresponding candidate information can be presented for the user, so that the user can input conveniently, and the construction efficiency of the mapping relation is improved. The first embodiment may be applied to the construction of the design data mapping relationship in a state where the design data mapping table is not empty or empty.
Example II,
To further facilitate the user to construct the design data mapping relationship, if the design data mapping table is not empty, the step S1 includes:
step S15, receiving a node dragging instruction input by a user based on the user input interface;
it should be noted that the dragging instruction may directly drag all mapping links under a certain node to another node, and after the dragging is finished, the related names of the parent node and the child node are determined, and no further input by the user is required. The flexibility and the efficiency of constructing and designing the data mapping relation by the user are improved.
Step S16, determining design data name information corresponding to the current parent node and design data name information corresponding to the current child node according to the node dragging instruction;
step S17, presenting a corresponding node component name set on the user input interface based on the name information of the current node design data, and determining component names according to component name selection instructions input by a user, wherein the current node comprises a current father node and a current child node;
step S18, presenting a corresponding node hierarchy set on the user input interface based on the determined component names, and determining hierarchy information according to a hierarchy selection instruction input by a user;
and step S19, generating to-be-processed design data mapping information according to the mapping data structure based on the design data name information, the component name and the level information corresponding to the current node.
It is understood that the second embodiment is only applicable to the application scenario in which a part of the design data mapping information has been constructed.
As an example, the step S3 includes:
step S31, obtaining father node design data type information and child node design data type information from the to-be-processed design data mapping information, judging whether the corresponding relation between the father node design data type information and the child node design data type information accords with the father node and child node design type mapping constraint rule, if so, executing step S32, otherwise, executing step S33;
the design data types specifically include an IC (integrated Circuit) type, a Package carrier (Interposer) type, a Package (Package) type, a Printed Circuit Board (PCB) type, and the like.
Step S32, obtaining the name and the hierarchy information of a father node component and the hierarchy information of a child node component from the mapping information of the design data to be processed, searching the current design data mapping table, judging whether the multilevel interconnection relationship after the current mapping information of the design data to be processed is added into the current design data mapping table meets the design hierarchy constraint rule of the father node and the child node, if so, adding the mapping information of the design data to be processed into the design data mapping table, otherwise, executing the step S33;
and step S33, generating corresponding error prompting information.
Through the steps S31-S32, corresponding design data mapping relations are constructed for the to-be-processed design data mapping information which accords with the design type mapping constraint rules of the parent nodes and the child nodes and the design level constraint rules of the parent nodes and the child nodes, and if the to-be-processed design data mapping information does not accord with the constraint rules, a user is prompted to be incapable of constructing the to-be-processed design data mapping relations.
As an embodiment, the parent node and child node design type mapping constraint rule includes at least one of the following constraint rules:
when the IC type component is used as a child node, the corresponding father node is set as an Interposer type component, a Package type component or a PCB type component;
when the Interposer type component is used as a child node, the corresponding father node is set as a PCB type component, an Interposer type component or a Package type component;
when the Package type component is used as a child node, the corresponding father node is set as a Package type component or a PCB type component;
when the PCB type component is used as a child node, the corresponding father node is set as the PCB type component.
It can be understood that the above parent node and child node design type mapping constraint rules are selected according to specific application scenarios, and preferably, all the above constraint rules are selected as the parent node and child node design type mapping constraint rules.
As an embodiment, the parent node and child node design level constraint rule comprises:
any level of all design type components can be used for constructing a mapping relation;
all the design type components are allowed to build a mapping relation once or for multiple times;
except for the condition that only one Interpose type component is included during importing of the Interpose design, the hierarchical relationship between any two components is allowed to appear only once, in the design data mapping table, the child component is not allowed to appear in any parent component set of the parent component, the parent component is not allowed to appear in any child component set of the child component, and the constraint rule can effectively avoid the mapping link from appearing in self-circulation.
As an embodiment, the father node data segment further includes a father node turning identification data segment and a father node mirror image identification data segment, the child node data segment includes a child node turning identification data segment and a child node mirror image identification data segment, and the turning identification data segment is used to identify whether the node design data is turned over, for example, when the turning identification data segment is identified as 1, it indicates that the node design data is turned over, and when the turning identification data segment is identified as 0, the node design data is not turned over. The mirror image identification data segment is used for identifying whether the node design data is mirror image, for example, when the mirror image identification data segment is identified as 1, it indicates that the design data is mirror image, and when the mirror image identification data segment is 0, it indicates that no mirror image is generated. The design level constraint rule of the parent node and the child node further comprises: and if the design data corresponding to the father node and the child node are in an inverted state or a mirror state, interconnection is allowed according to an actual assembly mode.
As an embodiment, if the components are in an inverted state or a mirror state, interconnection according to an actual assembly manner is allowed, which may specifically include:
the Package design data is not flipped or mirrored, the Bottom layer of the Package design data is interconnected with the Top layer of the PCB design data,
if the Package design of the Package design data is turned over, the Top layer of the Package design data is interconnected with the Top layer of the PCB design data,
if the Package design data is mirrored, the Bottom layer of the Package design is interconnected with the Bottom layer of the PCB design data.
Wherein, the Top layer and the Bottom layer both represent the hierarchical names of the corresponding components.
The system provided by the embodiment of the invention can accurately and quickly establish the matching mapping relation between different design data based on the constraint rule base, thereby realizing the connectivity check of system-level interconnection and improving the accuracy and efficiency of design data detection.
After the matching mapping relationship between different design data is established, the physical connection relationship between different design data can be further established to realize the detection of the connectivity of components and parts between different design data, specifically, as an embodiment, the system further comprises a pre-established coordinate system,
step C1, importing a plurality of design data to be processed into the coordinate system, wherein each design data to be processed comprises at least one component data, the component data comprises a design data name, a component original coordinate, component pin information, component shape information, component state information and component level information, the component state information comprises a turning state identifier and a rotating state identifier, and the pin information comprises a pin (pin) name and network (net) name information;
where the design data name is generally set by a corresponding vendor, e.g., pkg _ design, hbm _ info, the corresponding design data type can be determined based on the design data name. When some components are introduced, the components may be in a turning or rotating state, or subsequently need to be rotated or turned in the connection establishing process, and therefore the components are identified through the turning state identification and the rotating state identification. It can be understood that the units of the original coordinates of the components involved in the difference may be different, and therefore, the original coordinates of the components involved in the difference can be uniformly converted into the coordinate units corresponding to the coordinate system, which is convenient for subsequently moving the components to the target position. A design data may generally include a plurality of components, and a component may include a plurality of pins and a plurality of levels, and a pin may establish a physical connection with pins of other components at each level, and the network is an attribute information in the pin.
Step C2, selecting design data names, component names and component level information corresponding to a father node and a child node based on a first input instruction acquired by the user input interface, and establishing a design data mapping table according to the constraint rule base, wherein the design data mapping table comprises at least one design data link, and the design data link comprises components and levels of different design data;
the step C2 is specifically implemented based on the steps S1 to S3, and the step C2 may establish a mapping relationship of the design data, that is, a logical relationship of the design data is established. The first input instruction is used for constructing corresponding relations among different design data components and levels and comprises a design data name selection instruction, a component name selection instruction and a component level information selection instruction which correspond to a father node and a son node, and a design data name candidate set, a component name candidate set and a component level information candidate set are generated based on to-be-processed design data stored in the database.
Step C3, receiving a second input instruction acquired by the user input interface to perform moving, turning and/or rotating operations on the components, arranging the components at corresponding target positions in the coordinate system, and establishing physical connection among the components;
wherein, the physical connection between the components can be established through the step C3. The second input instruction comprises a moving instruction, a turning instruction, a rotating instruction and a component connection mode, wherein the component connection mode comprises a component pin corresponding mode, a component coordinate corresponding mode, a component center corresponding mode and the like.
And step C4, generating component connectivity detection data among different design data according to the design data mapping table and the physical connection among the components.
It should be noted that the order of step C1, step C2, and step C3 may be interchanged, for example, the physical connection of the components may be established first, and then the mapping relationship of the design data may be established, and all the design data may not be imported at once in step C1, but a part of the design data may be imported first, steps C2 and C3 may be executed, and then other design data may be imported, and then steps C2 and C3 may be executed.
The embodiment of the invention establishes the matching mapping relation between different design data and the physical connection relation between components, realizes the component connectivity check between different design data interconnected at a system level, improves the accuracy and efficiency of design data detection and reduces the defect rate of design.
As an example, the step C1 includes:
step C11, importing and storing the design data to be processed into a database corresponding to the coordinate system, and placing components on the origin of the coordinate system;
and the components are placed at the origin of the coordinate system in the initial state, so that the subsequent components can be moved conveniently.
And step C12, generating corresponding target coordinates based on the original coordinates of each component and the corresponding relation between the original coordinate units and the coordinate system units.
And converting the original coordinates of all the components into uniform target coordinates conforming to the coordinate system, so as to establish the physical connection relationship between the components.
As an embodiment, if the component connection mode corresponding to the second input command is a component center corresponding mode, that is, a component center-to-component center mode, the step C3 includes:
step C31, moving, turning and/or rotating the first component according to the second input instruction, and setting the first component at the corresponding target position in the coordinate system;
and step C32, moving, overturning and/or rotating the second component according to the second input instruction, and setting the center of the second component at the center of the first component to establish the physical connection between the first component and the second component.
It should be noted that the first component and the second component are components corresponding to two design data required to establish a physical connection relationship, and any one of the components may be used as the first component or the second component. The arrangement positions of the components and information such as physical connection relations required to be established among the components are known in advance through related data.
As an embodiment, if the component connection mode corresponding to the second input command is a component coordinate corresponding mode, that is, a component coordinate-to-component coordinate mode, the step C3 includes:
step C33, moving, turning and/or rotating the first component according to the second input instruction, and setting the first component at the corresponding target coordinate position in the coordinate system;
and step C34, executing moving, turning and/or rotating operations on the second component according to the second input instruction, moving the second component to the target coordinate position of the first component, and establishing the physical connection between the first component and the second component.
As an embodiment, if the component connection mode corresponding to the second input command is a component pin corresponding mode, that is, the component pin to component pin mode, the step C3 includes:
step C35, moving, turning and/or rotating the first component according to the second input instruction, setting the first component at a corresponding target position in the coordinate system, and selecting one pin from the first component as a first target pin;
and step C36, selecting a second target pin which needs to establish physical connection with the first target pin from the second component, executing moving, turning and/or rotating operations on the first component according to the second input instruction, moving the second target pin to the position of the first target pin, and establishing the physical connection between the first component and the second component.
It will be appreciated that two or more target pins may also be selected to establish a physical connection.
After the physical relationship between the components is established, the corresponding relationship between the pins may be various, for example, the center of a circular pin corresponds to the center of a hexagonal pin, which means that the two pins can be in a connected state. For another example, an octagonal tube pin region includes four round region pins, and the centers of the four round region pins are not overlapped with the center of the octagonal tube pin, so that multiple device connectivity detection data generation modes can be set, and the device connectivity detection data generation method is suitable for the connectivity modes of different pins, thereby improving the accuracy of connectivity detection.
As an embodiment, if the currently selected connectivity check mode is the pin center mapping mode, the step C4 includes:
step C41, traversing all corresponding components with physical connection relation based on all design data links in the design data mapping table;
step C42, obtaining a pin center of the component and a pin name and pin network information corresponding to the pin center of the component;
and step C43, generating a connectivity detection report based on the pin names and the pin network information acquired by all the design data links, and outputting the connectivity detection report to the user input interface for presentation.
As an embodiment, if the currently selected connectivity check mode is the pin area mapping mode, the step C4 includes:
step C44, traversing all corresponding components with physical connection relation based on all design data links in the design data mapping table;
step C45, acquiring corresponding pin names and pin network information of all second component pin centers in the first component pin area;
and step C46, generating a connectivity detection report based on the pin names and the pin network information acquired by all the design data links, and outputting the connectivity detection report to the user input interface for presentation.
It should be noted that the first component and the second component are components corresponding to two design data required to establish a physical connection relationship, and any one of the components may be used as the first component or the second component.
In embodiments of the invention, some exemplary embodiments are described as processes or methods depicted as flowcharts, and although the flowcharts describe steps as sequential processes, many of the steps may be performed in parallel, concurrently or simultaneously. In addition, the order of some of the steps may be rearranged. A process may be terminated when its operations are completed, but may have additional steps not included in the figure. A process may correspond to a method, a function, a procedure, a subroutine, a subprogram, etc.
Although the present invention has been described with reference to a preferred embodiment, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (8)
1. A design data mapping relationship construction system is characterized in that,
the system comprises a user input interface, a pre-established constraint rule base, a pre-configured mapping data structure, a processor and a memory for storing a computer program, wherein the constraint rule base is used for storing design type mapping constraint rules of a father node and a child node and design level constraint rules of the father node and the child node; the mapping data structure comprises a father node data segment and a son node data segment, the father node data segment comprises a father node design data name data segment, a father node component name data segment and a father node level data segment, the son node design data name data segment comprises a son node design data name data segment, a son node component name data segment and a son node level data segment, and when the processor executes the computer program, the following steps are realized:
step S1, acquiring user input data based on the user input interface, and generating to-be-processed design data mapping information according to the mapping data structure;
step S2, calling the constraint rule base based on the to-be-processed design data mapping information and the current design data mapping table, wherein the initial state of the design data mapping table is configured to be empty;
step S3, determining whether the to-be-processed design data mapping information conforms to all constraint rules, and if so, adding the to-be-processed design data mapping information to the design data mapping table.
2. The system of claim 1,
the step S3 includes:
step S31, obtaining father node design data type information and child node design data type information from the to-be-processed design data mapping information, judging whether the corresponding relation between the father node design data type information and the child node design data type information accords with the father node and child node design type mapping constraint rule, if so, executing step S32, otherwise, executing step S33;
step S32, obtaining the name and the hierarchy information of a father node component and the hierarchy information of a child node component from the mapping information of the design data to be processed, searching the current design data mapping table, judging whether the multilevel interconnection relationship after the current mapping information of the design data to be processed is added into the current design data mapping table meets the design hierarchy constraint rule of the father node and the child node, if so, adding the mapping information of the design data to be processed into the design data mapping table, otherwise, executing the step S33;
and step S33, generating corresponding error prompting information.
3. The system according to claim 1 or 2,
the parent node and child node design type mapping constraint rule comprises at least one of the following constraint rules:
when the IC type component is used as a child node, the corresponding father node is set as an Interposer type component, a Package type component or a PCB type component;
when the Interposer type component is used as a child node, the corresponding father node is set as a PCB type component, an Interposer type component or a Package type component;
when the Package type component is used as a child node, the corresponding father node is set as a Package type component or a PCB type component;
when the PCB type component is used as a child node, the corresponding father node is set as the PCB type component.
4. The system of claim 3,
the design level constraint rule of the parent node and the child node comprises the following steps:
any level of all design type components can be used for constructing a mapping relation;
all the design type components are allowed to build a mapping relation once or for multiple times;
except for the condition that an Interpose design is imported, the hierarchical relationship between any two components is allowed to appear only once under the condition that only one Interpose type component is included, in the design data mapping table, a child component is not allowed to appear in any parent component set of a parent component, and a parent component is not allowed to appear in any child component set of the child component.
5. The system according to claim 1 or 2,
the father node data segment further comprises a father node turning identification data segment and a father node mirror image identification data segment, the child node data segment comprises a child node turning identification data segment and a child node mirror image identification data segment, the turning identification data segment is used for identifying whether the node design data are turned over or not, the mirror image identification data segment is used for identifying whether the node design data are mirrored or not, and the father node and child node design level constraint rules further comprise:
and if the design data corresponding to the father node and the child node are in an inverted state or a mirror state, interconnection is allowed according to an actual assembly mode.
6. The system of claim 5,
if the components and parts are upset state or mirror image state, allow to interconnect according to actual assembly mode, specifically include:
the Package design data is not flipped or mirrored, the Bottom layer of the Package design data is interconnected with the Top layer of the PCB design data,
if the Package design of the Package design data is turned over, the Top layer of the Package design data is interconnected with the Top layer of the PCB design data,
if the Package design data is mirrored, the Bottom layer of the Package design is interconnected with the Bottom layer of the PCB design data.
7. The system of claim 1,
the system also comprises a database used for storing design parameter sets of different design data, wherein the design parameter sets comprise design data names, component name sets corresponding to the design data names, and level sets corresponding to the component names.
8. The system of claim 7,
the step S1 includes:
step S11, receiving node design data name information input by a user based on the user input interface, wherein the node is a father node or a son node;
step S12, presenting a corresponding node component name set on the user input interface based on the node design data name information, and determining a component name according to a component name selection instruction input by a user;
step S13, presenting a corresponding node hierarchy set on the user input interface based on the determined component names, and determining hierarchy information according to a hierarchy selection instruction input by a user;
and step S14, generating to-be-processed design data mapping information according to the mapping data structure based on the design data name information, the component name and the level information corresponding to the node.
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| CN114330200A (en) * | 2022-03-15 | 2022-04-12 | 北京云枢创新软件技术有限公司 | Data processing system for very large scale circuit design partitioning |
| CN114997103A (en) * | 2022-07-18 | 2022-09-02 | 北京云枢创新软件技术有限公司 | One-to-many component connectivity detection system based on interconnection design data |
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