CN113923894A - Super-flatness PCB manufacturing method for chip testing and PCB - Google Patents
Super-flatness PCB manufacturing method for chip testing and PCB Download PDFInfo
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- CN113923894A CN113923894A CN202111043025.6A CN202111043025A CN113923894A CN 113923894 A CN113923894 A CN 113923894A CN 202111043025 A CN202111043025 A CN 202111043025A CN 113923894 A CN113923894 A CN 113923894A
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 42
- 238000012360 testing method Methods 0.000 title claims abstract description 33
- 238000000227 grinding Methods 0.000 claims abstract description 146
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 127
- 229910052802 copper Inorganic materials 0.000 claims abstract description 124
- 239000010949 copper Substances 0.000 claims abstract description 124
- 239000000758 substrate Substances 0.000 claims abstract description 96
- 230000003287 optical effect Effects 0.000 claims abstract description 32
- 238000005530 etching Methods 0.000 claims abstract description 25
- 238000003825 pressing Methods 0.000 claims abstract description 19
- 238000010030 laminating Methods 0.000 claims abstract description 16
- 239000000463 material Substances 0.000 claims abstract description 16
- 238000003475 lamination Methods 0.000 claims abstract description 15
- 239000010410 layer Substances 0.000 claims description 305
- 238000000034 method Methods 0.000 claims description 29
- 238000007747 plating Methods 0.000 claims description 20
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 16
- 239000011241 protective layer Substances 0.000 claims description 16
- 238000000465 moulding Methods 0.000 claims description 11
- 238000007639 printing Methods 0.000 claims description 10
- 229910000679 solder Inorganic materials 0.000 claims description 9
- 238000005553 drilling Methods 0.000 claims description 4
- 238000005498 polishing Methods 0.000 description 18
- 239000002023 wood Substances 0.000 description 17
- 238000012545 processing Methods 0.000 description 8
- 238000003860 storage Methods 0.000 description 8
- 239000002994 raw material Substances 0.000 description 7
- 239000000523 sample Substances 0.000 description 7
- 230000009286 beneficial effect Effects 0.000 description 5
- 238000003754 machining Methods 0.000 description 4
- 238000007517 polishing process Methods 0.000 description 4
- 238000003466 welding Methods 0.000 description 4
- 239000011889 copper foil Substances 0.000 description 3
- 238000009713 electroplating Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 238000005253 cladding Methods 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 239000012528 membrane Substances 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 239000011148 porous material Substances 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 239000007858 starting material Substances 0.000 description 1
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
- G01R31/2818—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP] using test structures on, or modifications of, the card under test, made for the purpose of testing, e.g. additional components or connectors
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The invention discloses a super-flatness PCB (printed circuit board) manufacturing method for chip testing and a PCB, and belongs to the technical field of PCB manufacturing. The PCB manufacturing method comprises the steps of obtaining original materials of the PCB, wherein the original materials comprise an upper plate, a lower plate, a first copper substrate, a second copper substrate, at least one core plate and at least two semi-solidified plates; placing a first optical plate layer on one side of the first copper substrate, and placing a second optical plate layer on one side of the second copper substrate; laminating the first copper substrate, the second copper substrate, the at least one core board and the at least two prepregs according to a preset first laminating layer to obtain a first inner-layer board; etching and grinding the first inner-layer plate to obtain a second inner-layer plate; pressing the second inner-layer plate, the upper-layer plate and the lower-layer plate according to a preset second pressing lamination to obtain a multilayer plate; and carrying out standardization treatment on the multilayer board to obtain the final PCB. The PCB manufacturing method can enable the PCB to meet the requirement of flatness.
Description
Technical Field
The invention relates to the technical field of PCB (printed circuit board) manufacturing, in particular to a super-flatness PCB manufacturing method for chip testing and a PCB.
Background
With the rapid development of smart electronics such as smart phones, tablet computers, PCs, internet of things and vehicle-mounted computers, higher requirements are put forward on the integration level, performance and reliability of ICs, which inevitably drives the rapid development of the semiconductor test board, which is the supporting hardware for IC testing. The semiconductor test board is used for testing the reliability and functions of a semiconductor integrated circuit before packaging (wafer), after packaging (chip) and the like in the manufacturing process, and has the characteristics of ultrahigh thickness-diameter ratio, high density, high flatness and the like.
The probe card (probe card) is an interface between a chip to be tested and a tester in a wafer test (wafer test), a test probe on the probe card is directly contacted with a bonding pad (pad) or a bump (bump) on the chip to lead out a chip signal, and then the purpose of automatic measurement is achieved by matching with a peripheral test instrument and software control. In order to ensure the continuity and integrity of the transmission of the test electrical signals, the probe heads mounted on the probe card must be ensured to be in good contact with the IC surface bonding pads, and all the probe heads after combination are required to meet certain flatness.
However, in the process of pressing the test board, due to the difference between the inner layer pattern design and the prepreg flow at different regions, the flow at the edge of the test board is much larger than that at the middle region, so that the board surface range exists after pressing, and the board thickness range will be higher along with the increase of the number of layers, and for a chip test board with a board thickness of more than 5.2mm and a pore diameter of less than or equal to 0.13mm and with a super-high thickness-diameter ratio (the thickness-diameter ratio is more than 40:1), the board thickness range can even reach 0.7mm, so that the chip test board can not be effectively contacted with a pad on the surface of the chip during subsequent chip test. Therefore, how to provide a method for manufacturing a super-flatness PCB for chip testing to solve the problem that the flatness of a testing board cannot meet the chip testing requirement due to uneven gummosis of a chip testing board becomes a technical problem to be solved urgently.
Disclosure of Invention
The invention aims to solve the problem that the flatness of a test board cannot meet the requirement of chip test due to uneven gummosis of a chip test board, and provides a super-flatness PCB (printed circuit board) manufacturing method for chip test and a PCB, so that the flatness range of the whole board is less than or equal to 100 micrometers, and the flatness of the board surface of a DUT (device under test) area is less than or equal to 50 micrometers, thereby meeting the requirement of the flatness of the chip test board.
The invention also provides a PCB manufactured by the super-flatness PCB manufacturing method.
The invention also provides electronic equipment with the PCB.
The invention also provides a computer readable storage medium.
The super-flatness PCB manufacturing method according to the embodiment of the first aspect of the invention comprises the following steps:
obtaining an original material of a PCB, wherein the original material comprises an upper plate, a lower plate, a first copper substrate, a second copper substrate, at least one core plate and at least two semi-solidified plates;
placing a first optical plate layer on one side of the first copper substrate, and placing a second optical plate layer on one side of the second copper substrate;
laminating the first copper substrate, the second copper substrate, the at least one core board and the at least two prepregs according to a preset first laminating lamination to obtain a first inner-layer board;
etching and grinding the first inner-layer plate to obtain a second inner-layer plate, wherein the second inner-layer plate is provided with a grinding protective layer;
pressing the second inner-layer board, the upper-layer board and the lower-layer board according to a preset second pressing lamination to obtain a multilayer board;
and carrying out standardization treatment on the multilayer board to obtain the final PCB.
The super-flatness PCB manufacturing method provided by the embodiment of the invention at least has the following beneficial effects: according to the super-flatness PCB manufacturing method, raw materials of a PCB are obtained, a first polished plate layer is placed on one side of a first copper substrate, a second polished plate layer is placed on one side of a second copper substrate, the first copper substrate, the second copper substrate, at least one core plate and at least two semi-solidified plates are pressed to obtain a first inner layer plate, the first polished plate layer and the second polished plate layer are placed, when the first inner layer plate is etched and ground to obtain a second inner layer plate, the second inner layer plate, an upper layer plate and a lower layer plate are pressed to obtain a multilayer plate, and finally the multilayer plate is subjected to standardization processing to obtain a final PCB.
According to some embodiments of the invention, the abrasive protective layer has a thickness greater than or equal to 70 microns.
According to some embodiments of the invention, the first inner layer board includes a first abrasive side and a second abrasive side, and the etching and grinding process of the first inner layer board to obtain a second inner layer board includes:
carrying out first grinding treatment on a first grinding surface of the first inner layer plate;
and carrying out second grinding treatment on the second grinding surface of the first inner-layer plate to obtain a second inner-layer plate.
According to some embodiments of the present invention, the laminating the first copper substrate, the second copper substrate, the at least one core board, and the at least two prepregs according to a predetermined first laminated stack to obtain a first inner layer board includes:
placing one of the at least two prepregs on an upper end face of each of the core boards, and placing the other of the at least two prepregs on a lower end face of each of the core boards;
connecting one side of the first copper substrate, on which the first optical plate layer is placed, with one of the at least two prepregs, and connecting the other side of the second copper substrate, on which the second optical plate layer is placed, with the other of the at least two prepregs;
and pressing and molding the first copper substrate, the at least two prepregs, the at least one core board and the second copper substrate to obtain a first inner layer board.
According to some embodiments of the invention, the etching and grinding of the first inner layer board to obtain a second inner layer board comprises:
etching the upper end face and the lower end face of the first inner-layer plate;
and grinding the first inner-layer plate to obtain a second inner-layer plate.
According to some embodiments of the present invention, the pressing the second inner layer board, the upper layer board and the lower layer board according to a preset second pressing lamination to obtain a multilayer board, includes:
placing one prepreg between the upper plate and the second inner plate;
placing one prepreg between the lower layer board and the second inner layer board;
and pressing and molding the upper layer plate, the prepreg, the second inner layer plate and the lower layer plate to obtain the multilayer plate.
According to some embodiments of the invention, the standardizing the multilayer board to obtain a final PCB comprises:
drilling the multilayer board to form a through hole;
plating the upper end surface and the lower end surface of the multilayer board;
protecting the circuit on the multilayer board;
and printing and molding the multilayer board to obtain the final PCB.
According to some embodiments of the invention, the plating treatment of the upper and lower end surfaces of the multilayer board comprises:
carrying out copper plating treatment on the upper end face and the lower end face of the multilayer board, forming a first copper layer on a circuit on the upper end face of the multilayer board, and forming a second copper layer on the lower end face of the multilayer board;
carrying out dry film and etching treatment on the first copper layer to obtain a first outer layer circuit;
carrying out dry film and etching treatment on the second copper layer to obtain a second outer layer circuit;
carrying out tin plating treatment on the first outer layer circuit to form a first tin film protective layer;
and carrying out tin plating treatment on the second outer layer circuit to form a second tin film protective layer.
According to some embodiments of the invention, the protecting the circuit on the multilayer board comprises:
and printing solder resist ink on the upper side of the circuit on the multilayer board to form a solder resist ink layer.
According to a second aspect of the invention, there is provided a PCB manufactured according to the method of manufacturing a super-flat PCB of the first aspect.
The PCB provided by the embodiment of the invention at least has the following beneficial effects: the PCB is manufactured by the PCB manufacturing method, a first polished plate layer is placed on one side of a first copper substrate by obtaining raw materials of the PCB, a second polished plate layer is placed on one side of a second copper substrate, the first copper substrate, the second copper substrate, at least one core plate and at least two semi-solidified plates are pressed to obtain a first inner layer plate, the first inner layer plate and the second polished plate layer are placed, the second inner layer plate, an upper layer plate and a lower layer plate are pressed to obtain a multilayer plate when the first inner layer plate is etched and ground to obtain a second inner layer plate, and the multilayer plate is standardized to obtain a final PCB.
An electronic device according to an embodiment of the third aspect of the invention comprises a PCB as described in the embodiment of the second aspect.
According to the electronic equipment provided by the embodiment of the invention, at least the following beneficial effects are achieved: the PCB is made of raw materials, a first polished plate layer is placed on one side of a first copper substrate, a second polished plate layer is placed on one side of a second copper substrate, the first copper substrate, the second copper substrate, at least one core plate and at least two semi-solidified plates are pressed to obtain a first inner layer plate, the first inner layer plate and the second polished plate layer are placed, the first inner layer plate can be etched and ground to obtain a second inner layer plate, the second inner layer plate, an upper layer plate and a lower layer plate are pressed to obtain a multilayer plate, and finally the multilayer plate is subjected to standardization treatment to obtain a final PCB.
According to a fourth aspect of the present invention, there is provided a computer-readable storage medium storing computer-executable instructions for causing a computer to perform the method for fabricating a super-flatness PCB as defined in the first aspect.
The computer-readable storage medium according to the embodiment of the invention has at least the following advantages: the computer readable storage medium adopts the PCB manufacturing method, a first optical sheet layer is placed on one side of a first copper substrate by obtaining raw materials of the PCB, a second optical sheet layer is placed on one side of a second copper substrate, then the first copper substrate, the second copper substrate, at least one core board and at least two semi-solidified boards are laminated to obtain a first inner layer board, the first optical sheet layer and the second optical sheet layer are placed, when the first inner layer board is etched and ground to obtain a second inner layer board, then the second inner layer board, an upper layer board and a lower layer board are laminated to obtain a multilayer board, and finally the multilayer board is standardized to obtain the final PCB.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
The invention is further described with reference to the following figures and examples, in which:
FIG. 1 is a flow chart of a method for fabricating a super-flatness PCB according to an embodiment of the present invention;
FIG. 2 is a flow chart of a method of fabricating a super-flatness PCB according to another embodiment of the present invention;
FIG. 3 is a flow chart of a method of fabricating a super-flatness PCB according to another embodiment of the present invention;
FIG. 4 is a flow chart of a method of fabricating a super-flatness PCB according to another embodiment of the present invention;
FIG. 5 is a flow chart of a method of fabricating a super-flatness PCB according to another embodiment of the present invention;
FIG. 6 is a flow chart of a method of fabricating a super-flatness PCB according to another embodiment of the present invention;
fig. 7 is a schematic diagram of a PCB manufacturing process of a super-flatness PCB manufacturing method according to another embodiment of the present invention.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention.
In the description of the present invention, it should be understood that the orientation or positional relationship referred to in the description of the orientation, such as the upper, lower, front, rear, left, right, etc., is based on the orientation or positional relationship shown in the drawings, and is only for convenience of description and simplification of description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention.
In the description of the present invention, the meaning of a plurality is one or more, the meaning of a plurality is two or more, and the above, below, exceeding, etc. are understood as excluding the present numbers, and the above, below, within, etc. are understood as including the present numbers. If the first and second are described for the purpose of distinguishing technical features, they are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated or implicitly indicating the precedence of the technical features indicated.
In the description of the present invention, unless otherwise explicitly limited, terms such as arrangement, installation, connection and the like should be understood in a broad sense, and those skilled in the art can reasonably determine the specific meanings of the above terms in the present invention in combination with the specific contents of the technical solutions.
In the description of the present invention, reference to the description of the terms "one embodiment," "some embodiments," "an illustrative embodiment," "an example," "a specific example," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
In a first aspect, referring to fig. 1, a method for manufacturing a super-flatness PCB according to an embodiment of the present invention includes:
s100, obtaining an original material of the PCB, wherein the original material comprises an upper plate, a lower plate, a first copper substrate, a second copper substrate, at least one core plate and at least two semi-solidified plates;
s200, placing a first optical plate layer on one side of a first copper substrate, and placing a second optical plate layer on one side of a second copper substrate;
s300, laminating the first copper substrate, the second copper substrate, the at least one core board and the at least two prepregs according to a preset first laminating lamination to obtain a first inner-layer board;
s400, etching and grinding the first inner-layer plate to obtain a second inner-layer plate, wherein the second inner-layer plate is provided with a grinding protective layer;
s500, pressing a second inner-layer board, an upper-layer board and a lower-layer board according to a preset second pressing lamination layer to obtain a multilayer board;
s600, carrying out standardization processing on the multilayer board to obtain the final PCB.
In the super roughness PCB's manufacturing process, at first acquire PCB's virgin material, wherein, virgin material includes top plate, lower plate, first copper base plate, second copper base plate, at least one core and two at least prepregs, places first unthreaded board layer in one side of first copper base plate, places the second unthreaded board layer in one side of second copper base plate, and the thickness of first unthreaded board layer and second unthreaded board layer can set up according to actual conditions, does not do the restriction. The polishing buffer layer includes a first copper substrate, a second copper substrate, a first optical plate layer, and a second optical plate layer, and includes others, but is not limited thereto. In some embodiments, the abrasive buffer layer has a thickness of between 1000 microns and 2000 microns. When the grinding buffer layer is ground, the grinding buffer layer can be subjected to rough grinding treatment according to a preset first grinding thickness so as to improve the grinding speed, and after the thickness of the grinding buffer layer is smaller than the preset first grinding thickness, the grinding buffer layer is subjected to fine grinding treatment in order to improve the grinding accuracy. The lower layer board in the starting material may be an outer layer copper foil, or may be other, and is not limited thereto. And then, according to a preset first lamination, carrying out lamination treatment on the first copper substrate, the second copper substrate, the at least one core board and the at least two prepregs to obtain a first inner layer board, and carrying out etching and grinding treatment on the first inner layer board to obtain a second inner layer board. In order to protect the circuit pattern on the PCB, a polishing boundary line, a polishing boundary point, and the like are preset when the first inner layer board is polished, so that a certain polishing margin is maintained in the polishing process of the first inner layer board, and thus, polishing protection layers are formed on both end surfaces of the second inner layer board. For example, when the middle area of the first inner-layer plate is ground, when a preset grinding boundary line and a grinding boundary point are reached, the grinding is stopped, so that grinding buffer layers formed by the first copper substrate and the second copper substrate on the upper end face and the lower end face of the first inner-layer plate cannot be completely ground, and thin grinding buffer layers (namely grinding protective layers) are still reserved on the two end faces of the first inner-layer plate after grinding treatment through the preset grinding boundary line and the grinding boundary point, so that the circuit patterns on the PCB can be prevented from being exposed through the grinding protective layers, and the circuit patterns on the PCB are protected. Further, the thickness of the polishing protection layer is greater than or equal to 70 μm, and it should be understood that the distance between the polishing boundary line and the surface of the core board, i.e. the distance between each polishing boundary point on the polishing boundary line and the surface of the core board, can be calculated, and the minimum distance is taken as the minimum thickness of the polishing protection layer, for example, the minimum thickness is the minimum value of the linear distance between each polishing boundary point and the most protruding position of the surface of the core board. It should be noted that the first inner layer plate includes a first polishing surface and a second polishing surface, and when the first inner layer plate is polished, the first polishing surface is subjected to a first polishing process, and the second polishing surface is subjected to a second polishing process, so that the second inner layer plate is obtained. Specifically, in order to keep grinding the roughness, reduce the influence of operation panel unevenness to grinding, at the grinding in-process, the machine of grinding carries out first abrasive machining to the first abrasive surface of first inner plate earlier, then carries out upset processing to first inner plate, carries out second abrasive machining to the second abrasive surface of first inner plate for can both fully grind the first abrasive surface and the second abrasive surface of first inner plate. After the first grinding treatment is performed on the first grinding surface of the first inner-layer plate, in the process of turning the first inner-layer plate, the first inner-layer plate in a horizontal state can be turned leftwards or rightwards or upwards or downwards, so that the second grinding treatment is performed on the second grinding surface by the grinding machine to obtain a second inner-layer plate. In order to improve the grinding speed and the grinding precision, the grinding cushion layer may be subjected to rough grinding treatment according to a preset first grinding thickness when the grinding cushion layer on the first grinding surface and the grinding cushion layer on the second grinding surface are ground, so as to improve the grinding speed, and after the thickness of the grinding cushion layer is smaller than the preset first grinding thickness, the grinding cushion layer may be subjected to fine grinding treatment in order to improve the grinding precision. In particular, in order to improve the grinding accuracy and reduce the grinding error caused by the external environment, the first inner plate is kept in a horizontal state, then the grinding surface (which can be a first grinding surface) facing upward of the first inner plate is ground by a grinding machine, the first inner plate is further turned leftwards or rightwards, so that the other grinding surface (which can be a second grinding surface) of the first inner plate faces upward, the grinding surface is ground, then the first inner plate is turned upwards or downwards, so that the first inner plate returns to the initial horizontal state (namely the grinding surface facing upward initially still faces upward, and the grinding surface facing downward initially faces downward), the process of turning grinding is repeated until the thicknesses of the grinding buffer layer on the first grinding surface and the grinding buffer layer on the second grinding surface both meet the requirements, and stopping grinding to obtain a second inner layer plate. This kind of grinding mode can all grind fully to the first abrasive surface and the second abrasive surface of first inner plate, improves and grinds the accuracy, has reduced the grinding error that external environment caused. And laminating the second inner layer board, the upper layer board and the lower layer board according to a preset second laminating lamination to obtain a multilayer board, specifically, placing a prepreg between the upper layer board and the second inner layer board, placing a prepreg between the lower layer board and the second inner layer board, laminating and molding the upper layer board, the prepreg, the second inner layer board and the lower layer board to obtain the multilayer board, so as to perform standardized treatment on the multilayer board, for example, drilling, plating, protection treatment and the like on the multilayer board, and finally, performing printing and molding to obtain a final PCB.
Referring to fig. 2, in some embodiments, step S300 includes:
s310, placing one of the at least two prepregs on the upper end face of each core board, and placing the other one of the at least two prepregs on the lower end face of each core board;
s320, connecting one side, on which the first optical plate layer is placed, of the first copper substrate with one of the at least two prepregs, and connecting the other side, on which the second optical plate layer is placed, of the second copper substrate with the other of the at least two prepregs;
s330, the first copper substrate, the at least two semi-curing plates, the at least one core plate and the second copper substrate are pressed and molded to obtain a first inner layer plate.
In the process of manufacturing the inner layer board of the PCB, one of the at least two prepregs is placed on the upper end surface of each core board, and the other of the at least two prepregs is placed on the lower end surface of each core board. The core board is generally used as a conductive medium of the PCB, and both sides of the core board are generally provided with copper layers. Connecting one side of a first copper substrate, on which a first optical plate layer is placed, with one of at least two prepregs, connecting the other side of a second copper substrate, on which a second optical plate layer is placed, with the other of the at least two prepregs, specifically, laminating, developing, exposing and etching the lower end face of the first copper substrate, removing the film to obtain a first inner-layer circuit formed in a hollowed-out manner, laminating, developing, exposing and etching the upper end face of the second copper substrate, and removing the film to obtain a second inner-layer circuit formed in a hollowed-out manner, so that one side of the first copper substrate, on which the first optical plate layer is placed, is tightly connected with one of the at least two prepregs, and one side of the second copper substrate, on which the second optical plate layer is placed, is tightly connected with the other of the at least two prepregs, thereby tightly pressing the first copper substrate, the at least two prepregs, the at least one core plate and the second copper substrate together, the first inner layer board is obtained, and the final PCB can meet the requirement of flatness by the super-flatness PCB manufacturing method.
Referring to fig. 3, in some embodiments, step S400 includes:
s410, etching the upper end face and the lower end face of the first inner-layer plate;
and S420, grinding the first inner-layer plate to obtain a second inner-layer plate.
And after the first inner layer plate is obtained, etching the upper end face and the lower end face of the first inner layer plate, and grinding the first inner layer plate to obtain a second inner layer plate.
Referring to fig. 4, in some embodiments, step S500 includes:
s510, placing a prepreg between the upper plate and the second inner plate;
s520, placing a prepreg between the lower layer plate and the second inner layer plate;
and S530, pressing and molding the upper layer plate, the prepreg, the second inner layer plate and the lower layer plate to obtain the multilayer plate.
In the in-process of preparation PCB multiply wood, in order to further improve PCB's roughness, place a prepreg between upper plate and second inner plate, place a prepreg between lower plate and second inner plate, make upper plate, second inner plate and lower floor's board can be inseparabler link together like this, then with upper plate, prepreg, second inner plate and lower floor's board press-fit molding, can conveniently obtain the multiply wood that accords with the roughness requirement like this.
Referring to fig. 5, in some embodiments, step S600 includes:
s610, drilling the multilayer board to form a through hole;
s620, performing plating treatment on the upper end face and the lower end face of the multilayer board;
s630, performing protection processing on the circuit on the multilayer board;
and S640, printing and molding the multilayer board to obtain the final PCB.
After obtaining the multiply wood of PCB, still need carry out standardized processing to the multiply wood, bore the multiply wood promptly, form the through-hole, carry out cladding process to the upper and lower terminal surface of multiply wood, for example can carry out copper facing to the upper and lower terminal surface of multiply wood, tin-plating treatment etc., can play certain guard action to the multiply wood like this, furthermore, in order to prevent that PCB from taking place the short circuit when the in-service use, can also protect the circuit on the multiply wood and handle, for example, can prevent soldering ink etc. in the circuit top printing of multiply wood, thereby prevent the short circuit that causes when the PCB welds, at last with multiply wood printing forming, according to finished product PCB's structure mould appearance, after handling and testing the multiply wood, obtain the PCB that accords with the requirement, make the PCB who produces like this and satisfy the roughness requirement.
Referring to fig. 6, in some embodiments, step S620, includes:
s621, carrying out copper plating treatment on the upper end face and the lower end face of the multilayer board, forming a first copper layer on the circuit on the upper end face of the multilayer board, and forming a second copper layer on the lower end face of the multilayer board;
s622, carrying out dry film and etching treatment on the first copper layer to obtain a first outer layer circuit;
s623, performing dry film and etching treatment on the second copper layer to obtain a second outer layer circuit;
s624, carrying out tin plating treatment on the first outer layer circuit to form a first tin film protective layer;
and S625, carrying out tin plating treatment on the second outer layer circuit to form a second tin film protective layer.
When carrying out cladding process to the upper and lower both ends face of multiply wood, carry out the copper electroplating to the both ends face about the multiply wood respectively, form first copper layer on the circuit of the up end at the multiply wood, form the second copper layer at the lower terminal surface of multiply wood, carry out dry film and etching on first copper layer surface and handle, obtain first outer circuit, carry out dry film and etching at the second copper layer and handle, obtain the second outer circuit, carry out the electrotinplate on first outer circuit, thereby cover and form first tin membrane protective layer on first outer circuit, carry out the electrotinplate on the second outer circuit, thereby cover and form second tin membrane protective layer on second outer circuit, can play certain guard action to the multiply wood like this, improve PCB's safety in utilization.
It should be noted that in some other embodiments, other materials and other methods may be used for plating, and the plating is not limited to copper plating and tin plating.
In some embodiments, step S630, comprises:
and printing solder resist ink on the upper side of the circuit on the multilayer board to form a solder resist ink layer.
In order to prevent the PCB from causing short circuit during welding, the upper sides of the first outer layer circuit and the second outer layer circuit are printed with a layer of uniform solder resist ink respectively, and a first solder resist ink layer can be formed after vacuum defoaming, so that the short circuit of the PCB during welding can be effectively avoided.
It should be noted that in some other embodiments, other methods and other materials may also be used to perform solder mask processing on the multi-layer board, so as to avoid short circuit of the PCB during soldering and improve the safety of the PCB in use.
Referring to fig. 7, in the process of manufacturing the PCB, firstly, an original material of the PCB is obtained, wherein the original material includes an upper board, a lower board, a first copper substrate, a second copper substrate, a plurality of core boards and a plurality of prepregs, a prepreg is placed on the upper end surface of each core board, a prepreg is placed on the lower end surface of each core board, the first copper substrate, the second copper substrate, the plurality of core boards and the plurality of prepregs are optimized in a lamination mode, a certain plane grinding allowance is reserved, a first optical sheet layer is placed on one side of the first copper substrate, a second optical sheet layer is placed on one side of the second copper substrate, then, the boards are subjected to lamination processing, in order to completely etch the outer copper foil after lamination, the lower end surface of the first copper substrate is subjected to film pasting, developing, exposure and etching, and a hollowed-out first inner layer circuit is obtained after film removal, the upper end face of the second copper substrate is subjected to film pasting, developing, exposing and etching, a second inner layer circuit formed in a hollowed-out mode is obtained after the film is removed, one side, where the first optical sheet layer is placed, of the first copper substrate is tightly connected with a prepreg, one side, where the second optical sheet layer is placed, of the second copper substrate is tightly connected with the prepreg, the first copper substrate, the prepregs, the core plates and the second copper substrate are tightly pressed together, a first inner layer plate is obtained, after the first inner layer plate is obtained, the upper end face and the lower end face of the first inner layer plate are etched, the PCB is ground to a target thickness and a target flatness by using a plane grinder, namely, the first inner layer plate is ground, and the second inner layer plate is obtained. Specifically, the first inner-layer plate comprises a first grinding surface and a second grinding surface, and when the first inner-layer plate is ground, the first grinding surface is subjected to first grinding treatment, and the second grinding surface is subjected to second grinding treatment to obtain a second inner-layer plate. Specifically, in order to keep grinding the roughness, reduce the influence of operation panel unevenness to grinding, at the grinding in-process, the machine of grinding carries out first abrasive machining to the first abrasive surface of first inner plate earlier, then carries out upset processing to first inner plate, carries out second abrasive machining to the second abrasive surface of first inner plate for can both fully grind the first abrasive surface and the second abrasive surface of first inner plate. After the first grinding treatment is performed on the first grinding surface of the first inner-layer plate, in the process of turning the first inner-layer plate, the first inner-layer plate in a horizontal state can be turned leftwards or rightwards or upwards or downwards, so that the second grinding treatment is performed on the second grinding surface by the grinding machine to obtain a second inner-layer plate. In order to improve the grinding speed and the grinding precision, the grinding cushion layer may be subjected to rough grinding treatment according to a preset first grinding thickness when the grinding cushion layer on the first grinding surface and the grinding cushion layer on the second grinding surface are ground, so as to improve the grinding speed, and after the thickness of the grinding cushion layer is smaller than the preset first grinding thickness, the grinding cushion layer may be subjected to fine grinding treatment in order to improve the grinding precision. In particular, in order to improve the grinding accuracy and reduce the grinding error caused by the external environment, the first inner plate is kept in a horizontal state, then the grinding surface (which can be a first grinding surface) facing upward of the first inner plate is ground by a grinding machine, the first inner plate is further turned leftwards or rightwards, so that the other grinding surface (which can be a second grinding surface) of the first inner plate faces upward, the grinding surface is ground, then the first inner plate is turned upwards or downwards, so that the first inner plate returns to the initial horizontal state (namely the grinding surface facing upward initially still faces upward, and the grinding surface facing downward initially faces downward), the process of turning grinding is repeated until the thicknesses of the grinding buffer layer on the first grinding surface and the grinding buffer layer on the second grinding surface both meet the requirements, and stopping grinding to obtain a second inner layer plate. This kind of grinding mode can all grind fully to the first abrasive surface and the second abrasive surface of first inner plate, improves and grinds the accuracy, has reduced the grinding error that external environment caused. In order to protect the circuit pattern on the PCB, a polishing boundary line, a polishing boundary point, and the like are preset when the first inner layer board is polished, so that a certain polishing margin is maintained during the polishing process of the first inner layer board. For example, when the middle area of the first inner-layer plate is ground, when a preset grinding boundary line and a grinding boundary point are reached, the grinding is stopped, so that the grinding buffer layer formed by the first copper substrate, the second copper substrate and the like on each grinding surface of the first inner-layer plate cannot be completely ground, and a thin grinding buffer layer (namely a grinding protective layer) is still remained after the two end surfaces of the first inner-layer plate are ground through the preset grinding boundary line and the grinding boundary point, so that the circuit pattern on the PCB can be prevented from being exposed through the grinding protective layer, and the circuit pattern on the PCB is protected. In order to further improve the planeness of the PCB, a prepreg is arranged between an upper layer board and a second inner layer board, a prepreg is arranged between a lower layer board and the second inner layer board, so that outer copper foils (and other remaining layers) are pressed together through second pressing, the upper layer board, the second inner layer board and the lower layer board 200 can be connected together more closely, then the upper layer board, the prepreg, the second inner layer board and the lower layer board are pressed into a shape to obtain a multilayer board meeting planeness requirements, then the multilayer board is drilled to form a through hole, copper electroplating and tin electroplating are carried out on the upper end surface and the lower end surface of the multilayer board, so that a certain protection effect can be achieved on the multilayer board, furthermore, in order to prevent the PCB from short circuit during welding, solder-proof ink is printed above the circuit of the multilayer board to form a solder-proof ink layer, so as to prevent the short circuit caused during welding of the PCB, and finally, according to the shape of a structural die of a finished PCB, carrying out printing, testing and other treatment on the multilayer board to obtain the PCB meeting the requirements. The flatness range of the whole plate is less than or equal to 100um, and the flatness of the plate surface of the DUT area is less than or equal to 50 um. The requirement of the IC test board for flatness is met.
In a second aspect, an embodiment of the present invention further provides a PCB manufactured by the method for manufacturing a PCB with super flatness according to the first aspect.
The PCB provided by the embodiment of the invention at least has the following beneficial effects: the PCB is manufactured by the PCB manufacturing method, a first polished plate layer is placed on one side of a first copper substrate by obtaining raw materials of the PCB, a second polished plate layer is placed on one side of a second copper substrate, the first copper substrate, the second copper substrate, at least one core plate and at least two semi-solidified plates are pressed to obtain a first inner layer plate, the first inner layer plate and the second polished plate layer are placed, the second inner layer plate, an upper layer plate and a lower layer plate are pressed to obtain a multilayer plate when the first inner layer plate is etched and ground to obtain a second inner layer plate, and the multilayer plate is standardized to obtain a final PCB.
In a third aspect, an embodiment of the present invention further provides an electronic device having the PCB of the second aspect.
According to the electronic equipment provided by the embodiment of the invention, at least the following beneficial effects are achieved: the PCB is made of raw materials, a first polished plate layer is placed on one side of a first copper substrate, a second polished plate layer is placed on one side of a second copper substrate, the first copper substrate, the second copper substrate, at least one core plate and at least two semi-solidified plates are pressed to obtain a first inner layer plate, the first inner layer plate and the second polished plate layer are placed, the first inner layer plate can be etched and ground to obtain a second inner layer plate, the second inner layer plate, an upper layer plate and a lower layer plate are pressed to obtain a multilayer plate, and finally the multilayer plate is subjected to standardization treatment to obtain a final PCB.
In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium. The computer-readable storage medium stores computer-executable instructions for causing a computer to perform the super-flatness PCB fabrication method as defined in the first aspect.
The computer-readable storage medium according to the embodiment of the invention has at least the following advantages: the computer readable storage medium adopts the PCB manufacturing method, a first optical sheet layer is placed on one side of a first copper substrate by obtaining raw materials of the PCB, a second optical sheet layer is placed on one side of a second copper substrate, then the first copper substrate, the second copper substrate, at least one core board and at least two semi-solidified boards are pressed together to obtain a first inner layer board, the first optical sheet layer and the second optical sheet layer are placed, when the first inner layer board is etched and ground to obtain a second inner layer board, then the second inner layer board, an upper layer board and a lower layer board are pressed together to obtain a multilayer board, and finally the multilayer board is standardized to obtain the final PCB.
The embodiments of the present invention have been described in detail with reference to the accompanying drawings, but the present invention is not limited to the above embodiments, and various changes can be made within the knowledge of those skilled in the art without departing from the gist of the present invention. Furthermore, the embodiments of the present invention and the features of the embodiments may be combined with each other without conflict.
Claims (10)
1. The super-flatness PCB manufacturing method for chip testing is characterized by comprising the following steps:
obtaining an original material of a PCB, wherein the original material comprises an upper plate, a lower plate, a first copper substrate, a second copper substrate, at least one core plate and at least two semi-solidified plates;
placing a first optical plate layer on one side of the first copper substrate, and placing a second optical plate layer on one side of the second copper substrate;
laminating the first copper substrate, the second copper substrate, the at least one core board and the at least two prepregs according to a preset first laminating lamination to obtain a first inner-layer board;
etching and grinding the first inner-layer plate to obtain a second inner-layer plate, wherein the second inner-layer plate is provided with a grinding protective layer;
pressing the second inner-layer board, the upper-layer board and the lower-layer board according to a preset second pressing lamination to obtain a multilayer board;
and carrying out standardization treatment on the multilayer board to obtain the final PCB.
2. The method of claim 1, wherein the grinding protection layer has a thickness greater than or equal to 70 μm.
3. The method of manufacturing a super flatness PCB as claimed in claim 1, wherein the first inner layer board includes a first ground surface and a second ground surface, and the etching and grinding process of the first inner layer board to obtain a second inner layer board includes:
carrying out first grinding treatment on a first grinding surface of the first inner layer plate;
and carrying out second grinding treatment on the second grinding surface of the first inner-layer plate to obtain a second inner-layer plate.
4. The method for manufacturing a super-flatness PCB according to claim 1, wherein the laminating the first copper substrate, the second copper substrate, the at least one core board and the at least two prepregs according to a predetermined first laminated stack to obtain a first inner layer board comprises:
placing one of the at least two prepregs on an upper end face of each of the core boards, and placing the other of the at least two prepregs on a lower end face of each of the core boards;
connecting one side of the first copper substrate, on which the first optical plate layer is placed, with one of the at least two prepregs, and connecting the other side of the second copper substrate, on which the second optical plate layer is placed, with the other of the at least two prepregs;
and pressing and molding the first copper substrate, the at least two prepregs, the at least one core board and the second copper substrate to obtain a first inner layer board.
5. The method of claim 1, wherein the etching and grinding the first inner layer board to obtain a second inner layer board comprises:
etching the upper end face and the lower end face of the first inner-layer plate;
and grinding the first inner-layer plate to obtain a second inner-layer plate.
6. The method for manufacturing a super-flatness PCB according to claim 1, wherein the step of laminating the second inner board, the upper board and the lower board according to a predetermined second laminated lamination layer to obtain a multilayer board comprises:
placing one prepreg between the upper plate and the second inner plate;
placing one prepreg between the lower layer board and the second inner layer board;
and pressing and molding the upper layer plate, the prepreg, the second inner layer plate and the lower layer plate to obtain the multilayer plate.
7. The method for manufacturing a super-flatness PCB according to any one of claims 1 to 6, wherein the step of standardizing the multilayer board to obtain a final PCB comprises the following steps:
drilling the multilayer board to form a through hole;
plating the upper end surface and the lower end surface of the multilayer board;
protecting the circuit on the multilayer board;
and printing and molding the multilayer board to obtain the final PCB.
8. The method for manufacturing a super-flatness PCB according to claim 7, wherein the step of plating the upper and lower end surfaces of the multi-layer board comprises:
carrying out copper plating treatment on the upper end face and the lower end face of the multilayer board, forming a first copper layer on a circuit on the upper end face of the multilayer board, and forming a second copper layer on the lower end face of the multilayer board;
carrying out dry film and etching treatment on the first copper layer to obtain a first outer layer circuit;
carrying out dry film and etching treatment on the second copper layer to obtain a second outer layer circuit;
carrying out tin plating treatment on the first outer layer circuit to form a first tin film protective layer;
and carrying out tin plating treatment on the second outer layer circuit to form a second tin film protective layer.
9. The method for manufacturing a super-flatness PCB according to claim 8, wherein the protecting the circuit on the multi-layer board comprises:
and printing solder resist ink on the upper side of the circuit on the multilayer board to form a solder resist ink layer.
A PCB manufactured according to the super-flatness PCB manufacturing method for chip testing of any one of claims 1 to 9.
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| US20020017739A1 (en) * | 2000-08-09 | 2002-02-14 | Japan Radio Co., Ltd. | Hole filling method for a printed wiring board |
| CN110099524A (en) * | 2019-04-30 | 2019-08-06 | 东莞联桥电子有限公司 | A kind of pressing production method of multilayer circuit board |
| CN111586985A (en) * | 2020-04-29 | 2020-08-25 | 东莞联桥电子有限公司 | Manufacturing method of high-flatness multilayer circuit board |
| CN113267659A (en) * | 2021-05-18 | 2021-08-17 | 上海泽丰半导体科技有限公司 | ATE test board and manufacturing method thereof |
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2021
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020017739A1 (en) * | 2000-08-09 | 2002-02-14 | Japan Radio Co., Ltd. | Hole filling method for a printed wiring board |
| CN110099524A (en) * | 2019-04-30 | 2019-08-06 | 东莞联桥电子有限公司 | A kind of pressing production method of multilayer circuit board |
| CN111586985A (en) * | 2020-04-29 | 2020-08-25 | 东莞联桥电子有限公司 | Manufacturing method of high-flatness multilayer circuit board |
| CN113267659A (en) * | 2021-05-18 | 2021-08-17 | 上海泽丰半导体科技有限公司 | ATE test board and manufacturing method thereof |
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