CN113917749B - Array substrate, display panel, display device and manufacturing method of array substrate - Google Patents
Array substrate, display panel, display device and manufacturing method of array substrate Download PDFInfo
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- CN113917749B CN113917749B CN202111211901.1A CN202111211901A CN113917749B CN 113917749 B CN113917749 B CN 113917749B CN 202111211901 A CN202111211901 A CN 202111211901A CN 113917749 B CN113917749 B CN 113917749B
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
Abstract
The application discloses an array substrate, a display panel, a display device and a manufacturing method of the array substrate; the array substrate comprises a transparent substrate, and a photosensitive structure is arranged in a frame area of the transparent substrate; the photosensitive structure includes: the first conductor layer, the first insulating layer and the photosensitive material layer are sequentially arranged on the transparent substrate base plate; the first conductor layer is provided with a through hole, and the through hole is positioned in a orthographic projection area of the photosensitive material layer on the first conductor layer; one side of the photosensitive material layer is communicated with the active layer of the array substrate through the second conductor layer, and the other side of the photosensitive material layer is communicated with the back plating conductive film of the transparent color film substrate through the third conductor layer. The array substrate constructs a residual charge release path from in-plane to out-of-plane, can effectively dissipate the residual charges in the plane, and solves the problems of picture jitter and drift of the liquid crystal display panel caused by the residual charges in the plane.
Description
Technical Field
The application relates to the technical field of display, in particular to an array substrate, a display panel, a display device and a manufacturing method of the array substrate.
Background
At present, the liquid crystal panel, particularly an oxide FFS product based on a fringe field switching technology, is easy to generate residual charge accumulation due to lower cut-off voltage Ioff; the electric charge exists mainly in the panel, and the occurrence time and the position of the residual electric charge can not be monitored. The presence of residual charge can cause problems with frame jitter and Flicker drift in the liquid crystal display panel. For the problem of residual charges in the surface, the scheme mainly adopted at present is to bake the panel at high temperature, but the charge dissipation effect is poor; there are also related arts employing: a method of forming a resist layer on a substrate and coating a conductive polymer or metal complex on the resist layer to form a charge dissipation layer, but this method has a problem in that the resist layer is worn down with use of a liquid crystal panel, and the charge dissipation layer corrodes a TFT substrate, resulting in a reduction in lifetime of the liquid crystal display panel.
Therefore, the residual charges in the liquid crystal panel cannot be effectively eliminated in the prior art.
Disclosure of Invention
The embodiment of the application solves the problem of residual charge accumulation in the liquid crystal display panel in the prior art by providing the array substrate, the display panel, the display device and the manufacturing method of the array substrate, so that the display effect of the liquid crystal display panel is improved.
In a first aspect, the present application provides, according to an embodiment of the present application, the following technical solutions:
an array substrate, comprising:
a transparent substrate, wherein a photosensitive structure is arranged in a frame area of the transparent substrate;
the photosensitive structure includes:
the first conductor layer, the first insulating layer and the photosensitive material layer are sequentially arranged on the transparent substrate base plate;
the first conductor layer is provided with a through hole, and the through hole is positioned in a orthographic projection area of the photosensitive material layer on the first conductor layer;
one side of the photosensitive material layer is communicated with the active layer of the array substrate through the second conductor layer, and the other side of the photosensitive material layer is communicated with the back plating conductive film of the transparent color film substrate through the third conductor layer.
In some embodiments, a liquid crystal cell test probe point is disposed in a frame area of the transparent substrate, the liquid crystal cell test probe point includes a fourth conductor layer, and the second conductor layer conducts the active layer through the fourth conductor layer.
In some embodiments, the liquid crystal cell test probe further comprises:
a fifth conductor layer disposed on the transparent substrate;
and a second insulating layer located between the fourth conductor layer and the fifth conductor layer.
In some embodiments, the liquid crystal cell test probe further comprises:
and a third insulating layer and a first conductive film sequentially provided on the fourth conductor layer.
In some embodiments, a frame region of the transparent substrate is provided with a coating contact, and the third conductor layer is conducted with the back plating conductive film through the coating contact.
In some embodiments, the coated contact is a silver paste contact.
In some embodiments, the array substrate further includes a second conductive film, and the third conductor layer is in conduction with the silver paste contact through the second conductive film.
In some embodiments, the photosensitive material layer is an indium gallium zinc oxide layer.
In some embodiments, the cross-sectional shape of the through hole is any one of the following shapes:
circular, oval, annular, polygonal and cross-shaped.
According to the second aspect, based on the same inventive concept, the present application provides the following technical solutions according to an embodiment of the present application:
a manufacturing method of an array substrate comprises the following steps:
forming a first conductor layer on a transparent substrate, wherein a through hole is formed in the first conductor layer;
forming a first insulating layer on the first conductor layer;
forming a photosensitive material layer on the first insulating layer;
forming a second conductor layer on one side of the photosensitive material layer and forming a third conductor layer on the other side of the photosensitive material layer; the photosensitive material layer is communicated with the active layer of the array substrate through the second conductor layer, and is communicated with the back plating conductive film of the transparent color film substrate through the third conductor layer; the through hole is positioned in a orthographic projection area of the photosensitive material layer on the first conductor layer.
The third aspect, based on the same inventive concept, provides the following technical solutions according to an embodiment of the present application:
a display panel, comprising: the array substrate according to any one of the above technical solutions.
According to the fourth aspect, based on the same inventive concept, the present application provides the following technical solutions according to an embodiment of the present application:
a display device, comprising: the display panel described in the foregoing technical solution.
One or more technical solutions provided in the embodiments of the present application at least have the following technical effects or advantages:
the application provides an array substrate, which is characterized in that a photosensitive structure is formed in a frame area of a transparent substrate, and a residual charge release path is formed under the action of illumination; specifically, a through hole is formed in a first conductor layer of a photosensitive structure, a second conductor layer located on one side of the photosensitive material layer is directly connected with an active layer on a transparent substrate, a third conductor layer located on the other side of the photosensitive material layer is connected with a back plating conductive film of a transparent color film substrate, so that light sequentially passes through the transparent substrate, the through hole and a first insulating layer and irradiates the photosensitive material layer, the photosensitive material layer is converted into a conductor under the action of light, residual charges located at the in-plane active layer can sequentially pass through the second conductor layer, the photosensitive material layer and the third conductor layer are transmitted to the back plating conductive film of the color film substrate, and accordingly a common electrode of the residual charges from the inside of a panel is established, an external release path from the pixel electrode to the outside of the panel can be effectively dissipated, and the problems of picture jitter, flicker drift and the like of the liquid crystal display panel due to the residual charges in the plane are solved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for the description of the embodiments will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic diagram of an array substrate in a frame area according to an embodiment of the present application;
FIG. 2 is a schematic diagram of an array substrate including a liquid crystal cell test probe and a coating contact in a frame area according to an embodiment of the present application;
FIG. 3 is a top view of an array substrate excluding a transparent color film substrate according to an embodiment of the present application;
FIG. 4 is a top view of an array substrate including a transparent color film substrate according to an embodiment of the present application;
FIG. 5 is a schematic diagram of two charge release paths of an array substrate according to an embodiment of the present application;
FIG. 6 is a schematic flow chart of a method for manufacturing an array substrate according to an embodiment of the application;
reference numerals: 10-a transparent substrate base plate; 20-a photosensitive structure; 201-a first conductor layer; 2011-through holes; 202-a first insulating layer; 203-a layer of photosensitive material; 204-a second conductor layer; 205-a third conductor layer; 206-a second conductive film; 30-a transparent color film substrate; 301-back plating a conductive film; 40-testing probe points of the liquid crystal box; 401-a fourth conductor layer; 402-a fifth conductor layer; 403-a second insulating layer; 404-a first conductive film; 50-coating contacts; 501-silver paste contacts.
Detailed Description
Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. It should be understood that the description is only exemplary and is not intended to limit the scope of the present disclosure. In addition, in the following description, descriptions of well-known structures and techniques are omitted so as not to unnecessarily obscure the concepts of the present disclosure.
Various structural schematic diagrams according to embodiments of the present disclosure are shown in the drawings. The figures are not drawn to scale, wherein certain details are exaggerated for clarity of presentation and may have been omitted. The shapes of the various regions, layers and relative sizes, positional relationships between them shown in the drawings are merely exemplary, may in practice deviate due to manufacturing tolerances or technical limitations, and one skilled in the art may additionally design regions/layers having different shapes, sizes, relative positions as actually required.
In the context of the present disclosure, when a layer/element is referred to as being "on" another layer/element, it can be directly on the other layer/element or intervening layers/elements may be present therebetween. In addition, if one layer/element is located "on" another layer/element in one orientation, that layer/element may be located "under" the other layer/element when the orientation is turned.
Referring to fig. 1, in one embodiment of the present application, an array substrate is provided, including: a transparent substrate 10, wherein a photosensitive structure 20 is arranged in a frame area of the transparent substrate 10; the photosensitive structure 20 includes:
a first conductor layer 201, a first insulating layer 202 and a photosensitive material layer 203, which are sequentially disposed on the transparent substrate base plate 10;
a through hole 2011 is arranged on the first conductor layer 201, and the through hole 2011 is located in a orthographic projection area of the photosensitive material layer 203 on the first conductor layer 201;
one side of the photosensitive material layer 203 is conducted with the active layer of the array substrate through the second conductor layer 204, and the other side is conducted with the back plating conductive film 301 of the transparent color film substrate 30 through the third conductor layer 205.
In the array substrate provided in this embodiment, through the through hole 2011 formed on the first conductor layer 201 of the photosensitive structure 20, the second conductor layer 204 located on one side of the photosensitive material layer 203 directly conducts the active layer on the transparent substrate 10, and the third conductor layer 205 located on the other side of the photosensitive material layer 203 conducts the back-plated conductive film 301 of the transparent color film substrate 30; so, light passes through transparent substrate base plate 10, through-hole 2011, first insulating layer 202 in proper order, shine photosensitive material layer 203, photosensitive material layer 203 changes the electric conductor under the illumination effect, the residual electric charge that is located the in-plane active layer department this moment can pass through second conductor layer 204 in proper order, photosensitive material layer 203, the back plating conductive film 301 of color film base plate is passed to third conductor layer 205, thereby establish the public electrode of residual electric charge from the panel inside, the pixel electrode is located to the outside external release route of panel, can dispel the residual electric charge in the face effectively, the picture shake that the liquid crystal display panel produced because of the residual electric charge in the face has been solved and the problem such as Flicker drift.
The array substrate in this embodiment is a thin film transistor (Thin Film Transistor, TFT) substrate, which includes a transparent substrate 10 that is a Glass substrate (TFT Glass) for forming TFT switches and pixels. The array substrate includes a pixel region and a frame region, and the photosensitive structure 20 disposed in the frame region in this embodiment is a charge release channel for conducting the active layer of the pixel region to the back-plating conductive film 301 under the illumination. The photosensitive structure 20 may take the form of a photoresistor, which is fabricated after the array substrate is boxed. However, in view of economy of the manufacturing process, the required photosensitive structure 20 can be formed synchronously when the array substrate is manufactured, and the display performance of the array substrate is not affected, so the photosensitive structure 20 in the embodiment has the same structure as the TFT switch in the pixel area, and specifically is as follows:
the first conductor layer 201 corresponds to a gate layer (gate) of the pixel region TFT switch; a through hole 2011 is disposed at a set position of the first conductor layer 201, and the through hole 2011 is used for providing a channel for light entering and irradiating the photosensitive material layer 203, so as to realize conduction of the photosensitive structure 20. The setting area may be a front projection area of the photosensitive material layer 203 on the first conductor layer 201, or may overlap with the front projection area to a certain extent, so long as the through hole 2011 is ensured to be disposed in the overlapping area, and the light passing through the through hole 2011 can irradiate the photosensitive material layer 203. The cross-sectional shape of the through hole 2011 may be: circular, oval, annular, polygonal, cross-shaped, etc., to the extent that light passes are not affected. The first conductor layer 201 may be a single-layer film formed of a conductor such as copper, molybdenum, aluminum-neodymium alloy, tungsten, or chromium, or a multilayer film formed by multilayer deposition of the conductor.
The first insulating layer 202 corresponds to a Gate Insulator (GI layer) of the TFT switch. The first insulating layer 202 may be a transparent insulating layer that does not affect the irradiation of light to the photosensitive material layer 203, and the material may be silicon oxide, silicon nitride, or a composite material of silicon nitride and silicon oxide. The first insulating layer 202 may be an opaque insulating layer, and the insulating layer through hole 2011 communicating with the communication hole structure on the first conductor layer 201 may be formed in the first insulating layer 202.
The photosensitive material layer 203 on the first insulating layer 202 is a switch for controlling the on/off of the photosensitive structure 20, and the photosensitive material layer 203 is converted into a conductor under the action of light to form a charge transmission path. The photosensitive material can be selected from photosensitive resistance materials such as cadmium sulfide, aluminum sulfide, indium antimonide, germanium (gold doped), etc., preferably indium gallium zinc oxide IGZO (indium gallium zinc oxide) or IGZO/ITO composite oxide, and ITO is indium tin oxide; in this way, in combination with the fabrication process of the array substrate, the corresponding photosensitive material layer 203 can be formed simultaneously.
The second conductor layer 204 located at one side of the photosensitive material layer 203 corresponds to a Source electrode of the TFT switch, and the second conductor layer 204 is turned on with an active layer (Source) of the pixel region.
The third conductive layer 205 located on the other side of the photosensitive material layer 203 corresponds to the drain electrode of the TFT switch, and the third conductive layer 205 is electrically connected to the back plating conductive film 301 of the transparent color film substrate 30, and the back plating conductive film 301 may be an ITO conductive film.
The second conductor layer 204 and the third conductor layer 205 may be made of copper/titanium, copper/molybdenum, or the like, and may be formed by a metal deposition method.
It should be noted that, the second conductor layer 204 in the present embodiment may be connected to the active layer through a preset conductor connection structure, such as a metal wire or a metal film, so as to achieve conduction; the third conductor layer 205 may be electrically connected to a predetermined metal line or metal film connected to the back plating conductive film 301.
When accumulated charges are generated in the array substrate surface, such as at the pixel electrode, a light source clamping tool (not shown in fig. 2) is installed below the through hole 2011, the light source clamping tool is used for installing a light source, light rays are emitted from the through hole 2011 after the light source is turned on, and pass through the transparent first insulating layer 202 to irradiate the photosensitive material layer 203, so that the photosensitive material layer 203 is converted into a conductor, and a charge release path of the charges from the panel interior-the second conductor layer 204-the photosensitive material layer 203-the third conductor layer 205-the back plating conductive film 301 is formed. The light source may be a white light source of 380 lumens to 780 lumens.
The array substrate provided in this embodiment is suitable for combining a transparent color film substrate (CF Glass) with an ITO conductive film coated on the back, or performing a Cell forming process on a transparent color film substrate with other conductive structures coated on the back, so as to obtain a corresponding liquid crystal display panel, where a conventional liquid crystal display panel including a conductive film 301 coated on the back includes a TN panel (Twisted Nematic), a VA panel (Vertical Alignment, vertical alignment type) and the like, an FFS fringe field switching type panel and the like, and is not particularly limited herein; the residual charge accumulated in the surface can be effectively discharged by constructing a discharge path of the charge from the in-plane pixel region to the out-of-plane back plating conductive film 301 layer by the photosensitive structure 20.
In order to avoid adding additional conducting structures, and to form a charge release path synchronously in the frame during the preparation process of the array substrate, in another alternative embodiment, a Cell Test Pad (CT Pad or CT input Pad) structure existing in the frame region is used to implement the conduction between the second conductor layer 204 and the active layer. The CT Pad is a signal line pin of an external digital signal source of the array substrate when the electrical performance of the liquid crystal Cell is tested, and a signal line (conductor layer) of the CT Pad is directly connected with an active layer of a pixel area.
Referring to fig. 2, a liquid crystal cell test probe point 40 (CT Pad) is disposed in a frame region of the transparent substrate 10, the liquid crystal cell test probe point 40 includes a fourth conductor layer 401, and the second conductor layer 204 conducts the active layer through the fourth conductor layer 401. The fourth conductor layer 401 is a signal transmission layer of a CT Pad structure, and may be an S/D metal layer, which is directly connected to the active layer in the pixel region or connected through a data line.
The specific structure of the CT Pad is as follows:
a fifth conductor layer 402 provided on the transparent base substrate 10; the fifth conductor layer 402 may be integrally formed with the first conductor layer 201;
a second insulating layer 403 located between the fourth conductor layer 401 and the fifth conductor layer 402.
Further, the CT Pad further includes:
a third insulating layer (not shown) and a first conductive film 404 which are sequentially provided over the fourth conductor layer 401; the first conductive film 404 may be an ITO conductive film.
Similarly, in order not to add additional conductive structures, in some alternative embodiments, the third conductive layer 205 is electrically connected to the back-plated conductive film 301 by using a coated contact structure formed in a liquid crystal cell process. The coated contacts are formed during the conductive paste coating process for transmitting COM potential on the transparent substrate 10 (TFT substrate) to Pad on the back-plated ITO conductive film on the transparent color film substrate 30 (CF substrate). The contact formed in the liquid crystal cell process is currently a silver paste Pad. The coating contact may be a conductive paste contact such as copper paste Pad or polymer Pad.
Referring to fig. 2, the coated contact 50 is a silver paste contact 501 (Ag Pad).
The third conductive layer 205 may be directly connected to the Ag Pad to realize conduction, or may be conducted by means of the second conductive film 206, as shown in fig. 2, and the third conductive layer 205 is conducted to the silver paste contact 501 through the second conductive film 206.
Referring to fig. 2, this embodiment designs a charge release structure that uses CT Pad, ag Pad to conduct out-of-plane charge. The charge release principle of the FFS type array substrate is shown in fig. 3 and 4. It should be noted that fig. 2 shows an alternative example in which the photosensitive structure 20 is formed between the pixel region and the CT Pad structure and the pixel region; FIGS. 3 and 4 illustrate alternative examples of CT Pad structures and photosensitive structures 20 that are both adjacent to the pixel area; wherein fig. 3 shows a schematic view of the arrangement position and charge transfer of the pixel electrode, the CT Pad, the photosensitive structure 20, the ag Pad on the transparent substrate base plate 10; fig. 4 shows a schematic diagram of a back-plated conductive film 301 that transfers charge through an Ag Pad onto a transparent color film substrate 30; the arrow direction in fig. 3 and 4 is the transfer direction of the residual charge.
The time for leading out residual charges after silver paste coating on the array substrate passes through a high-temperature baking station can be the time when the array substrate does not work, at the moment, the data line is electrified through a CT Pad, then a light source clamping tool is arranged at the lower position of the photosensitive structure 20, a light source is installed and started, light is transmitted through a through hole 2011 on the first conductor layer 201, the light is irradiated to the photosensitive material layer 203 (IGZO), the leakage current of the photosensitive material layer 203 is increased, and DC residues exist in a leakage dissipation plane of the CT Pad to the Ag Pad.
Fig. 5 shows two charge release paths of the array substrate provided in this embodiment, which are specifically as follows:
path 1: the residual charges stored in the pixel are transferred to the common electrode layer through the organic film layer (ORG, planarization layer), then transferred to the common electrode Com Pad, then transferred to the second conductor layer 204 of the photosensitive structure 20 through the fourth conductor layer 401 of the cell test probe 40CT Pad, and since the photosensitive material layer 203 leaks electricity under the effect of illumination at this time, the charges are transferred to the Ag Pad through the photosensitive material layer 205 again, so that the residual charges in the plane are exported to the rear ITO conductive film located on the transparent color film substrate 30.
Path 2: residual charges stored in the pixels are transferred to a Drain electrode (Drain) of a TFT switch in an AA region through a contact hole (contact hole), then transferred to an active layer (Source) through an oxide electron channel, the Source layer in the AA region is directly connected with a fourth conductor layer 401 of a CT Pad, illumination leakage is realized through the CT Pad, a photosensitive structure 20 and the Ag Pad, and the residual charges are led to a back ITO conductive film of a transparent color film substrate 30.
The above two charge release paths are illustrative and not intended to limit all charge transfer paths.
Before the residual charges are released and the array panel is assembled, the connection with the CT Pad in the laser cut surface can not affect the lighting use of the normal panel.
The embodiment provides an array substrate, which is formed by forming a photosensitive structure in a frame area of a transparent substrate, and then exporting in-plane residual charges out of a plane by utilizing a liquid crystal box test probe CT Pad and a coating contact (such as Ag Pad); the principle is that the photosensitive material layer is converted into a conductor under the action of illumination, so that residual charges at the in-plane active layer can sequentially pass through the fourth conductor layer of the CT Pad, the second conductor layer of the photosensitive structure, the photosensitive material layer, the third conductor layer, the second conductive film and the Ag Pad are transferred to the back conductive film of the transparent color film substrate, thereby establishing a public electrode in the panel, and an external release path from the pixel electrode to the outside of the panel, effectively dissipating the residual charges in the plane, and solving the problems of picture jitter, flicker drift and the like of the liquid crystal display panel due to the residual charges in the plane.
The Array substrate including the photosensitive structure provided in the above embodiment may be formed in synchronization with the Array pixels in an Array (Array) process, referring to fig. 6, in a second aspect, in an alternative embodiment, a process for manufacturing an Array substrate is provided, which specifically includes the following steps:
s10: forming a first conductor layer on a transparent substrate, wherein a through hole is formed in the first conductor layer;
s20: forming a first insulating layer on the first conductor layer;
s30: forming a photosensitive material layer on the first insulating layer;
s40: forming a second conductor layer on one side of the photosensitive material layer and forming a third conductor layer on the other side of the photosensitive material layer; the photosensitive material layer is communicated with the active layer of the array substrate through the second conductor layer, and is communicated with the back plating conductive film of the transparent color film substrate through the third conductor layer; the through hole is positioned in a orthographic projection area of the photosensitive material layer on the first conductor layer.
Taking FFS type array substrate as an example, an alternative preparation process is as follows:
step 1: providing a transparent substrate (TFT glass), coating and forming a transparent electrode layer, a metal layer and a photoresist on the transparent substrate in sequence, and performing patterning treatment by using a first mask to form a common electrode and a grid electrode which are positioned in a pixel area, and a first conductor layer and a fifth conductor layer which are positioned in a frame area; wherein the first conductor layer and the fifth conductor layer are integrally formed; the reticle technique refers to the prior art.
And 2, forming a through hole structure on the first conductor layer by an etching method, wherein the cross section of the through hole can be one of a circle, an ellipse, a ring, a polygon and a cross.
Step 3: forming a grid insulating layer in the pixel region of the transparent substrate obtained in the step 2, forming a first insulating layer on the first conductor layer of the frame region, and forming a second insulating layer on the fifth conductor layer; the material of the insulating layer can be silicon nitride or silicon oxide.
Step 4: depositing an active layer, a metal layer and a photoresist on the transparent substrate obtained in the step 3, and performing patterning treatment through a second mask plate to form a source electrode, a drain electrode and a conductive channel of a TFT switch in a pixel region; the second metal layer, the third metal layer and the photosensitive material layer are positioned on the first insulating layer of the frame area; and a fourth conductor layer on the second insulating layer in the frame region, wherein the fourth conductor layer is in conduction with the active layer in the pixel region. The material of the active layer is IGZO, and the material of the metal layer is copper/titanium or copper/molybdenum.
Step 5: depositing an insulating protective layer and a photoresist on the transparent substrate obtained in the step 4, and performing patterning treatment by using a third mask plate to form the insulating protective layer of the TFT switch in the pixel region; and a third insulating layer on the fourth metal layer in the frame region.
Step 6: depositing an ITO transparent conductive film on the transparent substrate obtained in the step 5, and performing patterning treatment by using a fourth mask plate to form a pixel electrode and a contact electrode which are positioned in a pixel region; and forming a first conductive film on the third insulating layer in the frame region and a second conductive film on the third metal layer.
Step 7: after the array process of the transparent substrate obtained in the step 6 is completed, after the Seal coating between the transparent substrate (TFT) and the transparent color film substrate (CF) is completed in the box forming process stage, silver paste coating is carried out, wherein at least one silver paste coating area is ensured to be arranged on the second conductive film, so that an Ag Pad for conducting the second conductive film and the back plating ITO conductive film of the CF substrate is formed.
In a third aspect, in yet another embodiment of the present application, a display panel is provided, including the array substrate according to any one of the foregoing embodiments.
In a fourth aspect, in yet another embodiment of the present application, there is provided a display device including the display panel in the above embodiment.
It should be noted that, in the display panel and the display device provided in this embodiment, the structure of the array substrate used in the embodiment may refer to the foregoing structural embodiment, and the generated beneficial effects have been described in the foregoing embodiment related to the structure of the array substrate, and in particular, the foregoing embodiment related to the array substrate may be referred to, which is not repeated in this embodiment. Other structures, as well as the specific process implementation in which each structure is fabricated, may be implemented using existing process techniques, and are not limited in this embodiment.
In the above description, technical details of patterning, etching, and the like of each layer are not described in detail. Those skilled in the art will appreciate that layers, regions, etc. of the desired shape may be formed by a variety of techniques. In addition, to form the same structure, those skilled in the art can also devise methods that are not exactly the same as those described above. In addition, although the embodiments are described above separately, this does not mean that the measures in the embodiments cannot be used advantageously in combination.
While preferred embodiments of the present application have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. It is therefore intended that the following claims be interpreted as including the preferred embodiments and all such alterations and modifications as fall within the scope of the application.
It will be apparent to those skilled in the art that various modifications and variations can be made to the present application without departing from the spirit or scope of the application. Thus, it is intended that the present application also include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.
Claims (6)
1. An array substrate, characterized by comprising:
the liquid crystal display device comprises a transparent substrate, wherein a frame area of the transparent substrate is provided with a photosensitive structure, a liquid crystal box test probe point and a silver paste contact;
the photosensitive structure includes:
the first conductor layer, the first insulating layer and the photosensitive material layer are sequentially arranged on the transparent substrate base plate;
the first conductor layer is provided with a through hole, and the through hole is positioned in a orthographic projection area of the photosensitive material layer on the first conductor layer;
one side of the photosensitive material layer is communicated with the active layer of the array substrate through the second conductor layer, and the other side of the photosensitive material layer is communicated with the back plating conductive film of the transparent color film substrate through the third conductor layer; the third conductor layer is communicated with the back plating conductive film through the silver paste contact;
the liquid crystal box test probe point comprises: a fourth conductor layer through which the second conductor layer conducts the active layer; a fifth conductor layer provided on the transparent substrate, a second insulating layer provided between the fourth conductor layer and the fifth conductor layer, a third insulating layer and a first conductive film provided in this order on the fourth conductor layer;
the array substrate further comprises a second conductive film, and the third conductor layer is conducted with the silver paste contact through the second conductive film.
2. The array substrate of claim 1, wherein the photosensitive material layer is an indium gallium zinc oxide layer.
3. The array substrate of claim 1, wherein the cross-sectional shape of the through hole is any one of the following shapes:
circular, oval, annular, polygonal and cross-shaped.
4. The manufacturing method of the array substrate is characterized by comprising the following steps of:
forming a first conductor layer on a transparent substrate, the first conductor layer being provided with a via hole thereon, comprising: sequentially coating a transparent electrode layer, a metal layer and a photoresist on a transparent substrate, and performing patterning treatment by using a first mask to form a common electrode and a grid electrode which are positioned in a pixel area, and a first conductor layer and a fifth conductor layer which are positioned in a frame area; forming a through hole structure on the first conductor layer by an etching method;
forming a first insulating layer on the first conductor layer, comprising: forming a first insulating layer on the first conductor layer of the frame area of the transparent substrate base plate, and forming a second insulating layer on the fifth conductor layer;
forming a photosensitive material layer on the first insulating layer;
forming a second conductor layer on one side of the photosensitive material layer and forming a third conductor layer on the other side of the photosensitive material layer; the photosensitive material layer is communicated with the active layer of the array substrate through the second conductor layer, and is communicated with the back plating conductive film of the transparent color film substrate through the third conductor layer; the through hole is positioned in a orthographic projection area of the photosensitive material layer on the first conductor layer;
the forming a photosensitive material layer on the first insulating layer, forming a second conductor layer on one side of the photosensitive material layer, and forming a third conductor layer on the other side of the photosensitive material layer, includes:
depositing an active layer, a metal layer and a photoresist, and performing patterning treatment through a second mask plate to form a second conductor layer, a third conductor layer and a photosensitive material layer which are positioned on the first insulating layer in the frame area and a fourth conductor layer which is positioned on the second insulating layer in the frame area, wherein the fourth conductor layer is communicated with the active layer in the pixel area;
depositing an insulating protective layer and a photoresist, and performing patterning treatment by using a third mask plate to form a third insulating layer positioned on the fourth conductor layer in the frame area;
depositing a transparent conductive film, and performing patterning treatment by using a fourth mask plate to form a first conductive film positioned on the third insulating layer in the frame area and a second conductive film positioned on the third conductor layer;
after forming the first conductive film and the second conductive film, the method further includes:
and after the Seal coating between the transparent substrate and the transparent color film substrate is finished in the box forming process stage, silver paste coating is carried out, wherein at least one silver paste coating area is arranged on the second conductive film so as to form a silver paste contact for conducting the second conductive film and the back plating conductive film.
5. A display panel, comprising: an array substrate according to any one of claims 1-3.
6. A display device comprising the display panel according to claim 5.
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