CN113917749A - Array substrate, display panel, display device and manufacturing method of array substrate - Google Patents
Array substrate, display panel, display device and manufacturing method of array substrate Download PDFInfo
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- CN113917749A CN113917749A CN202111211901.1A CN202111211901A CN113917749A CN 113917749 A CN113917749 A CN 113917749A CN 202111211901 A CN202111211901 A CN 202111211901A CN 113917749 A CN113917749 A CN 113917749A
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
Abstract
The invention discloses an array substrate, a display panel, a display device and a manufacturing method of the array substrate; the array substrate comprises a transparent substrate, wherein a frame area of the transparent substrate is provided with a photosensitive structure; the photosensitive structure includes: the first conductor layer, the first insulating layer and the photosensitive material layer are sequentially arranged on the transparent substrate; a through hole is formed in the first conductor layer and is positioned in an orthographic projection area of the photosensitive material layer on the first conductor layer; one side of the photosensitive material layer is conducted with the active layer of the array substrate through the second conductor layer, and the other side of the photosensitive material layer is conducted with the back-plated conductive film of the transparent color film substrate through the third conductor layer. The array substrate of the invention constructs a residual charge release path from the inside to the outside of the surface, can effectively dissipate the residual charge in the surface, and solves the problems of picture jitter and drifting of the liquid crystal display panel caused by the residual charge in the surface.
Description
Technical Field
The invention relates to the technical field of display, in particular to an array substrate, a display panel, a display device and a manufacturing method of the array substrate.
Background
At present, a liquid crystal panel, especially an oxide FFS product based on a fringe field switching technology is easy to generate residual charge accumulation due to low cut-off voltage Ioff; the charge is mainly present inside the panel, and the occurrence time and position of the residual charge cannot be monitored. The existence of the residual charge can cause the problems of picture jitter and Flicker drift of the liquid crystal display panel. For the problem of in-plane residual charge, the scheme mainly adopted at present is to bake the panel at high temperature, but the charge dissipation effect is not good; there are also related techniques that employ: a method of forming a resist layer on a substrate and coating a conductive polymer or metal complex on the resist layer to form a charge dissipation layer, but this method has a problem in that the loss of the resist layer occurs with the use of a liquid crystal panel, and the charge dissipation layer corrodes the TFT substrate, resulting in a decrease in the life of the liquid crystal panel.
Therefore, the prior art cannot effectively eliminate the residual charges in the liquid crystal panel.
Disclosure of Invention
The embodiment of the application provides the array substrate, the display panel, the display device and the manufacturing method of the array substrate, so that the problem of residual charge accumulation in the liquid crystal display panel in the prior art is solved, and the display effect of the liquid crystal display panel is improved.
In a first aspect, the present application provides the following technical solutions through an embodiment of the present application:
an array substrate, comprising:
the photosensitive structure comprises a transparent substrate, wherein a frame area of the transparent substrate is provided with a photosensitive structure;
the photosensitive structure includes:
the first conductor layer, the first insulating layer and the photosensitive material layer are sequentially arranged on the transparent substrate;
a through hole is formed in the first conductor layer and is positioned in an orthographic projection area of the photosensitive material layer on the first conductor layer;
one side of the photosensitive material layer is conducted with the active layer of the array substrate through the second conductor layer, and the other side of the photosensitive material layer is conducted with the back-plated conductive film of the transparent color film substrate through the third conductor layer.
In some embodiments, the frame region of the transparent substrate is provided with a liquid crystal cell measurement probe point, the liquid crystal cell measurement probe point includes a fourth conductor layer, and the second conductor layer conducts the active layer through the fourth conductor layer.
In some embodiments, the liquid crystal cell measurement probe further comprises:
a fifth conductor layer disposed on the transparent substrate;
a second insulating layer between the fourth conductor layer and the fifth conductor layer.
In some embodiments, the liquid crystal cell measurement probe further comprises:
and a third insulating layer and a first conductive film sequentially provided on the fourth conductor layer.
In some embodiments, a frame region of the transparent substrate is provided with a coating contact, and the third conductor layer is in conduction with the back-plating conductive film through the coating contact.
In some embodiments, the coated contacts are silver paste contacts.
In some embodiments, the array substrate further includes a second conductive film, and the third conductor layer is in conduction with the silver paste contact through the second conductive film.
In some embodiments, the layer of photosensitive material is a layer of indium gallium zinc oxide.
In some embodiments, the cross-sectional shape of the through-hole is any one of the following shapes:
circular, oval, annular, polygonal, and cross-shaped.
In a second aspect, based on the same inventive concept, the present application provides the following technical solutions through an embodiment of the present application:
a manufacturing method of an array substrate comprises the following steps:
forming a first conductor layer on a transparent substrate, wherein a through hole is formed in the first conductor layer;
forming a first insulating layer on the first conductor layer;
forming a photosensitive material layer on the first insulating layer;
forming a second conductor layer on one side of the photosensitive material layer, and forming a third conductor layer on the other side of the photosensitive material layer; the photosensitive material layer is conducted with the active layer of the array substrate through the second conductor layer, and is conducted with the back-plated conductive film of the transparent color film substrate through the third conductor layer; the through hole is located in an orthographic projection area of the photosensitive material layer on the first conductor layer.
The third aspect of the present application provides the following technical solutions according to an embodiment of the present application, based on the same inventive concept:
a display panel, comprising: the array substrate according to any of the preceding claims.
In a fourth aspect, based on the same inventive concept, the present application provides the following technical solutions through an embodiment of the present application:
a display device, comprising: the display panel in the foregoing technical solution.
One or more technical solutions provided in the embodiments of the present application have at least the following technical effects or advantages:
the invention provides an array substrate, which is characterized in that a photosensitive structure is formed in a frame area of a transparent substrate, and a residual charge release path is formed under the action of illumination; specifically, a through hole is arranged on a first conductor layer of a photosensitive structure, a second conductor layer positioned on one side of a photosensitive material layer is directly conducted with an active layer on a transparent substrate, a third conductor layer positioned on the other side of the photosensitive material layer is conducted with a back-plated conductive film of a transparent color film substrate, thus, light irradiates the photosensitive material layer through the transparent substrate, the through hole and the first insulating layer in sequence, the photosensitive material layer is converted into a conductor under the action of illumination, residual charges at the active layer in the surface can be transferred to the back-plated conductive film of the color film substrate through the second conductor layer, the photosensitive material layer and the third conductor layer in sequence, therefore, an outward release path from the common electrode and the pixel electrode inside the panel to the outside of the panel is established, the in-plane residual charges can be effectively dissipated, and the problems of picture jitter, Flicker drift and the like of the liquid crystal display panel caused by the in-plane residual charges are solved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on the drawings without creative efforts.
Fig. 1 is a schematic view of an array substrate provided in an embodiment of the present invention in a frame region;
FIG. 2 is a schematic view of an array substrate including liquid crystal cell test dots and coated contacts in a border region according to an embodiment of the present invention;
fig. 3 is a top view of an array substrate without a transparent color film substrate according to an embodiment of the invention;
fig. 4 is a top view of an array substrate including a transparent color film substrate according to an embodiment of the present disclosure;
FIG. 5 is a schematic diagram of two charge discharging paths existing in the array substrate according to the embodiment of the invention;
FIG. 6 is a schematic flow chart illustrating a method for fabricating an array substrate according to an embodiment of the present invention;
reference numerals: 10-a transparent substrate; 20-a photosensitive structure; 201-a first conductor layer; 2011-through holes; 202-a first insulating layer; 203-a layer of photosensitive material; 204 — a second conductor layer; 205-a third conductor layer; 206-a second conductive film; 30-a transparent color film substrate; 301-back plating a conductive film; 40-liquid crystal cell measurement probe; 401 — a fourth conductor layer; 402-a fifth conductor layer; 403-a second insulating layer; 404-a first conductive film; 50-coating a contact; 501-silver paste contact.
Detailed Description
Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. It should be understood that the description is illustrative only and is not intended to limit the scope of the present disclosure. Moreover, in the following description, descriptions of well-known structures and techniques are omitted so as to not unnecessarily obscure the concepts of the present disclosure.
Various structural schematics according to embodiments of the present disclosure are shown in the figures. The figures are not drawn to scale, wherein certain details are exaggerated and possibly omitted for clarity of presentation. The shapes of various regions, layers, and relative sizes and positional relationships therebetween shown in the drawings are merely exemplary, and deviations may occur in practice due to manufacturing tolerances or technical limitations, and a person skilled in the art may additionally design regions/layers having different shapes, sizes, relative positions, as actually required.
In the context of the present disclosure, when a layer/element is referred to as being "on" another layer/element, it can be directly on the other layer/element or intervening layers/elements may be present. In addition, if a layer/element is "on" another layer/element in one orientation, then that layer/element may be "under" the other layer/element when the orientation is reversed.
Referring to fig. 1, in an embodiment of the present invention, an array substrate is provided, including: the light-sensitive structure comprises a transparent substrate 10, wherein a photosensitive structure 20 is arranged in a frame area of the transparent substrate 10; the photosensitive structure 20 includes:
a first conductor layer 201, a first insulating layer 202 and a photosensitive material layer 203 sequentially disposed on the transparent substrate 10;
a through hole 2011 is arranged on the first conductor layer 201, and the through hole 2011 is positioned in an orthographic projection area of the photosensitive material layer 203 on the first conductor layer 201;
one side of the photosensitive material layer 203 is conducted with the active layer of the array substrate through the second conductor layer 204, and the other side is conducted with the back-plated conductive film 301 of the transparent color film substrate 30 through the third conductor layer 205.
In the array substrate provided in this embodiment, through the through hole 2011 is formed in the first conductor layer 201 of the photosensitive structure 20, the second conductor layer 204 located on one side of the photosensitive material layer 203 is directly conducted to the active layer on the transparent substrate 10, and the third conductor layer 205 located on the other side of the photosensitive material layer 203 is conducted to the back-plating conductive film 301 of the transparent color film substrate 30; thus, light sequentially passes through the transparent substrate 10, the through hole 2011 and the first insulating layer 202 to irradiate the photosensitive material layer 203, the photosensitive material layer 203 is converted into a conductor under the action of illumination, at the moment, residual charges at the in-plane active layer can sequentially pass through the second conductor layer 204, the photosensitive material layer 203 and the third conductor layer 205 to be transmitted to the back plating conductive film 301 of the color film substrate, so that a common electrode of the residual charges from the inside of the panel is established, an external release path from the pixel electrode to the outside of the panel can effectively dissipate the residual charges in the plane, and the problems of picture jitter, Flicker drift and the like of the liquid crystal display panel caused by the residual charges in the plane are solved.
In this embodiment, the array substrate is a Thin Film Transistor (TFT) substrate, and the transparent substrate 10 included in the array substrate is a Glass substrate (TFT Glass) for forming TFT switches and pixels. The array substrate includes a pixel region and a frame region, and the photosensitive structure 20 disposed in the frame region of the present embodiment is a charge releasing channel for conducting an active layer of the pixel region to the back-plated conductive film 301 under the action of light. The photosensitive structure 20 may take the form of a photo-resistor that is prepared after the array substrate is boxed. However, considering the economical efficiency of the manufacturing process, the required photosensitive structure 20 can be formed simultaneously when the array substrate is manufactured, and the display performance of the array substrate is not affected, so the photosensitive structure 20 in this embodiment is the same as the TFT switch in the pixel region, specifically as follows:
the first conductor layer 201 corresponds to a gate layer (gate) of a TFT switch in the pixel region; the through holes 2011 are disposed at predetermined positions of the first conductive layer 201, and the through holes 2011 are used to provide a passage for light to enter and irradiate the photosensitive material layer 203, so as to conduct the photosensitive structure 20. The setting area may be an orthogonal projection area of the photosensitive material layer 203 on the first conductor layer 201, or may overlap with the orthogonal projection area to some extent, as long as it is ensured that the through-hole 2011 is disposed in the overlapping area, and light passing through the through-hole 2011 can irradiate the photosensitive material layer 203. The cross-sectional shape of the through-hole 2011 may be: circular, oval, annular, polygonal, cross-shaped, etc., so as not to interfere with light passing therethrough. The first conductor layer 201 may be a single-layer thin film formed of a conductor such as copper, molybdenum, aluminum, an aluminum-neodymium alloy, tungsten, or chromium, or may be a multilayer thin film formed by depositing a plurality of layers of the conductor.
The first insulating layer 202 corresponds to a Gate insulating layer (GI layer for short) of the TFT switch. The first insulating layer 202 may be a transparent insulating layer which does not affect the irradiation of light to the photosensitive material layer 203, and may be made of silicon oxide, silicon nitride, or a composite material of silicon nitride and silicon oxide. The first insulating layer 202 may be an opaque insulating layer, and the first insulating layer 202 may have a via structure communicating with the via structure of the first conductor layer 201 and an insulating layer via 2011.
The photosensitive material layer 203 on the first insulating layer 202 is a switch for controlling the on/off of the photosensitive structure 20, and the photosensitive material layer 203 is transformed into a conductor under the action of light to form a charge transfer path. The photosensitive material can be selected from cadmium sulfide, aluminum sulfide, indium antimonide, germanium (doped with gold) and other photosensitive resistance materials, preferably Indium Gallium Zinc Oxide (IGZO) or IGZO/ITO composite oxide, and ITO is indium tin oxide; in this way, in combination with the fabrication process of the array substrate, the corresponding photosensitive material layer 203 can be formed simultaneously.
The second conductive layer 204 on one side of the photosensitive material layer 203 corresponds to the Source of the TFT switch, and the second conductive layer 204 is conductive with the active layer (Source) of the pixel region.
The third conductive layer 205 on the other side of the photosensitive material layer 203 corresponds to a drain of the TFT switch, the third conductive layer 205 is electrically connected to the back-plated conductive film 301 of the transparent color film substrate 30, and the back-plated conductive film 301 may be an ITO conductive film.
The second conductive layer 204 and the third conductive layer 205 can be made of copper/titanium, copper/molybdenum, etc., and can be formed by a metal deposition method.
It should be noted that the second conductor layer 204 in this embodiment may be connected to the active layer through a predetermined conductor connection structure, such as a metal wire or a metal film, to achieve conduction; the third conductor layer 205 can also be conducted through a metal wire or a metal film connected to the back-plating conductive film 301.
When accumulated charges generated in the array substrate surface, such as at the pixel electrode, need to be released, a light source clamping tool (not shown in fig. 2) is installed below the through hole 2011, and is used for installing a light source, after the light source is turned on, light is emitted from the through hole 2011, and irradiates the photosensitive material layer 203 through the transparent first insulating layer 202, so that the photosensitive material layer 203 is converted into a conductor, and thus a charge release path of charges from the panel interior, the second conductor layer 204, the photosensitive material layer 203, the third conductor layer 205 and the back-plating conductive film 301 is formed. The light source can be a white light source of 380-780 lumens.
The array substrate provided in this embodiment is suitable for performing a Cell-forming (Cell) process on a transparent color film substrate (CF Glass) with an ITO conductive film plated on the back or a transparent color film substrate with another conductive structure plated on the back to prepare a corresponding liquid crystal display panel, and common liquid crystal display panels including a conductive film plated on the back 301 include TN panels (Twisted Nematic), VA panels (Vertical Alignment), etc., FFS fringe field switching panels, etc., which are not limited herein; the photosensitive structure 20 is used for constructing a charge releasing path from the in-plane pixel area to the out-of-plane back-plating conductive film 301 layer, so that residual charges accumulated in the plane can be effectively released.
In order to avoid adding an additional conduction structure and to form a charge release path in the frame in the manufacturing process of the array substrate, in another alternative embodiment, the conduction between the second conductor layer 204 and the active layer is implemented by using a liquid crystal Cell Test Pad (CT Pad or CT input Pad) structure existing in the frame region. In the electrical performance test of the liquid crystal Cell stage, the array substrate is externally connected with a signal wire pin of a digital signal source, and a signal wire (a conductor layer) of the array substrate is directly connected with an active layer of a pixel area.
Referring to fig. 2, a liquid crystal cell test point 40(CT Pad) is disposed in a frame region of the transparent substrate 10, the liquid crystal cell test point 40 includes a fourth conductor layer 401, and the second conductor layer 204 connects the active layer through the fourth conductor layer 401. The fourth conductive layer 401 is a signal transmission layer with a CT Pad structure, and may be an S/D metal layer, which is directly connected to the active layer in the pixel region or connected to the active layer through a data line.
The specific structure of CT Pad is as follows:
a fifth conductor layer 402 disposed on the transparent substrate 10; the fifth conductor layer 402 may be integrally formed with the first conductor layer 201;
a second insulating layer 403 between the fourth conductor layer 401 and the fifth conductor layer 402.
Further, the CT Pad further includes:
a third insulating layer (not shown) and a first conductive film 404 which are provided in this order over the fourth conductor layer 401; the first conductive film 404 may be an ITO conductive film.
Similarly, in order to avoid adding an additional conducting structure, in some alternative embodiments, the third conductive layer 205 is electrically connected to the back-plated conductive film 301 by using a coating contact structure formed in a liquid crystal cell process. The coating contact is formed in the process of coating the conductive paste and is used for transmitting the COM potential on the transparent substrate 10(TFT substrate) to the Pad on the back-plated ITO conductive film on the transparent color film substrate 30(CF substrate). The coating contact formed in the liquid crystal cell forming process is silver paste Pad at present. The coating contact can also be a conductive paste contact such as copper paste Pad and polymer Pad.
Referring to fig. 2, the coated contacts 50 are silver paste contacts 501(Ag Pad).
The third conductive layer 205 can be directly connected to the Ag Pad for conduction, or can be conducted by means of the second conductive film 206, as shown in fig. 2, the third conductive layer 205 is conducted to the silver paste contact 501 through the second conductive film 206.
With reference to fig. 2, this embodiment designs a charge discharging structure that uses CT Pad, Ag Pad to guide in-plane charges out of plane. The charge release principle of the FFS type array substrate is shown in fig. 3 and 4. It should be noted that fig. 2 shows an alternative example of the photosensitive structure 20 formed between the pixel region and the CT Pad structure and the pixel region; FIGS. 3 and 4 illustrate alternative examples of the proximity of both the CT Pad structure and the photosensitive structure 20 to the pixel region; wherein, fig. 3 shows the arrangement positions and charge transfer schematic diagrams of the pixel electrode, the CT Pad, the photosensitive structure 20, the Ag Pad on the transparent substrate 10; fig. 4 shows a schematic diagram of a back-plated conductive film 301 for charge transfer through Ag Pad onto a transparent color film substrate 30; the arrow direction in fig. 3 and 4 is the transfer direction of the residual charge.
The array substrate passes through a high-temperature baking station after silver paste coating, the residual charge deriving time can be non-working time, at the moment, the data line is electrified through the CT Pad, then a light source clamping tool is arranged below the photosensitive structure 20, a light source is installed and started, the light passes through a through hole 2011 in the first conductor layer 201 and irradiates the photosensitive material layer 203(IGZO), the leakage current of the photosensitive material layer 203 is increased, and the CT Pad is remained in the DC in the Ag Pad leakage dissipation surface.
Fig. 5 shows two charge discharging paths existing in the array substrate provided in this embodiment, which are as follows:
route 1: the residual charges stored in the pixels are transferred to the common electrode layer through the organic film layer (ORG, planarization layer), then transferred to the common electrode Com Pad, and then transferred to the second conductor layer 204 of the photosensitive structure 20 through the fourth conductor layer 401 of the liquid crystal cell detection probe 40CT Pad, and since the photosensitive material layer 203 leaks electricity under the illumination effect at this time, the charges are transferred to the Ag Pad through the photosensitive material and the third conductor layer 205, so that the in-plane residual charges are led out to the back ITO conductive film on the transparent color film substrate 30.
Route 2: residual charges stored in the pixels are transmitted to a Drain electrode (Drain) of a TFT switch in an AA area through a contact hole (contact hole), and then transmitted to an active layer (Source) through a peroxide electronic channel, the Source layer in the AA area is directly connected with a fourth conductor layer 401 of a CT Pad, and through the CT Pad, the photosensitive structure 20 and the Ag Pad realize illumination and electric leakage, and the residual charges are transmitted to an ITO conductive film on the back of the transparent color film substrate 30.
The above two charge discharging paths are examples, and are not limited to all charge transferring paths.
The connection between the laser cutting surface and the CT Pad before the residual charge release and the array panel mounting is completed will not affect the normal lighting use of the panel.
The embodiment provides an array substrate, wherein a photosensitive structure is formed in a frame region of a transparent substrate, and then residual charges in a plane are led out of the plane by using a liquid crystal box detection probe CT Pad and a coating contact (such as Ag Pad); the principle is that the photosensitive material layer is converted into a conductor under the action of illumination, so that residual charges at the in-plane active layer can sequentially pass through the fourth conductor layer of the CT Pad, the second conductor layer of the photosensitive structure, the photosensitive material layer, the third conductor layer, the second conductive film and the Ag Pad to be transmitted to the back conductive film of the transparent color film substrate, a common electrode of the residual charges in the panel and an outward release path from a pixel electrode to the outside of the panel are established, the residual charges in the plane can be effectively dissipated, and the problems of picture jitter, Flicker drift and the like of the liquid crystal display panel caused by the residual charges in the plane are solved.
Referring to fig. 6, in a second aspect, an Array substrate including a photosensitive structure provided in the above embodiments may be formed in synchronization with an Array pixel in an Array (Array) process, and in an alternative embodiment, a manufacturing process of the Array substrate is provided, which includes:
s10: forming a first conductor layer on a transparent substrate, wherein a through hole is formed in the first conductor layer;
s20: forming a first insulating layer on the first conductor layer;
s30: forming a photosensitive material layer on the first insulating layer;
s40: forming a second conductor layer on one side of the photosensitive material layer, and forming a third conductor layer on the other side of the photosensitive material layer; the photosensitive material layer is conducted with the active layer of the array substrate through the second conductor layer, and is conducted with the back-plated conductive film of the transparent color film substrate through the third conductor layer; the through hole is located in an orthographic projection area of the photosensitive material layer on the first conductor layer.
Taking the FFS type array substrate as an example, an alternative preparation process is as follows:
step 1: providing a transparent substrate (TFT glass), sequentially coating and forming a transparent electrode layer, a metal layer and a photoresist on the transparent substrate, and carrying out patterning treatment by using a first mask to form a common electrode and a grid electrode which are positioned in a pixel area, and a first conductor layer and a fifth conductor layer which are positioned in a frame area; wherein the first conductor layer and the fifth conductor layer are integrally formed; the mask technology refers to the prior art.
And 2, forming a through hole structure on the first conductor layer by an etching method, wherein the cross section of the through hole can be one of a circle, an ellipse, a ring, a polygon and a cross.
And step 3: forming a gate insulating layer in the pixel region of the transparent substrate obtained in the step 2, forming a first insulating layer on the first conductor layer in the frame region, and forming a second insulating layer on the fifth conductor layer; the material of the insulating layer may be silicon nitride or silicon oxide.
And 4, step 4: depositing an active layer, a metal layer and a light resistance on the transparent substrate obtained in the step (3), and carrying out graphical processing through a second mask to form a source electrode, a drain electrode and a conductive channel of the TFT switch positioned in the pixel region; the second metal layer, the third metal layer and the photosensitive material layer are positioned on the first insulating layer of the frame region; and the fourth conductor layer is positioned on the second insulating layer in the frame area, and is conducted with the active layer in the pixel area. The active layer is made of IGZO, and the metal layer is made of copper/titanium or copper/molybdenum.
And 5: depositing an insulating protective layer and a light resistor on the transparent substrate obtained in the step (4), and performing graphical processing by using a third mask to form the insulating protective layer of the TFT switch positioned in the pixel area; and a third insulating layer on the fourth metal layer in the frame region.
Step 6: depositing an ITO transparent conductive film on the transparent substrate obtained in the step 5, and performing graphical processing by using a fourth mask to form a pixel electrode and a contact electrode which are positioned in a pixel area; and forming a first conductive film on the third insulating layer in the frame region and a second conductive film on the third metal layer.
And 7: after the array process of the transparent substrate obtained in the step 6 is completed, Seal coating between the transparent substrate (TFT) and the transparent color film substrate (CF) is completed in a box forming process stage, and then silver paste coating is performed, wherein at least one silver paste coating area is ensured to be arranged on the second conductive film, so that an Ag Pad for conducting the second conductive film and the back-plated ITO conductive film of the CF substrate is formed.
In a third aspect, in a further embodiment of the present invention, there is provided a display panel including the array substrate described in any one of the foregoing embodiments.
In a fourth aspect, in a further embodiment of the present invention, there is provided a display device including the display panel in the above-described embodiment.
It should be noted that, in the display panel and the display device provided in this embodiment, the structure of the array substrate used in the display panel and the display device may refer to the foregoing structural embodiments, and the beneficial effects produced by the foregoing structural embodiments are already described in the foregoing embodiments related to the array substrate structure, and specifically refer to the foregoing embodiments related to the array substrate, and no further description is provided in this embodiment. Other structures, and the specific process implementation when each structure is manufactured, may use the existing process technology, and the present embodiment is not limited thereto.
In the above description, the technical details of patterning, etching, and the like of each layer are not described in detail. It will be appreciated by those skilled in the art that layers, regions, etc. of the desired shape may be formed by various technical means. In addition, in order to form the same structure, those skilled in the art can also design a method which is not exactly the same as the method described above. In addition, although the embodiments are described separately above, this does not mean that the measures in the embodiments cannot be used in advantageous combination.
While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the invention.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (12)
1. An array substrate, comprising:
the photosensitive structure comprises a transparent substrate, wherein a frame area of the transparent substrate is provided with a photosensitive structure;
the photosensitive structure includes:
the first conductor layer, the first insulating layer and the photosensitive material layer are sequentially arranged on the transparent substrate;
a through hole is formed in the first conductor layer and is positioned in an orthographic projection area of the photosensitive material layer on the first conductor layer;
one side of the photosensitive material layer is conducted with the active layer of the array substrate through the second conductor layer, and the other side of the photosensitive material layer is conducted with the back-plated conductive film of the transparent color film substrate through the third conductor layer.
2. The array substrate according to claim 1, wherein the transparent substrate is provided at a frame region thereof with liquid crystal cell test points, the liquid crystal cell test points including a fourth conductor layer, the second conductor layer conducting the active layer through the fourth conductor layer.
3. The array substrate of claim 2, wherein the liquid crystal cell test probe further comprises:
a fifth conductor layer disposed on the transparent substrate;
a second insulating layer between the fourth conductor layer and the fifth conductor layer.
4. The array substrate of claim 3, wherein the liquid crystal cell test probe further comprises:
and a third insulating layer and a first conductive film sequentially provided on the fourth conductor layer.
5. The array substrate of claim 1, wherein a frame region of the transparent substrate is provided with a coating contact, and the third conductor layer is electrically connected to the back-plating conductive film through the coating contact.
6. The array substrate of claim 5, wherein the coated contacts are silver paste contacts.
7. The array substrate of claim 6, further comprising a second conductive film, wherein the third conductor layer is electrically connected to the silver paste contact through the second conductive film.
8. The array substrate of claim 1, wherein the photosensitive material layer is an indium gallium zinc oxide layer.
9. The array substrate of claim 1, wherein the cross-sectional shape of the through-hole is any one of the following shapes:
circular, oval, annular, polygonal, and cross-shaped.
10. A manufacturing method of an array substrate is characterized by comprising the following steps:
forming a first conductor layer on a transparent substrate, wherein a through hole is formed in the first conductor layer;
forming a first insulating layer on the first conductor layer;
forming a photosensitive material layer on the first insulating layer;
forming a second conductor layer on one side of the photosensitive material layer, and forming a third conductor layer on the other side of the photosensitive material layer; the photosensitive material layer is conducted with the active layer of the array substrate through the second conductor layer, and is conducted with the back-plated conductive film of the transparent color film substrate through the third conductor layer; the through hole is located in an orthographic projection area of the photosensitive material layer on the first conductor layer.
11. A display panel, comprising: an array substrate as claimed in any one of claims 1 to 9.
12. A display device characterized by comprising the display panel according to claim 11.
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| CN202111211901.1A CN113917749B (en) | 2021-10-18 | 2021-10-18 | Array substrate, display panel, display device and manufacturing method of array substrate |
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| CN202111211901.1A CN113917749B (en) | 2021-10-18 | 2021-10-18 | Array substrate, display panel, display device and manufacturing method of array substrate |
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