CN106328714A - Thin-film transistor, array substrate and display device - Google Patents
Thin-film transistor, array substrate and display device Download PDFInfo
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- CN106328714A CN106328714A CN201610665990.XA CN201610665990A CN106328714A CN 106328714 A CN106328714 A CN 106328714A CN 201610665990 A CN201610665990 A CN 201610665990A CN 106328714 A CN106328714 A CN 106328714A
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- 239000010409 thin film Substances 0.000 title claims abstract description 130
- 239000000758 substrate Substances 0.000 title claims abstract description 21
- 239000000463 material Substances 0.000 claims description 47
- 239000012212 insulator Substances 0.000 claims description 40
- 230000004888 barrier function Effects 0.000 claims description 24
- 238000012216 screening Methods 0.000 claims description 17
- 239000004065 semiconductor Substances 0.000 claims description 12
- 239000011159 matrix material Substances 0.000 claims description 7
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 5
- 229910052733 gallium Inorganic materials 0.000 claims description 5
- 229910052738 indium Inorganic materials 0.000 claims description 5
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 5
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical compound O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 claims description 3
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 claims description 3
- 230000000903 blocking effect Effects 0.000 claims description 2
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 claims 1
- 230000003647 oxidation Effects 0.000 claims 1
- 238000007254 oxidation reaction Methods 0.000 claims 1
- 229910052725 zinc Inorganic materials 0.000 claims 1
- 239000011701 zinc Substances 0.000 claims 1
- 238000000034 method Methods 0.000 description 12
- 230000009286 beneficial effect Effects 0.000 description 9
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 8
- 238000005286 illumination Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 239000011787 zinc oxide Substances 0.000 description 4
- 239000010408 film Substances 0.000 description 3
- 239000013078 crystal Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 230000011514 reflex Effects 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78633—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a light shield
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Thin Film Transistor (AREA)
- Liquid Crystal (AREA)
Abstract
The invention discloses a thin-film transistor, an array substrate and a display device, and relates to the technical field of display. Increase of leakage current of the thin-film transistor is avoided when the thin-film transistor is illuminated, so that the stability of the thin-film transistor is improved. A shading layer is arranged in the thin-film transistor; the shading layer is used for shading light reflected to an active layer by a grid layer in the thin-film transistor; the shading layer is located between the grid layer of the thin-film transistor and a gate insulating layer; or the shading layer is located in the gate insulating layer of the thin-film transistor. The array substrate comprises the thin-film transistor disclosed by the technical scheme. The thin-film transistor disclosed by the invention is used for the display device.
Description
Technical field
The present invention relates to Display Technique field, particularly relate to a kind of thin film transistor (TFT), array base palte and display device.
Background technology
Thin film transistor (TFT) is a very important semiconductor device in Actire matrix display device, and wherein active layer is permissible
Select to make with the indium gallium zinc oxide (be called for short IGZO) the transparent oxide semiconductor material as representative, this kind of transparent oxide half
Conductor material has the advantages such as mobility is high, homogeneity is good, transparent, it is possible to improve the display of Actire matrix display device greatly
Effect.
But, owing to transparent oxide semiconductor material is not sufficiently stable in the case of by illumination so that film crystal
Pipe in the case of by illumination, the increase of the leakage current of thin film transistor (TFT), cause the stability of thin film transistor (TFT) to reduce.
Such as: Fig. 1 shows a kind of thin film transistor (TFT), the active layer of this thin film transistor (TFT) uses indium gallium zinc oxide system
Become.When light (such as backlight) is from the source-drain electrode 4 of the bottom directive thin film transistor (TFT) of underlay substrate 5, a part of light is likely
There is refraction or reflection in interface, the slope a formed at source-drain electrode 4 and gate insulator 2, and according to light path shown in arrow in Fig. 1
Eventually impinge active layer 3 so that the performance of active layer 3 is affected, cause the bad stability of thin film transistor (TFT).
Summary of the invention
It is an object of the invention to provide a kind of thin film transistor (TFT), array base palte and display device, with at thin film transistor (TFT)
In the case of illumination, it is to avoid the leakage current of thin film transistor (TFT) increases, thus improves the stability of thin film transistor (TFT).
To achieve these goals, the present invention provides following technical scheme:
A kind of thin film transistor (TFT), is provided with light shield layer in described thin film transistor (TFT), described light shield layer is used for blocking described thin film
Transistor is reflexed to the light of active layer by grid layer；Wherein,
Described light shield layer is between the grid layer and gate insulator of described thin film transistor (TFT)；Or,
Described light shield layer is positioned at the gate insulator of described thin film transistor (TFT).
Preferably, described thin film transistor (TFT) includes grid layer, gate insulator, active layer and source-drain electrode；Described grid is exhausted
Edge layer is formed on grid layer, and described active layer is formed on gate insulator, described source-drain electrode be formed at described active layer and
On gate insulator；The contact interface that the top of the bottom of described source-drain electrode and described gate insulator is formed is step-like boundary
Face；Described step-like interface includes appear on the stage interface, leave from office interface, and connects the interface, slope at appear on the stage interface and leave from office interface；
At the bottom of the slope that junction is interface, described slope at interface, described slope and leave from office interface；
Interface, described slope is positioned at the orthographic projection at projection plane of the described light shield layer in the orthographic projection of projection plane；Or,
Described light shield layer at the bottom of the contour line of the orthographic projection of projection plane and the slope at interface, described slope at projection plane
Orthographic projection overlaps；
Wherein, described projection plane is parallel with the bottom surface of described grid layer.
It is also preferred that the left described grid layer is positioned at the orthographic projection at projection plane of the described light shield layer in the orthographic projection of projection plane
In, described active layer is positioned at the orthographic projection at projection plane of the described light shield layer in the orthographic projection of projection plane.
It is also preferred that the left when described light shield layer is positioned at the gate insulator of described thin film transistor (TFT), described gate insulator bag
Including first grid insulating barrier and second grid insulating barrier, described light shield layer is positioned at described first grid insulating barrier and second grid is exhausted
Between edge layer, described first grid insulating barrier and described gate layer contacts, described second grid insulating barrier respectively with described source and drain
The bottom of pole contacts with the bottom of described active layer；The contact interface that described source-drain electrode and described second grid insulating barrier are formed
For step-like interface.
Preferably, the material of described light shield layer is electric conductivity light screening material or non-conductive light screening material.
It is also preferred that the left when described light shield layer is between the grid layer and gate insulator of described thin film transistor (TFT), described screening
The material of photosphere is non-conductive light screening material.
It is also preferred that the left when described light shield layer is positioned at the gate insulator of described thin film transistor (TFT), described electric conductivity lightproof material
Expect identical with black matrix material.
Preferably, the thickness of described light shield layer is
Preferably, the material of described active layer is oxide semiconductor.
It is also preferred that the left the material of described active layer is indium gallium zinc oxide, tin indium oxide or indium zinc oxide.
Preferably, described thin film transistor (TFT) is back of the body channel-etch type thin film transistor or etch stopper type thin film transistor (TFT).
Compared with prior art, having the beneficial effect that of the thin film transistor (TFT) that the present invention provides:
The present invention provides and is provided with light shield layer in thin film transistor (TFT), and the grid layer that light shield layer is positioned at thin film transistor (TFT) is exhausted with grid
Between edge layer, or it is positioned at the gate insulator of thin film transistor (TFT) so that light shield layer can block in thin film transistor (TFT) by grid
Layer reflexes to the light of active layer, thus can reduce the probability that light is reflected on active layer by grid layer, thus subtract
The leakage current of the thin film transistor (TFT) that rare active layer is caused because of illumination reason increases problem, thus ensures the steady of thin film transistor (TFT)
Qualitative.
A kind of array base palte, the described thin film transistor (TFT) provided including technique scheme are provided.
Preferably, described thin film transistor (TFT) is formed on underlay substrate, and the light shield layer in described thin film transistor (TFT) is positioned at institute
State the alternatively non-transparent region of array base palte.
It is also preferred that the left when the material of the active layer in described thin film transistor (TFT) is oxide semiconductor, described underlay substrate
For flexible substrate substrate.
Compared with prior art, the thin film that the beneficial effect of the array base palte that the present invention provides provides with technique scheme
The beneficial effect of transistor is identical, does not repeats at this.
A kind of display device, the described array base palte provided including technique scheme are provided.
Compared with prior art, the thin film that the beneficial effect of the display device that the present invention provides provides with technique scheme
The beneficial effect of transistor is identical, does not repeats at this.
Accompanying drawing explanation
Accompanying drawing described herein is used for providing a further understanding of the present invention, constitutes the part of the present invention, this
Bright schematic description and description is used for explaining the present invention, is not intended that inappropriate limitation of the present invention.In the accompanying drawings:
Fig. 1 is the structural representation of thin film transistor (TFT) in prior art；
The first thin film transistor (TFT) that Fig. 2 provides for the embodiment of the present invention is in the structure of the first position relationship of light shield layer
Schematic diagram；
The first thin film transistor (TFT) that Fig. 3 provides for the embodiment of the present invention is in the structure of the second position relationship of light shield layer
Schematic diagram；
The second thin film transistor (TFT) that Fig. 4 provides for the embodiment of the present invention is in the structure of the first position relationship of light shield layer
Schematic diagram；
The second thin film transistor (TFT) that Fig. 5 provides for the embodiment of the present invention is in the structure of the second position relationship of light shield layer
Schematic diagram；
Reference:
1-grid layer, 2-gate insulator；
21-first grid insulating barrier, 22-second grid insulating barrier；
3-active layer, 4-source-drain electrode；
5-underlay substrate, 6-light shield layer.
Detailed description of the invention
In order to further illustrate thin film transistor (TFT), array base palte and the display device that the embodiment of the present invention provides, knot below
Conjunction Figure of description is described in detail.
Referring to Fig. 2-Fig. 5, be provided with light shield layer 6 in the thin film transistor (TFT) that the embodiment of the present invention provides, light shield layer 6 is used for hiding
Gear thin film transistor (TFT) is reflexed to the light of active layer 3 by grid layer 1；Wherein, referring to Fig. 2 and Fig. 3, light shield layer 6 is positioned at thin
Between grid layer 1 and the gate insulator 2 of film transistor；Or, referring to Fig. 4 and Fig. 5, light shield layer 6 is positioned at thin film transistor (TFT)
In gate insulator 2.
When being embodied as, when light passes thin film transistor (TFT) according to direction shown in arrow in Fig. 2-Fig. 3 or Fig. 4-Fig. 5, hide
Photosphere 6 blocks the light being reflexed to active layer 3 in thin film transistor (TFT) by grid layer 1.
By above-mentioned specific implementation process, the embodiment of the present invention provides in thin film transistor (TFT) and is provided with light shield layer 6, and hides
Photosphere 6 is between the grid layer 1 and gate insulator 2 of thin film transistor (TFT), or is positioned at the gate insulator 2 of thin film transistor (TFT)
In so that light shield layer 6 can block the light being reflexed to active layer 3 in thin film transistor (TFT) by grid layer 1, thus can reduce light
Line is reflected to the probability on active layer 3 by grid layer 1, thus reduces the thin film that active layer 3 is caused because of illumination reason
The leakage current of transistor increases problem, thus ensures the stability of thin film transistor (TFT).
Significantly, since light shield layer 6 is for shading, it is not required to specific mask plate pattern-making, therefore,
When preparing thin film transistor (TFT), as long as the material used by light shield layer 6 being coated on grid layer 1 above or be filled in gate insulator
In 2, and without patterned process, i.e. without exposing, develop, etch and the complicated procedures of forming such as stripping.And, ensureing shading
On the premise of layer 6 light shielding ability, the thickness of light shield layer 6 ratio as far as possible is relatively thin, thus can reduce shared by thin film transistor (TFT)
Space so that when thin film transistor (TFT) is applied to display floater, reduce thin film transistor (TFT) because the problem of taking up room is to display floater
Lightening caused impact；Tests prove that, the thickness of light shield layer 6 isTime, the screening of light shield layer 6
Light ability is not affected, and it is smaller to enable to the space shared by thin film transistor (TFT).
It should be noted that above-described embodiment provide thin film transistor (TFT) can be carry on the back channel-etch type thin film transistor or
Etch stopper type thin film transistor (TFT), can select according to actual needs, as long as wherein possessing the light shield layer 6 of features described above.
Referring to Fig. 2 and Fig. 3, the thin film transistor (TFT) in above-described embodiment includes grid layer 1, gate insulator 2, active layer
3 and source-drain electrode 4；Gate insulator 2 is formed on grid layer 1, and active layer 3 is formed on gate insulator 2, and source-drain electrode 4 is formed
On active layer 3 and gate insulator 2；The contact interface that the top of the bottom of source-drain electrode 4 and gate insulator 2 is formed is platform
Scalariform interface；This step-like interface includes appear on the stage interface c, leave from office interface b, and connects the oblique of interface c and leave from office interface b of appearing on the stage
Interface, slope a；At the bottom of the slope that junction is interface, slope of interface, slope a and leave from office interface b.
Optionally, when light shield layer 6 is positioned at the gate insulator 2 of thin film transistor (TFT), gate insulator 2 can be regarded as two
Part, i.e. gate insulator 2 include first grid insulating barrier 21 and second grid insulating barrier 22, and light shield layer 6 is positioned at first grid
Between insulating barrier 21 and second grid insulating barrier 22, the bottom of first grid insulating barrier 21 contacts with grid layer 1, and second grid is exhausted
The top of edge layer 22 contacts with the bottom of source-drain electrode 4 and the bottom of active layer 3 respectively；The bottom of source-drain electrode 4 is exhausted with second grid
The contact interface that the top of edge layer 22 is formed is step-like interface.
And in view of the size of light shield layer 6, the impact on light shield layer 6 light shielding ability, provide light shield layer 6 below in conjunction with the accompanying drawings
At two kinds of position relationships of the orthographic projection of projection plane, so that the size impact on light shielding ability of light shield layer 6 to be described；Wherein, throw
Shadow plane is parallel with the bottom surface of grid layer.
The first position relationship: as shown in Figure 2 and Figure 4, light shield layer 6 is on the contour line of the orthographic projection of projection plane and slope
Orthographic projection at projection plane at the bottom of the slope of interface a overlaps；
The second position relationship: as Fig. 3 and Fig. 5, interface, slope a are positioned at light shield layer 6 in throwing in the orthographic projection of projection plane
In the orthographic projection of shadow plane.
From the description of above two relative position relation it is found that during the second position relationship, light shield layer 6 is flat in projection
The size in face is bigger, and during the first position relationship, light shield layer 6 is smaller in the size of projection plane, and due to two kinds of phases
To under position relationship, projection plane is parallel with the bottom surface of grid layer 1, therefore, when light is perpendicular to the bottom surface of grid layer 1 through the
During thin film transistor (TFT) corresponding to two kinds of position relationships, light shield layer 6 can block more light being irradiated to source-drain electrode 4, and irradiates
The fewest to the light of source-drain electrode 4, the light that refraction or reflection occur at a of interface, slope is the fewest, accordingly, and grid layer 1
Top the fewest from the light of interface, slope a, the light on the top reflective of such grid layer 1 to active layer 3 will
Reduced further, thus increased the stability of thin film transistor (TFT).
It is additionally, since projection plane parallel with the bottom surface of grid layer 1, and the backlight that in display, backlight module provides is being worn
When crossing the thin film transistor (TFT) in display floater, backlight is perpendicular to the bottom surface of the middle grid layer 1 of thin film transistor (TFT) through film crystal
Pipe, therefore, when the thin film transistor (TFT) that the second position relationship is corresponding is applied to the array base palte of display device, in thin film transistor (TFT)
Light shield layer 6 can more block the backlight being irradiated to source-drain electrode 4, thus reduce backlight further to active layer stability
Impact.
It addition, although during the second position relationship, light shield layer 6 is bigger in the size of projection plane, but when thin film is brilliant
Body pipe is when array base palte, if the unrestricted increase of the size of light shield layer 6, it can affect the aperture opening ratio of array base palte；
Therefore, when thin film transistor (TFT) is for array base palte, light shield layer 6 is preferably located at the alternatively non-transparent region of array base palte, to avoid
The aperture opening ratio impact of array substrate.
It is understood that refer to Fig. 2-Fig. 5, the grid layer 1 in above-described embodiment is in the orthographic projection position of projection plane
In light shield layer 6 in the orthographic projection of projection plane, active layer 3 is positioned at light shield layer 6 at projection plane in the orthographic projection of projection plane
Orthographic projection in, such light from the bottom of grid layer 1 through thin film transistor (TFT) time, it is exhausted that light does not passes through grid layer 1, grid
Edge layer 2 is irradiated to active layer 3, even if light is likely to travel through grid layer 1, also can be blocked by active layer 6, make light to irradiate
To active layer 3.
It should be noted that in the present embodiment, the material of light shield layer 6 can be electric conductivity light screening material or non-conductive screening
Luminescent material, non-conductive light screening material, it may be considered that black resin, shading rubber belt etc., it is also possible to select according to practical situation, and
Electric conductivity light screening material can select the material identical with black matrix material, it is also possible to for common light tight metal material, as
The material such as copper, aluminum.
When the material of light shield layer 6 is electric conductivity light screening material, and light shield layer 6 is positioned at grid layer 1 and the grid of thin film transistor (TFT)
Time between pole insulating barrier 2, owing to grid layer 1 can conduct electricity, the light shield layer 6 that electric conductivity light screening material is made can be with grid layer 1
Forming electric capacity, and affect the electric conductivity of thin film transistor (TFT), therefore, the grid layer 1 that light shield layer 6 is positioned at thin film transistor (TFT) is exhausted with grid
Time between edge layer 2, the material of light shield layer 6 is preferably non-conductive light screening material.
When the material of light shield layer 6 is electric conductivity light screening material, and light shield layer 6 is positioned at the gate insulator 2 of thin film transistor (TFT)
In, owing to gate insulator 2 can stop that light shield layer 6 forms electric capacity with grid layer 1 active layer 3 or source-drain electrode 4, this makes it possible to
The electric property avoiding thin film transistor (TFT) is affected, therefore, when light shield layer 6 is positioned at the gate insulator 2 of thin film transistor (TFT),
The material of light shield layer 6 can be the material arbitrarily with shading performance.And so that the preparation of thin film transistor (TFT) more has
Operability, the material of light shield layer 6 is preferably identical with black matrix material, thus can make full use of and prepare color membrane substrates
Time, required black matrix material, reduces the material category involved by display floater.
Exemplary, when the structure structure as shown in Figure 4 and Figure 5 of gate insulator 2, first grid insulating barrier 21 He
Light shield layer 6 can be completely cut off by second grid insulating barrier 22 with grid layer 1 active layer 3 in thin film transistor (TFT) or source-drain electrode 4, thus
Light shield layer 6 is avoided to form electric capacity with grid layer 1 active layer 3 or source-drain electrode 4.
It should be noted that the material of active layer 3 can be conventional semi-conducting material in above-described embodiment, it is also possible to for
Oxide semiconductor, simply when the material of active layer 3 is oxide semiconductor, the active layer pair being made up of oxide semiconductor
The sensitivity of illumination is higher so that the effect of the stability that light shield layer 6 improves thin film transistor (TFT) is more prominent.As for oxide
The material of quasiconductor specifically can select indium gallium zinc oxide, tin indium oxide or indium zinc oxide, but is not limited only to this.
The embodiment of the present invention additionally provides a kind of array base palte, the thin film transistor (TFT) mentioned including technique scheme.
Compared with prior art, the thin film that the beneficial effect of the array base palte that the present invention provides provides with technique scheme
The beneficial effect of transistor is identical, does not repeats at this.
Optionally, the thin film transistor (TFT) in above-described embodiment is formed at the shading on underlay substrate 5, in this thin film transistor (TFT)
Layer 6 is positioned at the alternatively non-transparent region of array base palte, does not thus interfere with the aperture opening ratio of array base palte.
It addition, when the material of the active layer 3 in thin film transistor (TFT) is oxide semiconductor, thin film transistor (TFT) is oxide
Thin film transistor (TFT), this thin film transistor (TFT) can be produced on flexible substrate substrate, therefore, when the active layer in thin film transistor (TFT)
When the material of 3 is oxide semiconductor, the underlay substrate 5 in above-described embodiment is preferably flexible substrate substrate so that array base
Plate can be applied in flexible display apparatus.
The embodiment of the present invention additionally provides a kind of display device, the array base palte provided including technique scheme.
Compared with prior art, the beneficial effect of the display device that the embodiment of the present invention provides provides with technique scheme
The beneficial effect of thin film transistor (TFT) identical, do not repeat at this.
Above-described embodiment provide display device can be mobile phone, panel computer, television set, display, notebook computer,
Any product with display function such as DPF or navigator or parts.
In the description of above-mentioned embodiment, specific features, structure, material or feature can be at any one or many
Individual embodiment or example combine in an appropriate manner.
The above, the only detailed description of the invention of the present invention, but protection scope of the present invention is not limited thereto, and any
Those familiar with the art, in the technical scope that the invention discloses, can readily occur in change or replace, should contain
Cover within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with described scope of the claims.
Claims (15)
1. a thin film transistor (TFT), it is characterised in that be provided with light shield layer in described thin film transistor (TFT), described light shield layer is used for blocking
Described thin film transistor (TFT) is reflexed to the light of active layer by grid layer；Wherein,
Described light shield layer is between the grid layer and gate insulator of described thin film transistor (TFT)；Or,
Described light shield layer is positioned at the gate insulator of described thin film transistor (TFT).
Thin film transistor (TFT) the most according to claim 1, it is characterised in that described thin film transistor (TFT) includes grid layer, grid
Insulating barrier, active layer and source-drain electrode；Described gate insulator is formed on grid layer, and described active layer is formed at gate insulator
On, described source-drain electrode is formed on described active layer and gate insulator；The bottom of described source-drain electrode and described gate insulator
The contact interface that formed of top be step-like interface；Described step-like interface includes appear on the stage interface, leave from office interface, Yi Jilian
Connect the interface, slope at platform interface and leave from office interface；Interface, described slope is interface, described slope with the junction at leave from office interface
At the bottom of slope；
Interface, described slope is positioned at the orthographic projection at projection plane of the described light shield layer in the orthographic projection of projection plane；Or,
Described light shield layer at the bottom of the contour line of the orthographic projection of projection plane and the slope at interface, described slope in the just throwing of projection plane
Shadow overlaps；
Wherein, described projection plane is parallel with the bottom surface of described grid layer.
Thin film transistor (TFT) the most according to claim 2, it is characterised in that described grid layer is in the orthographic projection position of projection plane
In described light shield layer in the orthographic projection of projection plane, described active layer is positioned at described light shield layer in the orthographic projection of projection plane and exists
In the orthographic projection of projection plane.
Thin film transistor (TFT) the most according to claim 2, it is characterised in that when described light shield layer is positioned at described thin film transistor (TFT)
Gate insulator in, described gate insulator includes first grid insulating barrier and second grid insulating barrier, described light shield layer position
Between described first grid insulating barrier and second grid insulating barrier, the bottom of described first grid insulating barrier and described grid layer
Contact, bottom with the bottom of described source-drain electrode and described active layer respectively, the top of described second grid insulating barrier contacts；Institute
The contact interface that the top of the bottom and described second grid insulating barrier of stating source-drain electrode is formed is step-like interface.
5. according to the thin film transistor (TFT) according to any one of Claims 1 to 4, it is characterised in that the material of described light shield layer is
Electric conductivity light screening material or non-conductive light screening material.
Thin film transistor (TFT) the most according to claim 5, it is characterised in that when described light shield layer is positioned at described thin film transistor (TFT)
Grid layer and gate insulator between, the material of described light shield layer is non-conductive light screening material.
Thin film transistor (TFT) the most according to claim 5, it is characterised in that when described light shield layer is positioned at described thin film transistor (TFT)
Gate insulator in, described electric conductivity light screening material is identical with black matrix material.
Thin film transistor (TFT) the most according to claim 1, it is characterised in that the thickness of described light shield layer is
Thin film transistor (TFT) the most according to claim 1, it is characterised in that the material of described active layer is that oxide is partly led
Body.
Thin film transistor (TFT) the most according to claim 9, it is characterised in that the material of described active layer is the oxidation of indium gallium zinc
Thing, tin indium oxide or indium zinc oxide.
11. thin film transistor (TFT)s according to claim 1, it is characterised in that described thin film transistor (TFT) is back of the body channel-etch type
Thin film transistor (TFT) or etch stopper type thin film transistor (TFT).
12. 1 kinds of array base paltes, it is characterised in that include the thin film transistor (TFT) according to any one of claim 1～11.
13. array base paltes according to claim 12, it is characterised in that described thin film transistor (TFT) is formed at underlay substrate
On, the light shield layer in described thin film transistor (TFT) is positioned at the alternatively non-transparent region of described array base palte.
14. array base paltes according to claim 13, it is characterised in that when the material of the active layer in described thin film transistor (TFT)
When material is for oxide semiconductor, described underlay substrate is flexible substrate substrate.
15. 1 kinds of display devices, it is characterised in that include that right wants the array base palte according to any one of 12～14.
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| CN201610665990.XA CN106328714A (en) | 2016-08-12 | 2016-08-12 | Thin-film transistor, array substrate and display device |
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| WO2018166088A1 (en) * | 2017-03-14 | 2018-09-20 | 惠科股份有限公司 | Display panel and manufacturing method therefor |
| WO2018205596A1 (en) * | 2017-05-11 | 2018-11-15 | 京东方科技集团股份有限公司 | Thin film transistor and manufacturing method thereof, array substrate, display panel, and display device |
| CN109192736A (en) * | 2018-09-04 | 2019-01-11 | 京东方科技集团股份有限公司 | Thin-film transistor array base-plate and preparation method thereof, display device |
| CN111384071A (en) * | 2020-03-25 | 2020-07-07 | 京东方科技集团股份有限公司 | Pixel structure, array substrate, display device and manufacturing method |
| CN112490282A (en) * | 2020-12-03 | 2021-03-12 | Tcl华星光电技术有限公司 | Thin film transistor and preparation method thereof |
| CN114002887A (en) * | 2021-11-01 | 2022-02-01 | 武汉华星光电技术有限公司 | Array substrate and display panel |
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| WO2018166088A1 (en) * | 2017-03-14 | 2018-09-20 | 惠科股份有限公司 | Display panel and manufacturing method therefor |
| US10996502B2 (en) | 2017-03-14 | 2021-05-04 | HKC Corporation Limited | Display panel and method of manufacturing the same |
| WO2018205596A1 (en) * | 2017-05-11 | 2018-11-15 | 京东方科技集团股份有限公司 | Thin film transistor and manufacturing method thereof, array substrate, display panel, and display device |
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| CN111384071A (en) * | 2020-03-25 | 2020-07-07 | 京东方科技集团股份有限公司 | Pixel structure, array substrate, display device and manufacturing method |
| CN111384071B (en) * | 2020-03-25 | 2023-04-07 | 京东方科技集团股份有限公司 | Pixel structure, array substrate, display device and manufacturing method |
| CN112490282A (en) * | 2020-12-03 | 2021-03-12 | Tcl华星光电技术有限公司 | Thin film transistor and preparation method thereof |
| CN114002887A (en) * | 2021-11-01 | 2022-02-01 | 武汉华星光电技术有限公司 | Array substrate and display panel |
| CN114002887B (en) * | 2021-11-01 | 2022-10-04 | 武汉华星光电技术有限公司 | Array substrate and display panel |
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