CN113889555B - Preparation method of MWT heterojunction solar cell - Google Patents
Preparation method of MWT heterojunction solar cell Download PDFInfo
- Publication number
- CN113889555B CN113889555B CN202111477216.3A CN202111477216A CN113889555B CN 113889555 B CN113889555 B CN 113889555B CN 202111477216 A CN202111477216 A CN 202111477216A CN 113889555 B CN113889555 B CN 113889555B
- Authority
- CN
- China
- Prior art keywords
- silicon wafer
- printing
- mwt
- amorphous silicon
- ring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000002360 preparation method Methods 0.000 title abstract description 9
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 72
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 72
- 239000010703 silicon Substances 0.000 claims abstract description 72
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 36
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims abstract description 28
- 229910052709 silver Inorganic materials 0.000 claims abstract description 28
- 239000004332 silver Substances 0.000 claims abstract description 28
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims abstract description 7
- 238000007639 printing Methods 0.000 claims description 30
- 239000003292 glue Substances 0.000 claims description 28
- 238000000151 deposition Methods 0.000 claims description 26
- 238000005530 etching Methods 0.000 claims description 23
- 238000001035 drying Methods 0.000 claims description 20
- 238000000034 method Methods 0.000 claims description 15
- 239000002002 slurry Substances 0.000 claims description 12
- 230000003647 oxidation Effects 0.000 claims description 8
- 238000007254 oxidation reaction Methods 0.000 claims description 8
- 238000004140 cleaning Methods 0.000 claims description 7
- 238000005498 polishing Methods 0.000 claims description 7
- 230000003749 cleanliness Effects 0.000 claims description 5
- 238000005553 drilling Methods 0.000 claims description 5
- 238000007650 screen-printing Methods 0.000 claims description 5
- 238000005406 washing Methods 0.000 claims description 5
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 5
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 claims description 3
- 239000012459 cleaning agent Substances 0.000 claims description 3
- 239000013078 crystal Substances 0.000 claims description 3
- 238000005096 rolling process Methods 0.000 claims description 3
- 239000000758 substrate Substances 0.000 abstract description 4
- 239000010408 film Substances 0.000 description 26
- 238000005229 chemical vapour deposition Methods 0.000 description 14
- 238000002955 isolation Methods 0.000 description 11
- 230000008021 deposition Effects 0.000 description 8
- 239000000463 material Substances 0.000 description 8
- 230000000694 effects Effects 0.000 description 6
- 238000004806 packaging method and process Methods 0.000 description 6
- 125000006850 spacer group Chemical group 0.000 description 6
- 238000009413 insulation Methods 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 5
- 230000002159 abnormal effect Effects 0.000 description 3
- 238000010521 absorption reaction Methods 0.000 description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 239000000654 additive Substances 0.000 description 2
- 230000000996 additive effect Effects 0.000 description 2
- 239000003513 alkali Substances 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 238000005266 casting Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- 230000001590 oxidative effect Effects 0.000 description 2
- 238000004080 punching Methods 0.000 description 2
- 238000005215 recombination Methods 0.000 description 2
- 230000006798 recombination Effects 0.000 description 2
- 238000000926 separation method Methods 0.000 description 2
- 239000002585 base Substances 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 238000004804 winding Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/20—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
- H01L31/202—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials including only elements of Group IV of the Periodic System
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
- H01L31/022441—Electrode arrangements specially adapted for back-contact solar cells
- H01L31/02245—Electrode arrangements specially adapted for back-contact solar cells for metallisation wrap-through [MWT] type solar cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
- H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type
- H01L31/0745—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
- H01L31/0747—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells comprising a heterojunction of crystalline and amorphous materials, e.g. heterojunction with intrinsic thin layer or HIT® solar cells; solar cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
Landscapes
- Engineering & Computer Science (AREA)
- Sustainable Energy (AREA)
- Life Sciences & Earth Sciences (AREA)
- Electromagnetism (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Sustainable Development (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Photovoltaic Devices (AREA)
Abstract
The invention discloses a preparation method of an MWT heterojunction solar cell, wherein a cell structure sequentially comprises a front-side conductive TCO layer, a front-side N-type doped amorphous silicon layer, a front-side intrinsic amorphous silicon layer, an N-type monocrystalline silicon substrate, a back-side intrinsic amorphous silicon layer, a back-side P-type doped amorphous silicon layer and a back-side TCO conductive layer, wherein the front side is of a textured structure, and the back side is a polished surface; the front electrode is silk-screen low-temperature silver paste, the silk-screen low-temperature silver paste is gathered and penetrates to the back through a hole formed in a silicon wafer before texturing, the back electrode is a silk-screen silver electrode, the positive electrode and the negative electrode on the back are insulated and isolated, and the MWT-HJT battery structure adopts the negative electrode point structure as claimed in claim 7.
Description
Technical Field
The invention relates to an MWT heterojunction solar cell more suitable for mass production and a preparation method thereof, belonging to the field of silicon-based solar cell manufacturing.
Background
MWT is a metal perforation winding technology, is applied to a solar cell, realizes a perforation process on a primary silicon wafer through laser or other methods, achieves the purpose of leading positive and negative electrodes to the same surface, reduces shading area by a special main-grid-free design, increases current density of the cell, and improves conversion efficiency;
the heterojunction silicon-based battery is a high-efficiency photovoltaic battery, generally adopts an N-type silicon wafer with a long minority carrier lifetime, combines an intrinsic amorphous silicon passivation layer and an emitter of a P-type amorphous silicon doping layer to obtain a heterogeneous PN junction structure, has low process temperature (200 ℃) in the whole process, and can use an ultrathin silicon wafer. However, the amorphous silicon film layer influences the absorption of the heterojunction cell to light, so that the current density is low, and the combination of the MWT technology and the heterojunction cell can complement each other, thereby being beneficial to obtaining a better electrical property result.
CN 113113113501A mentions that in the preparation of MWT heterojunction solar cell, an insulating etching manner is required to be performed around the back hole metal electrode to electrically isolate the hole metal electrode region from the P-type amorphous silicon thin film and the transparent conductive film (TCO) thereon, so as to prevent short circuit with the back positive electrode region, thereby realizing the production and manufacture of the MWT heterojunction silicon solar cell. At present, the MWT component generally adopts a back contact type packaging mode, a battery piece and a conductive core board are insulated and separated by a layer of EPE material, and a positive pole and a negative pole of the battery piece are connected with the conductive core board through openings of the EPE material corresponding to electrode points of the battery. Therefore, the separation diameter of the anode of the MWT heterojunction battery and the conductive oxide on the back surface is limited by the size of the opening of the EPE material in the component, and a certain error is laid on the component material, so that the opening of the EPE material is larger, the inner diameter of the battery piece separation ring is larger, the PN junction in the ring fails, and the effective area of the PN junction of the battery is reduced.
Disclosure of Invention
In view of the problems in the prior art, the present application aims to provide a preparation process method for an MWT heterojunction battery, which can reduce the diameter of a negative electrode point TCO spacer ring, increase the effective utilization area of a PN junction on the back of the MWT structure heterojunction battery, improve the battery efficiency and power, improve the insulation effect inside and outside the negative electrode TCO spacer ring, reduce the leakage failure ratio, and improve the yield; the opening size of the EPE material for packaging the component can be adapted, the process window is increased, abnormal contact between the positive and negative electrode points and the conductive core plate during battery packaging is effectively avoided, and the power and yield of the component are improved.
The invention relates to a preparation method of an MWT heterojunction solar cell, which comprises the following steps:
step 5, depositing an intrinsic amorphous silicon film on the front surface and the back surface of the silicon wafer by using CVD;
and 11, printing an annular insulating glue outside the silver cathode point, wherein the diameter of an inner ring of the annular insulating glue is consistent with that of the silver cathode point, the diameter of an outer ring of the annular insulating glue is 4.5-6mm, and then drying the silicon wafer.
Further, the annular insulating glue in the step 11 covers the surface of the printing etching ring.
Further, the drying in the step 11 is drying in an environment of 120 ℃ to 160 ℃.
Further, the thickness of the annular insulating glue is 5 to 15 micrometers.
Further, the silicon wafer is a P-type silicon wafer, an N-type single crystal or polycrystal or ingot casting single crystal silicon wafer.
Furthermore, the inner diameter of the etching ring and the diameter of the negative electrode point which is larger than the silver are printed by 1-5 mu m.
The beneficial effect of this application does:
the invention provides a preparation process method of an MWT heterojunction battery and a cathode structure, wherein after printing of the MWT heterojunction battery is completed, insulating glue printing is added around a cathode point, an isolation ring and surrounding TCO are covered, the inner diameter of the isolation ring can be minimized, the PN junction failure area of the back caused by isolation is reduced, the PN junction effective utilization area of the back of the battery is increased, and the efficiency and the power of the battery are improved; the insulating glue can also improve the insulating effect inside and outside the negative electrode TCO spacer ring, reduce the leakage failure proportion and improve the yield; the current density of the MWT heterojunction cell can be improved, and the efficiency and the power of the MWT heterojunction cell can be improved. The use of the insulating glue on the battery can adapt to the opening size of the EPE material packaged by the component, the process window of the component is increased, the abnormal contact between the positive and negative electrode points and the conductive core plate during the packaging of the battery is effectively avoided, and the power and the yield of the component are improved.
Drawings
FIG. 1 is a diagram of a MWT heterojunction cell architecture;
FIG. 2 is a diagram of a battery back electrode layout;
FIG. 3 is a partial view of the silver cathode dots, the isolating ring and the insulating glue on the back surface of the battery;
in the figure, 1-front electrode grid line; 2-TCO; 3-doping N-type amorphous silicon; 4-intrinsic amorphous silicon; 5-doping P-type amorphous silicon; 6-positive pole of back; 7-a spacer ring; 8-plugging the hole cathode point; 9-N type base silicon; 10-insulating rubber ring.
Detailed Description
The invention is described in detail below with reference to the accompanying drawings:
example 1
This embodiment is a method for manufacturing an MWT heterojunction solar cell, including the following steps:
step 5, depositing an intrinsic amorphous silicon film on the front surface and the back surface of the silicon wafer by using CVD;
and 11, printing an annular insulating glue outside the silver cathode point, wherein the diameter of an inner ring of the annular insulating glue is consistent with that of the silver cathode point, the diameter of an outer ring of the annular insulating glue is 4.5-6mm, and then drying the silicon wafer.
Further, the annular insulating glue in the step 11 covers the surface of the printing etching ring.
Further, the drying in the step 11 is drying in an environment of 120 ℃ to 160 ℃.
Further, the thickness of the annular insulating glue is 5-15 μm.
Further, the silicon wafer is a P-type silicon wafer, an N-type single crystal or polycrystal or ingot casting single crystal silicon wafer.
Based on the technical scheme, an experimental group and a comparison group are designed to further explain the technical effects of the application.
The invention provides a preparation process method of an MWT heterojunction battery, wherein after printing of the MWT heterojunction battery is completed, insulating glue printing is added around a cathode point to cover an isolation ring and surrounding TCO, so that the minimization of the inner diameter of the isolation ring can be realized, the PN junction failure area caused by isolation on the back side is reduced, the PN junction effective utilization area on the back side of the battery is increased, and the efficiency and the power of the battery are improved; the insulating glue can also improve the insulating effect inside and outside the negative electrode TCO spacer ring, reduce the leakage failure proportion and improve the yield; the current density of the MWT heterojunction cell can be improved, and the efficiency and the power of the MWT heterojunction cell can be improved. The use of the insulating glue on the battery can adapt to the opening size of the EPE material for packaging the component, the process window of the component is increased, the abnormal contact between the positive and negative electrode points and the conductive core plate during the packaging of the battery is effectively avoided, and the power and the yield of the component are improved.
Experimental group
1. Silicon chip: an N-type single crystal silicon wafer was used as a substrate.
2. Laser drilling: and punching holes on the silicon wafer according to a 6 multiplied by 6 hole lattice pattern to form circular holes with the diameter of 0.2 mm.
3. Polishing and oxidizing: and (3) polishing the two sides of the perforated silicon wafer, wherein the front side of the silicon wafer is oxidized by using tubular thermal oxygen at the temperature of 180 ℃ and the oxygen flow of 2000sccm, and a 5nm oxide layer is formed on the front side.
4. Texturing and cleaning: alkali and a single-side texturing additive (TS 03) are adopted for single-side texturing, a damaged layer on the surface of a silicon wafer is removed, and the recombination rate of photon-generated carriers is reduced; meanwhile, a uniform suede is formed on the front side of the silicon wafer, so that a light trapping effect can be achieved, and the absorption to light is improved; the RCA cleaning improves the cleanliness of the surface of the silicon wafer.
5. Deposition of an intrinsic amorphous silicon layer: and depositing a 5nm intrinsic amorphous silicon film on the front surface and the back surface of the silicon wafer by using CVD.
6. Front N-type amorphous silicon deposition: an N-type doped amorphous silicon film was deposited on the front surface by CVD to a film thickness of 8nm.
7. And (3) back surface P-type amorphous silicon deposition, namely depositing a P-type doped amorphous silicon film on the back surface by using CVD (chemical vapor deposition), wherein the film thickness is 8nm.
8. Carrying out TCO conductive film deposition on two sides: and (3) depositing a conductive film TCO on the front surface and the back surface by using PVD, wherein the thickness of the film layer is 90nm.
9. Insulation: printing TCO etching slurry around the holes with the back surface of 6 multiplied by 6, wherein the width of the printing slurry is 0.1mm, and the annular inner diameter is 1.6mm; drying and etching at 150 ℃, realizing insulation and isolation of TCO near the holes, washing with pure water and drying.
10. Metallization: screen printing low-temperature slurry, and sequentially printing a hole-plugging negative electrode point (diameter is 1.4 mm), a back electrode and a front grid line; drying and curing at a temperature lower than 200 ℃ to form good ohmic contact.
11. Printing insulating glue: and printing annular insulating glue with the outer ring diameter of 4.6mm and the inner ring diameter consistent with the diameter of the cathode point along the circular cathode point, and quickly drying at 160 ℃ for 1 min.
Example 2: comparison group
1. Silicon chip: an N-type single crystal silicon wafer was used as a substrate.
2. Laser drilling: and punching holes on the silicon wafer according to a 6 multiplied by 6 hole lattice pattern to form circular holes with the diameter of 0.2 mm.
3. Polishing and oxidizing: and (3) polishing the two sides of the perforated silicon wafer, wherein the front side of the silicon wafer is oxidized by tubular thermal oxidation at 180 ℃ under the oxygen flow of 2000sccm, and a 5nm oxidation layer is formed on the front side.
4. Texturing and cleaning: alkali and a single-side texturing additive (TS 03) are adopted for single-side texturing, a damaged layer on the surface of a silicon wafer is removed, and the recombination rate of photon-generated carriers is reduced; meanwhile, a uniform suede is formed on the front side of the silicon wafer, so that the light trapping effect can be achieved, and the absorption to light is improved; the RCA cleaning improves the cleanliness of the surface of the silicon wafer.
5. Deposition of an intrinsic amorphous silicon layer: and depositing a 5nm intrinsic amorphous silicon film on the front surface and the back surface of the silicon wafer by using CVD.
6. Front N-type amorphous silicon deposition: an N-type doped amorphous silicon film was deposited on the front surface by CVD to a film thickness of 8nm.
7. And (3) back surface P-type amorphous silicon deposition, namely depositing a P-type doped amorphous silicon film on the back surface by using CVD (chemical vapor deposition), wherein the film thickness is 8nm.
8. Carrying out TCO conductive film deposition on two sides: and (3) depositing a conductive film TCO on the front surface and the back surface by using PVD, wherein the thickness of the film layer is 90nm.
9. Insulation: printing TCO etching slurry around the 6 x 6 holes on the back surface, wherein the width of the printing slurry is 0.1mm, and the annular inner diameter is 4.6mm; drying and etching at 150 ℃, realizing insulation and isolation of TCO near the holes, washing with pure water and drying.
10. Metallization: screen printing low-temperature slurry, and sequentially printing a hole-plugging negative electrode point (diameter is 1.4 mm), a back electrode and a front grid line; drying and curing at the temperature lower than 200 ℃ to form good ohmic contact.
Comparing the battery piece of the above embodiment 1 with the battery piece of the embodiment 2 in the IV test, the embodiment 1 has the advantages of small diameter of the isolation ring, increased effective area of the PN junction, obvious current increase, and at least 0.44 of significant improvement of efficiency:
| comparison of | Diameter of spacer ring | Eta | Voc/V | Isc/A | FF | Rsh |
| Example 1 | 1.6mm | 24.71 | 0.745 | 10.672 | 85.2 | 890 |
| Example 2 | 4.6mm | 24.27 | 0.744 | 10.447 | 85.6 | 921 |
Example 2
As shown in fig. 3, the application further provides a negative electrode structure of an MWT heterojunction solar cell, wherein the negative electrode point structure includes a hole, the hole penetrates through a silicon wafer, a low-temperature silver paste fills the hole to form a silver negative electrode point, and on the back surface of the silicon wafer, a distance is formed between the outside of the silver negative electrode point and the silver negative electrode point, and an isolation ring is arranged, and the isolation ring is obtained by etching TCO etching paste; and annular insulating glue is arranged on the surface of the isolating ring.
Furthermore, the diameter of the inner ring of the annular insulating glue is consistent with that of the silver cathode point, and the diameter of the outer ring of the annular insulating glue is 4.5-6mm.
Example 3
Based on the cathode point structure, the application also provides an MWT-HJT battery structure, which sequentially comprises a front conductive TCO layer, a front N-type doped amorphous silicon layer, a front intrinsic amorphous silicon layer, an N-type monocrystalline silicon substrate, a back intrinsic amorphous silicon layer, a back P-type doped amorphous silicon layer and a back TCO conductive layer, wherein the front is of a textured structure, and the back is a polished surface; the front electrode is silk-screen low-temperature silver paste, the silk-screen low-temperature silver paste is gathered and penetrates to the back through a hole formed in the silicon wafer before texturing, the back electrode is a silk-screen silver electrode, the positive electrode and the negative electrode on the back are insulated and isolated, and insulating glue is printed around the negative electrode points.
The above description is only exemplary of the present application and should not be taken as limiting the present application, as any modification, equivalent replacement, or improvement made within the spirit and principle of the present application should be included in the protection scope of the present application.
Claims (4)
1. A method for fabricating an MWT heterojunction solar cell, comprising the steps of:
step 1, selecting a silicon wafer;
step 2, carrying out laser drilling on the silicon chip to obtain an NxN hole lattice;
step 3, polishing the two sides of the perforated silicon wafer, and performing chain type ozone oxidation or tubular type thermal oxidation on the front side of the silicon wafer to form an oxide layer on the front side;
step 4, carrying out single-side texturing on the back of the silicon wafer, and removing a damaged layer on the surface of the silicon wafer; simultaneously forming a uniform suede on the front side of the silicon wafer; cleaning the silicon wafer by using an RCA (Rolling circle reactor) cleaning agent, so that the cleanliness of the surface of the silicon wafer is improved;
step 5, depositing an intrinsic amorphous silicon film on the front surface and the back surface of the silicon wafer by using CVD;
step 6, depositing an N-type doped amorphous silicon film on the front surface of the silicon wafer by using CVD;
step 7, depositing a P-type doped amorphous silicon film on the back surface of the silicon wafer by using CVD;
step 8, depositing a conductive film TCO on the front surface and the back surface by using PVD;
step 9, printing annular TCO etching slurry around the hole to form a printing etching ring, and then washing and drying the printing etching ring by pure water;
step 10, adopting screen printing low-temperature slurry to sequentially print hole plugging electrodes, namely silver cathode points, back grid lines, anode points and front silver grid lines covering the holes; then drying and curing;
step 11, printing an annular insulating glue outside the silver cathode point, wherein the diameter of an inner ring of the annular insulating glue is consistent with that of the silver cathode point, the diameter of an outer ring of the annular insulating glue is 4.5-6mm, and then drying the silicon wafer;
the inner diameter of the printing etching ring is 1 to 5 mu m larger than the diameter of the silver negative electrode point;
and covering the surface of the printing etching ring with the annular insulating glue in the step 11.
2. The method of claim 1, wherein the baking in step 11 is performed in an environment of 120-160 ℃.
3. The method for preparing the MWT heterojunction solar cell according to claim 1, wherein the thickness of the annular insulating glue is 5-15 μm.
4. The method of any of claims 1-3, wherein the silicon wafer is a P-type silicon wafer, an N-type single crystal or a polycrystalline or ingot-cast single crystal silicon wafer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111477216.3A CN113889555B (en) | 2021-12-06 | 2021-12-06 | Preparation method of MWT heterojunction solar cell |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111477216.3A CN113889555B (en) | 2021-12-06 | 2021-12-06 | Preparation method of MWT heterojunction solar cell |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN113889555A CN113889555A (en) | 2022-01-04 |
| CN113889555B true CN113889555B (en) | 2022-12-16 |
Family
ID=79016367
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202111477216.3A Active CN113889555B (en) | 2021-12-06 | 2021-12-06 | Preparation method of MWT heterojunction solar cell |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113889555B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114530525A (en) * | 2022-01-27 | 2022-05-24 | 江苏日托光伏科技股份有限公司 | Preparation method and application of non-silver metallized structure |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN209199951U (en) * | 2018-12-24 | 2019-08-02 | 江苏日托光伏科技股份有限公司 | A kind of hetero-junctions MWT double-sided solar battery piece |
| CN110212048A (en) * | 2019-05-30 | 2019-09-06 | 泰州隆基乐叶光伏科技有限公司 | Back contacts lamination solar battery string and back contacts lamination solar module |
| CN112599632A (en) * | 2020-11-25 | 2021-04-02 | 无锡日托光伏科技有限公司 | MWT battery preparation method and MWT battery |
| CN113113501A (en) * | 2021-04-26 | 2021-07-13 | 江苏日托光伏科技股份有限公司 | MWT heterojunction solar cell and preparation method thereof |
-
2021
- 2021-12-06 CN CN202111477216.3A patent/CN113889555B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN113889555A (en) | 2022-01-04 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN109244194B (en) | Preparation method of low-cost P-type full back electrode crystalline silicon solar cell | |
| CN104584237B (en) | Photovoltaic element and its manufacture method | |
| KR101160112B1 (en) | A fabricating method of buried contact solar cell | |
| CN113113501A (en) | MWT heterojunction solar cell and preparation method thereof | |
| KR100850641B1 (en) | Fabrication method of high-efficiency crystalline silicon solar cells | |
| CN108666376B (en) | P-type back contact solar cell and preparation method thereof | |
| CN102437243A (en) | Heterojunction with intrinsic thin layer (HIT) solar cell structure with heterogeneous floating junction back passivation, and preparation process thereof | |
| KR20100138565A (en) | Sollar cell and fabrication method thereof | |
| CN108666386B (en) | P-type back contact solar cell and preparation method thereof | |
| CN113644142A (en) | Solar cell with passivation contact and preparation method thereof | |
| JP6363335B2 (en) | Photoelectric device and method for manufacturing photoelectric device | |
| JP2004512674A (en) | Solar cell manufacturing method, and solar cell manufactured by the method | |
| CN111477694A (en) | Back contact heterojunction solar cell and manufacturing method thereof | |
| CN113889555B (en) | Preparation method of MWT heterojunction solar cell | |
| KR101612133B1 (en) | Metal Wrap Through type solar cell and method for fabricating the same | |
| US11799040B2 (en) | Solar cell and photovoltaic module | |
| CN103594532A (en) | Manufacturing method for N type crystalline silicon solar cell | |
| CN216597603U (en) | Back contact heterojunction solar cell capable of improving insulation and isolation effects | |
| KR20130042435A (en) | Photoelectric device | |
| JP2015159198A (en) | Photovoltaic element, manufacturing method therefor and manufacturing apparatus therefor | |
| JP4169463B2 (en) | Photovoltaic element manufacturing method | |
| CN115440839A (en) | Solar cell and preparation method thereof | |
| US20080092950A1 (en) | Solar Cell Structure With Rear Contacts and Current Collection by Transistor Effect, and Procedure for its Manufacture | |
| KR101198430B1 (en) | Bifacial Photovoltaic Localized Emitter Solar Cell and Method for Manufacturing Thereof | |
| KR100960626B1 (en) | Solar Cell And Method For Manufacturing The Same |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20221123 Address after: 20 Xishi Road, Xinwu District, Wuxi City, Jiangsu Province Applicant after: JIANGSU SUNPORT PHOTOVOLTAIC TECHNOLOGY Co.,Ltd. Address before: 211800 no.28-10, Lanhua Road, Qiaolin Street Industrial Park, Pukou District, Nanjing City, Jiangsu Province Applicant before: NANJING RITUO PHOTOVOLTAIC NEW ENERGY Co.,Ltd. |
|
| TA01 | Transfer of patent application right | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |