CN113871294A - Processing method for metal-assisted photochemical etching of silicon carbide nanopore array - Google Patents
Processing method for metal-assisted photochemical etching of silicon carbide nanopore array Download PDFInfo
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
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- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
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- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
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- H01L21/3105—After-treatment
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Abstract
The invention relates to the field of silicon carbide etching processing, in particular to a processing method for metal-assisted photochemical etching of a silicon carbide nano-pore array, which plates a noble metal layer on the bottom surface of a silicon carbide wafer as a catalyst layer and deposits a metal mask which does not react with an etching agent on the top surface of the silicon carbide wafer to realize high-efficiency metal-assisted photochemical etching, and the space between the silicon carbide nano-pores is controlled by self-assembling the polystyrene nano-microspheres with different diameters, the aperture of the silicon carbide nanometer hole is controlled by controlling the time of etching the polystyrene nanometer microsphere by the plasma, the depth of the hole is controlled by controlling the metal-assisted photochemical etching time so as to controllably prepare the silicon carbide nano-hole array, the problem of slow etching rate of the existing metal-assisted photochemical etching is solved, and solves the problem that the silicon carbide nano-pore array is photochemically etched under the assistance of metal which is not utilized at present.
Description
Technical Field
The invention relates to the field of silicon carbide etching processing, in particular to a processing method for performing metal-assisted photochemical etching on a silicon carbide nanopore array.
Background
Silicon carbide is widely used in high-temperature, high-frequency and high-power electronic devices as a third-generation semiconductor due to its excellent physical and chemical properties. Particularly in the field of new energy automobiles, silicon carbide is the first choice of power chip materials. However, since silicon carbide has good chemical stability, it is difficult to process it effectively by the conventional wet etching method. Therefore, dry etching is currently used in industry for processing silicon carbide wafers, but due to its low etching selectivity, the surface of the substrate material is easily damaged. Furthermore, dry etching requires vacuum pumping and high temperature, making the equipment expensive. The wet etching has the advantages of high etching selectivity, simple and convenient operation, low cost and the like. Therefore, it is desirable to provide a new wet etching method for processing silicon carbide that is efficient and controllable.
At present, the wet etching method for effectively etching silicon carbide comprises the following steps: anodic etching, metal assisted anodic etching, photoelectrochemical etching, and metal assisted photochemical etching. Anodic etching, metal-assisted anodic etching and photoelectrochemical etching all need to carry out electrical contact on a substrate, the substrate is connected with an anode, etching liquid is connected with a cathode, and an external electric field is generated by applying a certain external bias voltage, so that holes in the substrate are gathered at the substrate/etching liquid interface under the action of the electric field, the hole concentration at the interface is improved, the etching rate is improved, and the silicon carbide is effectively etched. However, due to the non-uniform distribution of the electric field, the etched holes or nanowires are randomly distributed, and the structural size cannot be precisely controlled.
The metal-assisted photochemical etching is to deposit a layer of noble metal on the surface of the substrate, to be used as a catalyst layer and a mask, and to irradiate the surface with ultraviolet light, and the area which is not covered by the noble metal layer is etched. The etching mechanism is as follows: in the case of an n-type semiconductor, a positive space charge region is formed on the semiconductor surface due to a contact potential difference generated at the contact interface between the noble metal/semiconductor and the etching liquid/semiconductor, and the contact barrier of the semiconductor surface in contact with the noble metal is higher than that of the semiconductor surface in contact with the etching liquid, so that holes flow from a high barrier to a low barrier, that is, holes are accumulated on the semiconductor surface in contact with the etching liquid. Meanwhile, ultraviolet light irradiates the semiconductor to generate photoproduction holes on the surface of the semiconductor, so that the hole concentration of the surface of the semiconductor contacted with the etching liquid is further improved, and the etching reaction rate is further improved.
The metal-assisted photochemical etching has simpler processing flow because no electric contact is needed and no external bias is additionally applied. However, the metal-assisted photochemical etching has the disadvantage of slow etching rate, and the distribution and size of the nanopore array obtained by preparing the silicon carbide nanopore array by using the metal-assisted photochemical etching are difficult to control at present.
Therefore, it is highly desirable to provide a method for processing a silicon carbide nanopore array by efficient and controllable metal-assisted photochemical etching, so that the processing rate is improved, and the processed nanopore array has controllable distribution and size.
Disclosure of Invention
Aiming at the problems brought forward by the background technology, the invention aims to provide a processing method for photochemical etching of a silicon carbide nano-pore array assisted by metal, the precious metal layer is plated on the bottom surface of the silicon carbide wafer to be used as a catalyst layer, and a layer of metal mask which does not react with an etching agent is deposited on the top surface of the silicon carbide wafer to realize high-efficiency metal-assisted photochemical etching, and the space between the silicon carbide nano-pores is controlled by self-assembling the polystyrene nano-microspheres with different diameters, the aperture of the silicon carbide nanometer hole is controlled by controlling the time of etching the polystyrene nanometer microsphere by the plasma, the depth of the hole is controlled by controlling the metal-assisted photochemical etching time so as to controllably prepare the silicon carbide nano-hole array, the problem of slow etching rate of the existing metal-assisted photochemical etching is solved, and the problem that the size of the silicon carbide nano-pore array processed by metal-assisted photochemical etching is difficult to control at present is solved.
In order to achieve the purpose, the invention adopts the following technical scheme:
a processing method for metal-assisted photochemical etching of a silicon carbide nanopore array comprises the following steps:
step (1): cleaning a silicon carbide wafer;
step (2): self-assembling a single-layer close-packed polystyrene nano microsphere on the top surface of the cleaned silicon carbide wafer;
and (3): depositing a metal mask which does not react with the etching agent on the top surface of the silicon carbide wafer, and depositing a noble metal layer on the bottom surface of the silicon carbide wafer;
and (4): soaking the silicon carbide wafer obtained in the step (3) in acetone, and performing ultrasonic cleaning;
and (5): immersing the silicon carbide wafer obtained in the step (4) in etching liquid, and irradiating ultraviolet light on the top surface of the silicon carbide wafer to perform metal-assisted photochemical etching;
and (6): and stopping the etching reaction, and cleaning the silicon carbide wafer to obtain the silicon carbide nanopore array.
Further, before the step (3), etching the self-assembled monolayer close-packed polystyrene nano-microspheres on the top surface of the silicon carbide wafer in the step (2) by using plasma, wherein the monolayer close-packed polystyrene nano-microspheres become monolayer non-close-packed polystyrene nano-microspheres.
Further, in the step (3), the metal mask is one of a Ti mask, a Pt mask, an Au mask and an Ag mask;
the noble metal layer is a Pt metal layer or an Ag metal layer.
Further, in the step (3), the thickness of the metal mask is 7-14nm, and the thickness of the noble metal layer is 20-100 nm.
Further, in the step (5), the raw material of the etching solution includes H2O, HF and H2O2Said H is2O, said HF and said H2O2Is 21: 6: 5;
the mass fraction of HF is 45-52 wt.%, and H is2O2Is 25-35 wt.%.
Further, in the step (2), spin-coating polystyrene nano-microsphere colloid on the top surface of the silicon carbide wafer by using a spin coater to form a single-layer close-packed polystyrene nano-microsphere;
the diameter of the monolayer close-packed polystyrene nano-microsphere is 50 nm-1 μm.
Further, in the step (5), the wavelength of the ultraviolet light is 365nm, and the power density is 2200mW/cm2。
Further, in the step (5), the metal-assisted photochemical etching is carried out for 5-60min to obtain the silicon carbide nano-pore array with the pore depth of 50-642 nm.
Further, in the step (1), the specific steps of cleaning the silicon carbide wafer are as follows: and ultrasonically cleaning the silicon carbide wafer for 3-7min by using absolute ethyl alcohol and deionized water respectively, blow-drying by using nitrogen, and then cleaning for 3-7min by using plasma.
Further, in the step (1), the silicon carbide wafer is an N-type silicon carbide wafer of 5 × 5 mm.
The technical scheme has the following beneficial effects:
1. the technical scheme includes that a single-layer self-assembly close-packed polystyrene nano microsphere is arranged on the top surface of a silicon carbide wafer, the diameter of the polystyrene nano microsphere is reduced by plasma etching, a metal layer which does not react with etching liquid is deposited on the top surface of the silicon carbide wafer by a vapor deposition technology, a template with an array hole pattern is obtained, a noble metal layer is deposited on the bottom surface of the silicon carbide wafer to serve as a catalyst layer, the metal-assisted photochemical etching rate can be greatly improved, the silicon carbide wafer is immersed in the etching liquid, ultraviolet light is irradiated, the template pattern is transferred onto the silicon carbide wafer by the metal-assisted photochemical etching, the hole depth of a silicon carbide array can be controlled by controlling the metal-assisted photochemical etching time, and therefore a silicon carbide array hole structure can be processed controllably.
2. According to the technical scheme, the monolayer close-packed polystyrene nano microspheres are etched through the plasma, the diameter of the obtained monolayer non-close-packed polystyrene nano microspheres is reduced along with the increase of the plasma etching time, the plasma etching time can be adjusted as required, and the diameter of the non-close-packed polystyrene nano microspheres is controlled, so that the aperture size of the prepared silicon carbide nano-pore array is controllable.
Drawings
Fig. 1 is a schematic diagram of the presentation step (1) in embodiment 1 of the present invention.
Fig. 2 is a schematic diagram of the presentation step (2) in embodiment 1 of the present invention.
Fig. 3 is a schematic diagram of the presentation step (3) in embodiment 1 of the present invention.
Fig. 4 is a schematic diagram of the presentation step (4) in embodiment 1 of the present invention.
Fig. 5 is a schematic diagram of the presentation step (5) in embodiment 1 of the present invention.
Fig. 6 is a schematic diagram of the presentation step (7) in embodiment 1 of the present invention.
Fig. 7 is a schematic diagram of the presentation step (8) in embodiment 1 of the present invention.
Fig. 8 is a schematic view of a silicon carbide nanopillar array having a triangular prism shape manufactured in example 2 of the present invention.
Wherein: the silicon carbide wafer comprises a silicon carbide wafer 101, a single-layer close-packed polystyrene nano microsphere 201, a single-layer non-close-packed polystyrene bead 301, a metal mask 401, a noble metal layer 402, an etching solution 601, ultraviolet light 701, a silicon carbide nano-pore array 801 and a triangular prism-shaped silicon carbide nano-column array 802.
Detailed Description
The technical solution of the present invention is further described below with reference to the accompanying drawings and the detailed description.
A processing method for metal-assisted photochemical etching of a silicon carbide nanopore array comprises the following steps:
step (1): cleaning a silicon carbide wafer;
step (2): self-assembling a single-layer close-packed polystyrene nano microsphere on the top surface of the cleaned silicon carbide wafer;
and (3): depositing a metal mask which does not react with the etching agent on the top surface of the silicon carbide wafer, and depositing a noble metal layer on the bottom surface of the silicon carbide wafer;
and (4): soaking the silicon carbide wafer obtained in the step (3) in acetone, and performing ultrasonic cleaning;
and (5): immersing the silicon carbide wafer obtained in the step (4) in etching liquid, and irradiating ultraviolet light on the top surface of the silicon carbide wafer to perform metal-assisted photochemical etching;
and (6): and stopping the etching reaction, and cleaning the silicon carbide wafer to obtain the silicon carbide nanopore array.
Since the prior art only deposits the noble metal layer on the top surface, the noble metal layer needs to be used as a mask and a catalytic layer at the same time, which results in limited catalytic effect, the area of the noble metal layer inevitably decreases as the area of the etching pattern increases, and the catalytic effect is reduced at the same time, so that the etching rate is slow. When the noble metal layer is deposited on the bottom surface and is in contact with the semiconductor, the electron in the semiconductor flows to the noble metal due to the need of balancing the Fermi levels of the noble metal layer and the semiconductor, and the hole is injected into the semiconductor to form a positive space charge area on the contact surface of the semiconductor, wherein the space charge consists of the hole, so that the concentration of the hole in the semiconductor is improved, and the etching reaction rate is improved. The metal mask and the noble metal layer are separately deposited on two sides, so that the noble metal layer is not influenced by the metal mask; also, because the metal mask needs to be patterned, the area of the noble metal layer is always larger than that of the mask, which means that it is more efficient to deposit the metal mask and the noble metal layer on the top and bottom surfaces, respectively, than to deposit the noble metal layer only on the top surface.
The technical scheme includes that a single-layer self-assembly close-packed polystyrene nano microsphere is arranged on the top surface of a silicon carbide wafer, the diameter of the polystyrene nano microsphere is reduced by plasma etching, a metal layer which does not react with etching liquid is deposited on the top surface of the silicon carbide wafer by a vapor deposition technology, a template with an array hole pattern is obtained, a noble metal layer is deposited on the bottom surface of the silicon carbide wafer to serve as a catalyst layer, the metal-assisted photochemical etching rate can be greatly improved, the silicon carbide wafer is immersed in the etching liquid, ultraviolet light is irradiated, the template pattern is transferred onto the silicon carbide wafer by the metal-assisted photochemical etching, the hole depth of a silicon carbide array can be controlled by controlling the metal-assisted photochemical etching time, and therefore a silicon carbide array hole structure can be processed controllably.
Specifically, in the step (4), the silicon carbide wafer is soaked in an acetone solution and placed in an ultrasonic cleaning tank for treatment for 5-6min, so that the single-layer non-close-packed polystyrene nano microspheres on the top surface of the silicon carbide wafer can be dissolved, then the silicon carbide wafer is washed with deionized water for 2-3 times, and is dried by using nitrogen, and it is worth to say that other inert gas can be used for drying, such as argon gas, neon gas and other inert gases.
In the step (6), after the etching reaction is stopped, the carbonized wafer is washed with deionized water for 2-3 times, and dried with nitrogen gas, so that the silicon carbide nanopore array can be obtained.
The metal-assisted chemical etching is generally to plate metal on the top surface as an etching shielding layer and then immerse the metal layer in an etching agent for etching, compared with the metal-assisted chemical etching, the etching method of the technical scheme is metal-assisted photochemical etching, and the metal layer is plated on the top surface and the bottom surface of a silicon carbide wafer, compared with the single-side metal layer plating, the etching rate of silicon carbide can be effectively improved, meanwhile, ultraviolet light is irradiated during etching by the etching agent to provide photoproduction cavities, the etching rate of silicon carbide can be further effectively improved, and the aperture and the hole depth of a columnar array structure are difficult to control when the metal-assisted chemical etching is used for preparing the nanometer columnar array structure at present, but the technical scheme can provide a high-efficiency controllable processing method of the silicon carbide nanometer hole array, the spacing of the silicon carbide nanometer holes is controlled by self-assembling polystyrene nanometer microspheres with different diameters, the aperture of the silicon carbide nanometer holes is controlled by controlling the time of plasma etching the polystyrene nanometer microspheres, the depth of the hole is controlled by controlling the metal-assisted photochemical etching time, so that the silicon carbide nano-hole array can be controllably prepared.
In the technical scheme, if the metal mask is only plated on the top surface of the silicon carbide wafer, but the metal layer is not plated on the bottom surface of the silicon carbide wafer, the silicon carbide etching rate is greatly reduced.
Since silicon carbide is a wide band gap semiconductor, it can be effectively etched by metal-assisted photochemical etching.
Further, before the step (3), etching the self-assembled monolayer close-packed polystyrene nano-microspheres on the top surface of the silicon carbide wafer in the step (2) by using plasma, wherein the monolayer close-packed polystyrene nano-microspheres become monolayer non-close-packed polystyrene nano-microspheres.
It is worth to say that the plasma etching principle: in the plasma cleaning system, glow discharge reaction is utilized to activate gas in the cavity into active particles such as ions, free radicals and the like, and the active particles have active chemical properties and can react with the polystyrene nano-microspheres to form volatile products, so that the polystyrene nano-microspheres are etched.
Specifically, the monolayer close-packed polystyrene nano-microspheres are etched by plasma, the diameter of the obtained monolayer non-close-packed polystyrene nano-microspheres is reduced along with the increase of the plasma etching time, and the diameter of the non-close-packed polystyrene nano-microspheres can be controlled by adjusting the plasma etching time according to the requirement, so that the aperture size of the prepared silicon carbide nano-pore array is controllable.
Preferably, the silicon carbide wafer paved with the single-layer close-packed polystyrene nano microspheres is placed into a plasma cleaning instrument, and the single-layer close-packed polystyrene nano microspheres are etched by using plasma, in one embodiment of the technical scheme, the parameter of the plasma cleaning instrument is 100W, the vacuum degree is 0.2mbar, and the etching time of the plasma single-layer close-packed polystyrene nano microspheres is 5-60 min.
Specifically, the monolayer close-packed polystyrene nano-microspheres are etched through plasma, the diameter of the obtained monolayer non-close-packed polystyrene nano-microspheres is reduced along with the increase of the plasma etching time, and when the diameter of the monolayer close-packed polystyrene nano-microspheres is 480nm, if the etching time is 10min, the polystyrene nano-microspheres with the diameter of about 318nm can be obtained; when the etching time is 15min, the diameter of the polystyrene nano microsphere is about 176nm, and when the etching time is 20min, the diameter of the non-close-packed polystyrene nano microsphere is about 150nm, so that the diameter of the non-close-packed polystyrene nano microsphere can be controlled by adjusting the plasma etching time as required, and the size of the prepared silicon carbide nano pore array can be controlled.
Stated further, in the step (3), the metal mask is one of a Ti mask, a Pt mask, an Au mask, and an Ag mask;
the noble metal layer is a Pt metal layer or an Ag metal layer.
It is worth to be noted that different metals have different catalytic effects and can affect the etching rate of the silicon carbide wafer, the catalytic effect of Pt is strongest, the next is Au, Ag, and finally Ti, Pt, Au, Ag and Ti do not react with the etching solution, and can be used for the mask on the top surface and the metal layer on the bottom surface, and the matching of different metals can affect the etching rate of silicon carbide, for example, the metal of the metal mask is Ti and the metal of the noble metal layer is Pt, the metal of the metal mask is Ti and the metal of the noble metal layer is Au, or the metal of the metal mask is Au and the metal of the noble metal layer is Pt, but the stronger the catalytic effect is better, the holes are too strong, and the holes at the bottom of the nano-holes are diffused to the side wall, so that the side wall of the nano-holes are over-etched.
Preferably, in an embodiment of the present invention, the metal mask is a Ti mask, and the noble metal layer is a Pt metal layer, and in this case, the prepared nanopore array is preferably formed by depositing a Ti mask on the top surface of the silicon carbide wafer and a Pt metal layer on the bottom surface of the silicon carbide wafer by magnetron sputtering.
In a further description, in the step (3), the thickness of the metal mask is 7-14nm, and the thickness of the noble metal layer is 20-100 nm.
In a further description, in the step (5), the raw material of the etching solution includes H2O, HF and H2O2Said H is2O, said HF and said H2O2Is 21: 6: 5;
the mass fraction of HF is 45-52 wt.%, and H is2O2Is 25-35 wt.%.
H in the etching solution2O2As an oxidizing agent, H2O2The concentration of (A) affects the etch rate of the silicon carbide wafer, within a certain range, H2O2The higher the concentration, the higher the etch rate, the greater the etch depth of the nanopore, but if H is2O2Too high a concentration can affect the mass transport process during etching, resulting in reduced reactant and product transport rates and reduced etch rates, and thus H will be transferred2O:HF:H2O2Is set to be 21: 6: and 5, the etching rate of the etching liquid is better.
It will be preferred that, in step (5), H is in the etching solution2O2The volume of (2) is 1-10mL, when H2O2When the mass fraction of (A) is constant, H in the etching solution2O2The higher the volume of (a), the faster the etching rate.
Preferably, the mass fraction of HF is 49 wt.%, H2O2Is 30 wt.%, H2O is deionized water, HF and H2O2The mass fraction of (A) will affect the formulation of HF and H in the etching solution2O2The concentration of (c).
Further, in the step (2), the polystyrene nano microsphere colloid is spin-coated on the top surface of the silicon carbide wafer by using a spin coater to form a single-layer close-packed polystyrene nano microsphere;
the diameter of the monolayer close-packed polystyrene nano-microsphere is 50 nm-1 μm.
Specifically, the operation of the self-assembled monolayer close-packed polystyrene nano-microsphere is as follows: setting the parameters of the spin coater to be 100rpm/min, and rotating for 10min to ensure that the polystyrene nano microspheres are uniformly distributed on the top surface of the silicon carbide wafer; and setting the parameters of the spin coater to 1000rpm/min, rotating for 1min, setting the parameters of the spin coater to 2500rpm/min, rotating for 2min, throwing away excessive colloid, evaporating water in the colloid fast, and forming the densely-packed polystyrene nano microspheres on the top surface of the silicon carbide wafer.
The aperture of the silicon carbide nanopore array is related to the diameter of the single-layer non-close-packed polystyrene nanosphere.
In the step (2), the diameter of the single-layer close-packed polystyrene nano-microspheres is 50nm to micron level, and the diameter of the single-layer close-packed polystyrene nano-microspheres is equal to the distance between the microspheres because the self-assembled polystyrene nano-microspheres are close-packed, so that the distance between the close-packed polystyrene nano-microspheres with different diameters can be controlled by selecting the close-packed polystyrene nano-microspheres with different diameters as required.
In the step (5), the wavelength of the ultraviolet light is 365nm, and the power density is 2200mW/cm2。
Specifically, the silicon carbide wafer obtained in the step (4) is immersed in etching liquid, and ultraviolet light is irradiated at a position 1cm away from the top surface of the silicon carbide wafer to perform metal-assisted photochemical etching. Because ultraviolet light irradiates the top surface of the silicon carbide wafer to generate photoproduction cavities at the interface, and when the noble metal is contacted with the bottom surface of the N-type silicon carbide wafer, the energy band of the silicon carbide wafer is bent at the interface of the noble metal layer/the silicon carbide wafer to generate an internal electric field pointing to the noble metal layer from the silicon carbide wafer, a large number of cavities are gathered at the bottom surface of the silicon carbide to form high potential, and the internal cavities are gathered at the top surface of the silicon carbide wafer under the action of the high potential, so that the concentration of the cavities at the top surface of the silicon carbide wafer is improved, the etching rate is accelerated, and the silicon carbide is efficiently etched.
Further, in the step (5), the metal-assisted photochemical etching is performed for 5-60min to obtain the silicon carbide nano-pore array with the pore depth of 50-642 nm.
According to the technical scheme, the hole depth is controlled by controlling the time of the metal-assisted photochemical etching, and the deeper the hole depth of the obtained silicon carbide nano-hole array is, along with the increase of the time of the metal-assisted photochemical etching.
Further, in the step (1), the specific steps of cleaning the silicon carbide wafer are as follows: and ultrasonically cleaning the silicon carbide wafer for 3-7min by using absolute ethyl alcohol and deionized water respectively, blow-drying by using nitrogen, and then cleaning for 3-7min by using plasma.
This technical scheme uses nitrogen gas to weather, because nitrogen gas chemical property is very inactive, can avoid gas and other substances that dissolve in water to produce chemical reaction and produce sediment or other impurity.
In the step (1), the silicon carbide wafer is an N-type silicon carbide wafer of 5 × 5 mm.
The technical solution is further illustrated by the following examples.
Example 1
As shown in fig. 1-7, a method for processing a silicon carbide nanopore array by metal-assisted photochemical etching includes the following steps:
step (1): selecting an N-type silicon carbide wafer 101 with the thickness of 5 multiplied by 5mm, respectively ultrasonically cleaning the N-type silicon carbide wafer for 5min by using absolute ethyl alcohol and deionized water, blow-drying the N-type silicon carbide wafer by using nitrogen, and then cleaning the N-type silicon carbide wafer for 5min by using plasma;
step (2): on the top surface of the silicon carbide wafer 101 in the step (1), self-assembled monolayer close-packed polystyrene nano microspheres 201 are specifically operated as follows: spin-coating 7.5 μ L of polystyrene nanometer microsphere colloid 201 with diameter of 480nm on the top surface of the silicon carbide wafer by using a spin coater, wherein firstly, the parameters of the spin coater are set to be 100rpm/min, and the rotation is carried out for 10min, so that the polystyrene nanometer microspheres are uniformly distributed; secondly, setting the parameters of the spin coater to be 1000rpm/min, and rotating for 1 min; finally, setting the parameters of the spin coater to 2500rpm/min, rotating for 2min, throwing away redundant colloid, rapidly evaporating the water in the colloid, and forming a single-layer close-packed polystyrene nano microsphere colloid with the diameter of 480nm on the top surface of the silicon carbide wafer 101; etching the self-assembled monolayer close-packed polystyrene nano-microspheres on the top surfaces of the silicon carbide wafers in the step (2) by using plasma, wherein the monolayer close-packed polystyrene nano-microspheres are changed into monolayer non-close-packed polystyrene nano-microspheres 202, the parameters of a plasma cleaning instrument are 100W, the vacuum degree is 0.2mbar, no auxiliary gas is introduced, the etching time is 10min, and the polystyrene nano-microspheres with the diameter of about 318nm can be obtained;
and (3): depositing a Ti mask 401 which does not react with the etching agent on the top surface of the silicon carbide wafer in the step (2) through magnetron sputtering, and simultaneously depositing a Pt metal layer 402 on the bottom surface;
and (4): soaking the silicon carbide wafer in the step (3) in acetone, placing the silicon carbide wafer in an ultrasonic cleaning tank for treatment for about 5-6min, accelerating dissolution of polystyrene nano microspheres through ultrasonic cleaning, namely dissolving the single-layer non-close-packed polystyrene nano microspheres 202 on the top surface of the wafer, then washing the wafer with deionized water for 2-3 times, and drying the wafer with nitrogen;
and (5): immersing the silicon carbide wafer obtained in the step (5) in etching liquid 601, irradiating ultraviolet light 701 on the top surface of the silicon carbide wafer, and performing metal-assisted photochemical etching, wherein the wavelength of the ultraviolet light 701 used in the metal-assisted photochemical etching is 365nm, and the power density is 2200mW/cm2. Immersing the silicon carbide wafer obtained in the step (5) into the etching liquid prepared in the step (6), and irradiating ultraviolet light at a position 1cm away from the top surface of the wafer, wherein the etching liquid 601 is H2O:HF:H2O221: 6: 5 volume ratio of the mixed solution, H2O is deionized water, HF is 49 wt.%, H2O230 wt.%;
and (6): and stopping the etching reaction, washing the silicon carbide wafer for 2-3 times by using deionized water, and drying by using nitrogen to obtain the high-quality silicon carbide nanopore array 801.
Example 2
As shown in fig. 8, the processing method of the metal-assisted photochemical etching of the silicon carbide nanopore array of the present embodiment is similar to that of embodiment 1, but the self-assembled monolayer close-packed polystyrene nanospheres do not need to be reduced. After the self-assembly of the single-layer close-packed polystyrene nano microspheres is finished, a Ti mask which does not react with the etching liquid is directly deposited on the top surface of the silicon carbide wafer through a vapor deposition technology, a Pt metal layer is deposited on the bottom surface of the silicon carbide wafer, the silicon carbide wafer is immersed in the etching liquid, and ultraviolet light is irradiated to process the silicon carbide nano-pillar array 802 in the shape of a triangular prism.
The technical principle of the present invention is described above in connection with specific embodiments. The description is made for the purpose of illustrating the principles of the invention and should not be construed in any way as limiting the scope of the invention. Based on the explanations herein, those skilled in the art will be able to conceive of other embodiments of the present invention without inventive effort, which would fall within the scope of the present invention.
Claims (10)
1. A processing method for metal-assisted photochemical etching of a silicon carbide nanopore array is characterized by comprising the following steps:
step (1): cleaning a silicon carbide wafer;
step (2): self-assembling a single-layer close-packed polystyrene nano microsphere on the top surface of the cleaned silicon carbide wafer;
and (3): depositing a metal mask which does not react with the etching agent on the top surface of the silicon carbide wafer, and depositing a noble metal layer on the bottom surface of the silicon carbide wafer;
and (4): soaking the silicon carbide wafer obtained in the step (3) in acetone, and performing ultrasonic cleaning;
and (5): immersing the silicon carbide wafer obtained in the step (4) in etching liquid, and irradiating ultraviolet light on the top surface of the silicon carbide wafer to perform metal-assisted photochemical etching;
and (6): and stopping the etching reaction, and cleaning the silicon carbide wafer to obtain the silicon carbide nanopore array.
2. The method for processing the silicon carbide nanopore array through metal-assisted photochemical etching as claimed in claim 1, wherein the self-assembled monolayer close-packed polystyrene nanospheres on the top surface of the silicon carbide wafer in the step (2) are etched by plasma before the step (3) is performed, and the monolayer close-packed polystyrene nanospheres become monolayer non-close-packed polystyrene nanospheres.
3. The method as claimed in claim 1, wherein in step (3), the metal mask is one of Ti mask, Pt mask, Au mask and Ag mask;
the noble metal layer is a Pt metal layer or an Ag metal layer.
4. The method as claimed in claim 1, wherein in step (3), the thickness of the metal mask is 7-14nm, and the thickness of the noble metal layer is 20-100 nm.
5. The method as claimed in claim 1, wherein in step (5), the etching solution is prepared from H2O, HF and H2O2Said H is2O, said HF and said H2O2Is 21: 6: 5;
the mass fraction of HF is 45-52 wt.%, and H is2O2Is 25-35 wt.%.
6. The method of claim 1, wherein in step (2), the polystyrene nanosphere colloid is spin-coated on the top surface of the silicon carbide wafer by a spin coater to form a monolayer of close-packed polystyrene nanospheres;
the diameter of the monolayer close-packed polystyrene nano-microsphere is 50 nm-1 μm.
7. The method as claimed in claim 1, wherein in step (5), the wavelength of the ultraviolet light is 365nm, and the power density is 2200mW/cm2。
8. The method for processing the silicon carbide nano-pore array by metal-assisted photochemical etching as claimed in claim 7, wherein in the step (5), the metal-assisted photochemical etching is performed for 5-60min to obtain the silicon carbide nano-pore array with the pore depth of 50-642 nm.
9. The method for processing the silicon carbide nanopore array by metal-assisted photochemical etching as claimed in claim 1, wherein in the step (1), the silicon carbide wafer is cleaned by the following steps: and ultrasonically cleaning the silicon carbide wafer for 3-7min by using absolute ethyl alcohol and deionized water respectively, blow-drying by using nitrogen, and then cleaning for 3-7min by using plasma.
10. The method as claimed in claim 1, wherein in step (1), the silicon carbide wafer is a 5 x 5mm N-type silicon carbide wafer.
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CN114496768A (en) * | 2022-04-01 | 2022-05-13 | 浙江大学杭州国际科创中心 | Preparation method of nano-pillar array |
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CN114496768A (en) * | 2022-04-01 | 2022-05-13 | 浙江大学杭州国际科创中心 | Preparation method of nano-pillar array |
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