CN117658058A - Manufacturing method of silicon-based wide array nano through hole and silicon-based wide array nano through hole - Google Patents
Manufacturing method of silicon-based wide array nano through hole and silicon-based wide array nano through hole Download PDFInfo
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Abstract
The invention provides a method for manufacturing a silicon-based wide array nano through hole and the silicon-based wide array nano through hole, wherein the method for manufacturing the silicon-based wide array nano through hole comprises the following steps: s1, preparing a silicon wafer: performing preliminary cleaning and drying on the silicon wafer; s2, preliminary etching of the conical groove: soaking the silicon wafer in a mixed solution of KOH and isopropanol for etching; s3, metal auxiliary chemical etching: coating SiO by a spin coater 2 The Au particle solution of (2) is spin-coated on the surface of the silicon wafer, and after solidification, the target silicon wafer is soaked in HF and H 2 O 2 Etching in the mixed solution; s4, removing superfluous impurities on the surface of the target silicon wafer, and sequentially performing centrifugal washing and vacuum drying to obtain a silicon-based wide array nano through hole finished product. The manufacturing method of the silicon-based wide array nano through holes has high manufacturing efficiency, and the silicon nano holes are orderly arranged at intervalsEasy to regulate and control and good in stability.
Description
Technical Field
The invention relates to the field of gene sequencing and the technical field of biomolecule sensing, in particular to a method for manufacturing a silicon-based wide array nano through hole and the silicon-based wide array nano through hole.
Background
In the field of modern medicine and detection, human beings are increasingly interested in the identification of biological macromolecules, gene sequencing and research of high molecular polymers. The gene sequencing technology not only provides important data for basic biological researches such as the disclosure of genetic information, the regulation of gene expression and the like, but also plays an important role in application researches such as gene diagnosis, gene therapy and the like.
The single-molecule DNA sequencing method based on solid nanometer hole is the lowest cost and most competitive technology in the third generation gene sequencing technology, and the principle is that electrolyte chamber is divided into cis-form and trans-form chambers by one template with nanometer level through hole. When a voltage is applied to the electrolyte chamber, electrolyte particles in the solution move through the nanopore by electrophoresis, forming a steady state ionic current. While entry and exit of DNA or RNA can cause ion currents to generate blocking signals, these blocking current amplitudes and durations convey many characteristics of the gene molecules, including their size, concentration and structure, thereby enabling sequencing of DNA and RNA.
At present, most of solid nano-holes are made of silicon nitride, silicon oxide and silicon carbide, and most common manufacturing methods are to drill nano-sized holes at specified positions directly by using high-energy electron beams or focusing particles, however, the manufacturing cost is high, the efficiency is low, the quality of the nano-holes is poor, and the size is not easy to control and is easy to break due to dry etching or physical processing. Metal Assisted Chemical Etching (MACE) is one of the common methods for preparing silicon-based solid state nanopores, with operationsThe advantages of simplicity, simple equipment, low cost, high efficiency and the like are realized, and the method can be applied to large-scale commercialization, so that the method is widely studied in recent years. The process of preparing the silicon-based nano-holes by metal-assisted chemical etching can be divided into two steps: firstly, depositing a layer of noble metal (Ag, au, pt and the like) nano particles on the surface of a clean silicon substrate to catalyze and oxidize silicon atoms nearby the noble metal nano particles; then HF and H are utilized under the catalysis of noble metal 2 O 2 And then the silicon-based solid nano-pore is prepared by oxidation-reduction reaction with silicon.
However, the simple and efficient method for preparing the silicon nano-pores has the defects that (1) the diameter of the silicon nano-pores depends on the size of metal nano-particles, and the metal nano-particles are concentrated and connected to cause the concentration of the silicon nano-pores, so that interference can be generated on current signal detection in subsequent gene sequencing; (2) Because noble metal particles are randomly deposited on the surface of the silicon wafer, the prepared silicon nano holes are arranged in an unordered way, and the distance is not easy to regulate.
Disclosure of Invention
The invention provides a manufacturing method of a silicon-based wide array nano through hole, and aims to solve the problems that the existing silicon nano holes are low in preparation efficiency, the arrangement of the silicon nano holes is disordered, the spacing is not easy to regulate and control, and the current signal detection interference of a product is large.
The embodiment of the invention provides a manufacturing method of a silicon-based wide array nano through hole, which comprises the following steps:
s1, preparing a silicon wafer: performing preliminary cleaning and drying on the silicon wafer;
s2, preliminary etching of the conical groove: soaking the silicon wafer in a mixed solution of KOH and isopropanol for etching;
s3, metal auxiliary chemical etching: coating SiO by a spin coater 2 The Au particle solution of (2) is spin-coated on the surface of the silicon wafer, and after solidification, the target silicon wafer is soaked in HF and H 2 O 2 Etching in the mixed solution;
s4, removing superfluous impurities on the surface of the target silicon wafer, and sequentially performing centrifugal washing and vacuum drying to obtain a silicon-based wide array nano through hole finished product.
Preferably, the S1 specifically includes: the silicon wafer is cleaned in deionized water ultrasonic bath for 3min, and then dried for 1-3min by nitrogen flow.
Preferably, the step S2 specifically includes the following steps:
s21, uniformly spin-coating a layer of adhesive layer with the thickness of 500nm on the surface of the silicon wafer, and then drying and curing the adhesive layer;
s22, placing the silicon wafer of the S21 under a photoetching machine for alignment, and obtaining a preliminary etching opening of a square array on the surface of the silicon wafer after exposure, development, washing and drying;
s23, soaking the silicon wafer in the S22 in the mixed etching liquid of KOH and isopropanol for 10min, and taking out, washing and drying.
Preferably, in the step S22, the square array pattern obtained after the photolithography has a size of 5×5um 2 。
Preferably, in S23, after 10min in the mixed etching solution, the method further includes the following steps:
keeping the temperature at 40 ℃ constant in the etching process, continuously stirring with ultrasonic waves to finally obtain a pyramid-shaped groove, and then taking out, cleaning and drying.
Preferably, in S23, the mass ratio is as follows:
in the mixed etching solution, the KOH content is 30wt%, the isopropanol content is 1wt%, and the drying temperature is 50-90 ℃ and the drying time is 1-2 h.
Preferably, the step S3 specifically includes the following steps:
s31, adsorbing Au@SiO by using a pipetting gun 2 The nanoparticle solution is dripped on the surface of a silicon wafer fixed on a spin disk of a spin coater; wherein, the silicon chip fixed on the spin coater has the size of 10x10mm 2 ；
S32, controlling the turntable of the spin coater to rotate so as to enable Au@SiO 2 Uniformly spin-coating the nanoparticle solution on the surface of a silicon wafer, so as to form a single-layer metal film at the bottom of the conical groove; wherein the first working rotation speed of the spin coater is 300rpm, the rotation time is 5s, the second working rotation speed of the spin coater is 2000rpm, the rotation time is 5s, the third working rotation speed of the spin coater is 5000rpm, and the spin coater rotatesThe time is 9s;
s33, soaking the silicon wafer in the S32 in HF and H 2 O 2 Performing metal auxiliary chemical etching in the mixed solution of deionized water; wherein, according to the mass ratio: in the mixed etching liquid, the content of HF is 40wt percent, H 2 O 2 The content of (2) was 10wt%, the etching time was 20min, and the temperature was constant at 27 ℃.
Preferably, the step S4 specifically includes the following steps:
and removing the residual adhesive layer and redundant etching liquid on the surface of the silicon wafer by using an organic solvent and deionized water, and sequentially performing centrifugal washing and vacuum drying to finally obtain the large-area ordered smaller silicon-based nano deep hole array on the silicon wafer.
Preferably, in the step S4, the rotational speed of the centrifugal washing is 500-800 rpm, and the washing time is 30-40 min;
the drying temperature of the vacuum drying is 60-80 ℃ and the drying time is 3-4 h.
In a second aspect, an embodiment of the present invention provides a silicon-based wide-array nano-via, where the silicon-based wide-array nano-via is manufactured by the above-mentioned method for manufacturing a silicon-based wide-array nano-via.
Compared with the prior art, the invention has the beneficial effects that the silicon wafer is primarily cleaned and dried; soaking the silicon wafer in a mixed solution of KOH and isopropanol for etching; coating SiO by a spin coater 2 The Au particle solution of (2) is spin-coated on the surface of the silicon wafer, and after solidification, the target silicon wafer is soaked in HF and H 2 O 2 Etching in the mixed solution; and removing superfluous impurities on the surface of the target silicon wafer, and sequentially performing centrifugal washing and vacuum drying to obtain a silicon-based wide array nano through hole finished product. The silicon-based nano holes are obtained by metal-assisted chemical etching, the etching speed is high, and the processing time is greatly saved; and the obtained nano through hole has smaller size and aperture and deeper height, and can realize single-base DNA sequencing. In the manufacturing method, firstly, a conical pre-etching opening is obtained by anisotropic etching of a silicon wafer in KOH, so that the deposition of gold particles is more accurate later, and the distance width between nano through holes is kept at 1cm, so that the gold particles are deposited laterThe subsequent gene detection or sensing control is more accurate, and the stability of sensing control is greatly improved.
Drawings
The present invention will be described in detail with reference to the accompanying drawings. The foregoing and other aspects of the invention will become more apparent and more readily appreciated from the following detailed description taken in conjunction with the accompanying drawings. In the accompanying drawings:
FIG. 1 is a flow chart of a method for fabricating a silicon-based wide array nano-via according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of S1 provided by an embodiment of the present invention;
FIG. 3 is a schematic diagram of S2 provided by an embodiment of the present invention;
FIG. 4 is a schematic diagram of S2 provided by an embodiment of the present invention;
FIG. 5 is a top view of a noble metal particle deposition taper in accordance with the present invention;
fig. 6 is a schematic diagram of S4 provided in an embodiment of the present invention.
In the figure: 101. a silicon wafer; 201. a silicon dioxide mask layer; 202. a photoresist mask layer; 301. a conical groove; 401. noble metal particles; 501. metal assisted chemical etching of nanopores.
Detailed Description
The present invention will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present invention more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
Referring to fig. 1 to 6, an embodiment of the present invention provides a method for manufacturing a silicon-based wide array nano through hole, the method comprising the following steps:
s1, preparing a silicon wafer: and (5) performing primary cleaning and drying on the silicon wafer.
S2, preliminary etching of the conical groove: and soaking the silicon wafer in a mixed solution of KOH and isopropanol for etching.
S3, metal auxiliary chemical etching: coating SiO by a spin coater 2 The Au particle solution of (2) is spin-coated on the surface of the silicon wafer, and after solidification, the silicon wafer is coated with the Au particle solutionSoaking target silicon wafer in HF and H 2 O 2 Etching in the mixed solution.
S4, removing superfluous impurities on the surface of the target silicon wafer, and sequentially performing centrifugal washing and vacuum drying to obtain a silicon-based wide array nano through hole finished product. Wherein, the silicon wafer is a (1 0 0) plane N-shaped doped wafer, the geometric dimension is 4 inches, the thickness is 500um, and the resistivity is 5-10Ω & cm.
Specifically, the finished product prepared by the steps S1-S4 can obtain a large-area ordered smaller-width array nano through hole, can realize single-base DNA sequencing, and provides a new thinking method for a biological nano hole sequencing technology. The silicon-based nano holes are obtained by metal-assisted chemical etching, the etching speed is high, and the processing time is greatly saved; and the obtained nano through hole has smaller size and aperture and deeper height, and can realize single-base DNA sequencing. In the manufacturing method, firstly, the conical pre-etching opening is obtained by anisotropic etching of the silicon wafer in KOH, so that the deposition of gold particles is more accurate later, the distance width between the nano through holes is kept at 1cm, the subsequent gene detection or sensing control is more accurate, and the stability of sensing control is greatly improved.
In this embodiment, the S1 specifically includes: the silicon wafer is cleaned in deionized water ultrasonic bath for 3min, and then dried for 1-3min by nitrogen flow.
In this embodiment, the step S2 specifically includes the following steps:
s21, uniformly spin-coating a layer of adhesive layer with the thickness of 500nm on the surface of the silicon wafer, and then drying and curing the adhesive layer;
s22, placing the silicon wafer of the S21 under a photoetching machine for alignment, and obtaining a preliminary etching opening of a square array on the surface of the silicon wafer after exposure, development, washing and drying;
s23, soaking the silicon wafer in the S22 in the mixed etching liquid of KOH and isopropanol for 10min, and taking out, washing and drying.
Preferably, in the step S22, the square array pattern obtained after the photolithography has a size of 5×5um 2 。
Preferably, in S23, after 10min in the mixed etching solution, the method further includes the following steps:
keeping the temperature at 40 ℃ constant in the etching process, continuously stirring with ultrasonic waves to finally obtain a pyramid-shaped groove, and then taking out, cleaning and drying.
Specifically, the pyramid-shaped pre-etched trench is obtained by anisotropic etching of silicon in KOH. And spin-coating a thin and uniform adhesive layer on the surface of the cleaned and dried silicon wafer, baking and curing the adhesive layer on the surface for a period of time, and placing the silicon wafer under a photoetching machine to obtain the square array etching opening after alignment, exposure, development, washing and drying. Then soaking the silicon wafer in a mixed solution of KOH and isopropanol for pre-etching for 10 minutes, keeping the temperature constant at 40 ℃ in the etching process, continuously stirring with ultrasonic waves to finally obtain a pyramid-shaped groove, and then taking out, cleaning and drying.
Preferably, in S23, the mass ratio is as follows: in the mixed etching solution, the KOH content is 30wt%, the isopropanol content is 1wt%, and the drying temperature is 50-90 ℃ and the drying time is 1-2 h.
In this embodiment, the step S3 specifically includes the following steps:
s31, adsorbing Au@SiO by using a pipetting gun 2 The nanoparticle solution is dripped on the surface of a silicon wafer fixed on a spin disk of a spin coater; wherein, the silicon chip fixed on the spin coater has the size of 10x10mm 2 ；
S32, controlling the turntable of the spin coater to rotate so as to enable Au@SiO 2 Uniformly spin-coating the nanoparticle solution on the surface of a silicon wafer, so as to form a single-layer metal film at the bottom of the conical groove; the spin speed of the first working of the spin coater is 300rpm, the spin time is 5s, the spin speed of the second working of the spin coater is 2000rpm, the spin time is 5s, the spin speed of the third working of the spin coater is 5000rpm, and the spin time is 9s;
s33, soaking the silicon wafer in the S32 in HF and H 2 O 2 Performing metal auxiliary chemical etching in the mixed solution of deionized water; wherein, according to the mass ratio: in the mixed etching liquid, the content of HF is 40wt percent, H 2 O 2 The content of (2) is 10wt%, etching timeFor 20min, the temperature was constant at 27 ℃.
Specifically, after the Au@SiO2 nanoparticle solution is treated for 3min under the ultrasonic condition, 2.5ul of Au@SiO2 nanoparticle solution is taken by a pipetting gun and is dripped on 10X10mm fixed on a rotary disk of a spin coater 2 Is a silicon wafer of (a). The spin coater was operated at 300rpm for 5 seconds followed by 2000rpm for 5 seconds to form a uniform monolayer film on the wafer; then working at 5000rpm for 9s to remove excess solution. And standing the silicon wafer for 3 hours to completely evaporate the solution, and finally processing a single-layer closely arranged silicon dioxide coated gold nanoparticle array on the surface of the silicon wafer. Then soaking the silicon wafer deposited with metal in HF and H 2 O 2 The etching is carried out for 20min in the mixed solution, the temperature is controlled to be constant at 40 ℃, the ultrasonic stirring and the etching solution circulation are continuously used for guaranteeing the etching uniformity of each place, and the etching solution is fished out and cleaned after the etching time is up.
Preferably, the Au@SiO2 nanoparticles in S3 have an outer diameter of 20nm. The diameter of the inner core gold particles was 5nm, and the thickness of the deposited gold particles was 20nm.
Further, the time of ultrasonic agitation in S3 was 20min and the ambient temperature was 27 ℃.
In this embodiment, the step S4 specifically includes the following steps:
and removing the residual adhesive layer and redundant etching liquid on the surface of the silicon wafer by using an organic solvent and deionized water, and sequentially performing centrifugal washing and vacuum drying to finally obtain the large-area ordered smaller silicon-based nano deep hole array on the silicon wafer.
Preferably, in the step S4, the rotational speed of the centrifugal washing is 500-800 rpm, and the washing time is 30-40 min;
the drying temperature of the vacuum drying is 60-80 ℃ and the drying time is 3-4 h.
Specifically, the specific manufacturing process of this embodiment is as follows:
performing preliminary cleaning and drying treatment on the silicon wafer 101 to obtain a clean impurity-free silicon wafer 101; performing high-temperature oxidation treatment on the silicon wafer 101 to obtain a silicon dioxide mask layer 201, and performing spin coating treatment on the silicon dioxide mask layer 201 to obtain a photoresist mask layer 202; preliminary etching is carried out on the silicon wafer 101 to obtain tapered grooves 301 with distinct arrays; precious metal particles 401 are covered in each conical groove 301, redundant impurities on the surface of a target silicon wafer are removed, and centrifugal washing and vacuum drying are sequentially carried out, so that the silicon-based wide array nano through holes 501 are obtained.
The embodiment of the invention also provides the silicon-based wide array nano through hole, which is prepared by the method for preparing the silicon-based wide array nano through hole. The silicon-based wide array nano through hole is obtained by metal-assisted chemical etching, the etching speed is high, and the processing time is greatly saved; and the obtained nano through hole has smaller size and aperture and deeper height, and can realize single-base DNA sequencing. In the manufacturing method, firstly, the conical pre-etching opening is obtained by anisotropic etching of the silicon wafer in KOH, so that the deposition of gold particles is more accurate later, the distance width between the nano through holes is kept at 1cm, the subsequent gene detection or sensing control is more accurate, and the stability of sensing control is greatly improved.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, article or apparatus that comprises the element.
While the embodiments of the present invention have been illustrated and described in connection with the drawings, what is presently considered to be the most practical and preferred embodiments of the invention, it is to be understood that the invention is not limited to the disclosed embodiments, but on the contrary, is intended to cover various equivalent modifications and equivalent arrangements included within the spirit and scope of the appended claims.
Claims (10)
1. A method for manufacturing a silicon-based wide array nano through hole, which is characterized by comprising the following steps:
s1, preparing a silicon wafer: performing preliminary cleaning and drying on the silicon wafer;
s2, preliminary etching of the conical groove: soaking the silicon wafer in a mixed solution of KOH and isopropanol for etching;
s3, metal auxiliary chemical etching: coating SiO by a spin coater 2 The Au particle solution of (2) is spin-coated on the surface of the silicon wafer, and after solidification, the target silicon wafer is soaked in HF and H 2 O 2 Etching in the mixed solution;
s4, removing superfluous impurities on the surface of the target silicon wafer, and sequentially performing centrifugal washing and vacuum drying to obtain a silicon-based wide array nano through hole finished product.
2. The method for manufacturing a silicon-based wide array nano-via according to claim 1, wherein S1 specifically comprises: the silicon wafer is cleaned in deionized water ultrasonic bath for 3min, and then dried for 1-3min by nitrogen flow.
3. The method for manufacturing a silicon-based wide array nano-via according to claim 1, wherein S2 specifically comprises the steps of:
s21, uniformly spin-coating a layer of adhesive layer with the thickness of 500nm on the surface of the silicon wafer, and then drying and curing the adhesive layer;
s22, placing the silicon wafer of the S21 under a photoetching machine for alignment, and obtaining a preliminary etching opening of a square array on the surface of the silicon wafer after exposure, development, washing and drying;
s23, soaking the silicon wafer in the S22 in the mixed etching liquid of KOH and isopropanol for 10min, and taking out, washing and drying.
4. The method for fabricating a silicon-based wide array nano-via as defined in claim 3, wherein in S22, the square array pattern size obtained after photolithography is 5x5um 2 。
5. The method for fabricating a silicon-based wide array nano-via as set forth in claim 3, wherein in S23, after 10min in the mixed etching solution, the method further comprises the steps of:
keeping the temperature at 40 ℃ constant in the etching process, continuously stirring with ultrasonic waves to finally obtain a pyramid-shaped groove, and then taking out, cleaning and drying.
6. The method for manufacturing a silicon-based wide array nano-via as set forth in claim 3, wherein in S23, the mass ratio is as follows:
in the mixed etching solution, the KOH content is 30wt%, the isopropanol content is 1wt%, and the drying temperature is 50-90 ℃ and the drying time is 1-2 h.
7. The method for manufacturing a silicon-based wide array nano-via according to claim 1, wherein S3 specifically comprises the steps of:
s31, adsorbing Au@SiO by using a pipetting gun 2 The nanoparticle solution is dripped on the surface of a silicon wafer fixed on a spin disk of a spin coater; wherein, the silicon chip fixed on the spin coater has the size of 10x10mm 2 ；
S32, controlling the turntable of the spin coater to rotate so as to enable Au@SiO 2 Uniformly spin-coating the nanoparticle solution on the surface of a silicon wafer, so as to form a single-layer metal film at the bottom of the conical groove; the spin speed of the first working of the spin coater is 300rpm, the spin time is 5s, the spin speed of the second working of the spin coater is 2000rpm, the spin time is 5s, the spin speed of the third working of the spin coater is 5000rpm, and the spin time is 9s;
s33, soaking the silicon wafer in the S32 in HF and H 2 O 2 Performing metal auxiliary chemical etching in the mixed solution of deionized water; wherein, according to the mass ratio: in the mixed etching liquid, the content of HF is 40wt percent, H 2 O 2 The content of (2) was 10wt%, the etching time was 20min, and the temperature was constant at 27 ℃.
8. The method for manufacturing a silicon-based wide array nano-via according to claim 1, wherein S4 specifically comprises the steps of:
and removing the residual adhesive layer and redundant etching liquid on the surface of the silicon wafer by using an organic solvent and deionized water, and sequentially performing centrifugal washing and vacuum drying to finally obtain the large-area ordered smaller silicon-based nano deep hole array on the silicon wafer.
9. The method for manufacturing a silicon-based wide array nano through hole according to claim 8, wherein in S4, the rotational speed of the centrifugal washing is 500-800 rpm, and the washing time is 30-40 min;
the drying temperature of the vacuum drying is 60-80 ℃ and the drying time is 3-4 h.
10. A silicon-based wide array nano-via, characterized in that it is manufactured by the manufacturing method of the silicon-based wide array nano-via as claimed in any one of claims 1 to 9.
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