CN113820579A - Semiconductor chip test system - Google Patents
Semiconductor chip test system Download PDFInfo
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- CN113820579A CN113820579A CN202111101374.9A CN202111101374A CN113820579A CN 113820579 A CN113820579 A CN 113820579A CN 202111101374 A CN202111101374 A CN 202111101374A CN 113820579 A CN113820579 A CN 113820579A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2601—Apparatus or methods therefor
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
- G01N21/01—Arrangements or apparatus for facilitating the optical investigation
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
- G01N21/84—Systems specially adapted for particular applications
- G01N21/88—Investigating the presence of flaws or contamination
- G01N21/95—Investigating the presence of flaws or contamination characterised by the material or shape of the object to be examined
- G01N21/956—Inspecting patterns on the surface of objects
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
- G01R31/2856—Internal circuit aspects, e.g. built-in test features; Test chips; Measuring material aspects, e.g. electro migration [EM]
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
- G01N21/01—Arrangements or apparatus for facilitating the optical investigation
- G01N2021/0106—General arrangement of respective parts
- G01N2021/0112—Apparatus in one mechanical, optical or electronic block
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
- G01N21/84—Systems specially adapted for particular applications
- G01N21/88—Investigating the presence of flaws or contamination
- G01N21/95—Investigating the presence of flaws or contamination characterised by the material or shape of the object to be examined
- G01N21/956—Inspecting patterns on the surface of objects
- G01N2021/95638—Inspecting patterns on the surface of objects for PCB's
Abstract
The utility model provides a semiconductor chip test system, includes test mechanism, probe platform and processing end, and the probe platform is provided with the probe card, and test mechanism includes drive division and test division, and the drive division is used for driving the test division and removes, and the test division is provided with direct current light source, and the probe card is provided with second modulation light drive unit and modulation light source, and second modulation light drive unit is used for driving modulation light source work, and the test division is including test integration, and test integration includes test interaction interface and test feedback interface, and test interaction interface is connected to the probe card, and test feedback interface passes through the processing end and is connected with the probe platform. The chip testing system performs function testing on the wafer to be tested on the probe card through the testing board card arranged in the testing head, and the number of the modulated light sources is equal to the number of the crystal grains of the wafer to be tested, and each modulated light source is independently controlled, so that the parallel testing on the crystal grains of the plurality of wafers to be tested can be ensured.
Description
Technical Field
The invention relates to the technical field of chip testing, in particular to a semiconductor chip testing system.
Background
The photoelectric semiconductor chip is one of communication chips which rise in recent years, such as a tof (time of flight) chip, has the characteristics of high ranging precision, long ranging distance and high response speed, is widely applied in the fields of automobiles and industry, can combine artificial intelligence with 3D imaging to realize various sensors and identification functions so as to change the limitation of the traditional 2D vision, and has important application in 5G fronthaul, data center and super computing interconnection systems, the semiconductor circuit is manufactured in the form of a wafer, the wafer (wafer) is a circular silicon wafer, a plurality of mutually independent circuits are formed on the silicon wafer, each circuit can be called a crystal grain (Die), the crystal grains are cut by a scribing process to be packaged into different forms so as to form common semiconductor packages, and the semiconductor chip needs to be tested in the manufacturing process of the semiconductor chip, the general test of semiconductor chips includes Wafer test and packaging test, the Wafer test is between Wafer manufacture and packaging in the whole chip manufacturing process, after the Wafer (Wafer) is manufactured, thousands of bare crystal grains (Die) are regularly distributed over the whole Wafer, because the dicing packaging is not carried out, all the pins of the chip are exposed outside, the tiny pins need to be connected with a test machine through thinner probes, the probes need a probe card to realize data transmission, the probe card plays a role of a clamp to clamp the Wafer to be tested, and the Wafer to be tested and the test machine form a data transmission channel through the probes, the Wafer test generally puts the Wafer on the probe card, and carries out illumination on the Wafer to test the electrical characteristics of the Wafer, such as power consumption, operating speed, pressure resistance and the like, the light source required for illuminating the Wafer comprises modulated light and direct current light, the wafer is irradiated respectively to collect the wafer surface image for testing.
Because the requirements of the TOF chip on the photoelectric testing speed and the image transmission speed are very high at present, and meanwhile, the requirements on the uniformity and the consistency of a light source are also very high, the existing photoelectric semiconductor chip testing system cannot meet the requirements on the testing speed and the light source, and the testing efficiency is low.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provide a semiconductor chip parallel test system which can simultaneously realize direct current light and modulated light tests.
The technical problem to be solved by the invention is realized by adopting the following technical scheme:
a semiconductor chip test system comprises a test mechanism, a probe station and a processing end, wherein the probe station is provided with a probe card, the test mechanism comprises a driving part and a test part, the driving part is used for driving the test part to move, the test part is provided with a direct current light source, the probe card is provided with a second modulated light driving unit and a modulated light source, and the second modulated light driving unit is used for driving the modulated light source to work;
the test part comprises a test integration, the test integration comprises a test interaction interface and a test feedback interface, the test interaction interface is connected to the probe card, and the test feedback interface is connected with the probe station through the processing end;
the test integration comprises the following steps:
the direct current light testing module comprises a direct current light driving unit, and the direct current light driving unit is coupled to the direct current light source and is used for driving the direct current light source to work;
the power supply load module comprises a switching configuration unit and a first test feedback unit, wherein the switching configuration unit is configured with a power supply state and a load state, the switching configuration unit is configured as a power supply in the power supply state, and the switching configuration unit is configured as a load in the load state; the switching configuration unit is coupled to the test interaction interface to form a power supply test loop or a load test loop with the wafer to be tested, and the first test feedback unit is coupled to the test feedback interface and used for receiving a first test feedback signal fed back by the probe station under the working state of the power supply test loop or the load test loop;
the modulated light test module comprises a first modulated light driving unit and a modulated test feedback unit, the first modulated light driving unit is connected with the second modulated light driving unit by coupling the test interaction interface to configure the second modulated light driving unit, and the modulated test feedback unit is coupled with the test interaction interface and is used for receiving an image acquisition signal fed back by the probe card under the action of a modulated light source or a direct current light source;
the communication test module comprises a data output unit and a second test feedback unit, the data output unit is coupled to the test interaction interface so as to form a communication test loop with the wafer to be tested, and the second test feedback unit is coupled to the test feedback interface and used for receiving a second test feedback signal fed back by the probe station under the working state of the communication test loop.
Preferably, the test interaction interface is configured as a laser driving interface for sending a laser driving signal to the modulated light test module.
Preferably, the test interface is configured as a power interface for transmitting a power signal to the probe card.
Preferably, the test interface is configured as an open-short test interface for sending an open-short test signal to the probe card.
Preferably, the test feedback interface is configured as an image acquisition interface, and is used for sending an image acquisition signal fed back by the wafer to be tested under the action of the modulated light source or the direct-current light source to the processing end.
Preferably, the direct current optical test module is arranged on the direct current optical drive board card, and the direct current optical drive board card is detachably connected with the resource distribution board card through a slot.
Preferably, the power load module further includes a first open/short circuit testing unit, where the first open/short circuit testing unit inputs a first power open/short circuit signal and outputs a first open/short circuit feedback signal.
Preferably, the communication test module further comprises a second open/short circuit test unit, and the second open/short circuit test unit inputs a second power open/short circuit signal and outputs a second open/short circuit feedback signal.
Preferably, the direct current light testing module includes a direct current light module, a semi-transparent semi-reflective mirror is disposed below the direct current light module, the direct current light module includes a direct current light emitting component, a first collimating lens, a fly eye lens component and a second collimating lens, which are sequentially arranged from top to bottom, the direct current light emitting component includes a direct current light source and a direct current driving circuit, the direct current driving circuit is configured to drive the direct current light source to work to generate a direct current light path, and the direct current light source is disposed facing the first collimating lens, so that the direct current light path sequentially passes through the first collimating lens, the fly eye lens component, the second collimating lens and the semi-transparent semi-reflective mirror.
Preferably, the modulated light testing module includes a modulated light module, the modulated light module includes a modulated light emitting component, the modulated light emitting component includes a modulated light source and a modulation driving circuit, the modulation driving circuit is configured to drive the modulated light source to generate a modulated light path, and the modulated light source is disposed facing the half mirror, so that the modulated light path is reflected at the half mirror.
The invention has the advantages and positive effects that:
1. the chip testing system performs function testing on the wafer to be tested on the probe card through the testing board card arranged in the testing head, wherein the light source required by the testing is formed by mixing modulated light and direct current light, the number of the modulated light sources can be configured to be equal to the number of crystal grains of the wafer to be tested, and each modulated light source is independently controlled, so that the crystal grains of the wafer to be tested can be simultaneously tested in parallel, and the testing working efficiency is improved.
2. The ICLD board card arranged in the test head is an image acquisition and laser driving board card, can be used for acquiring 4-path LVDS images and 4-path MIPI images, adopts the FPGA to acquire, cache and store image data, converts the image data into an optical port network, and transmits the optical port network to a workstation computer through a PCIe port.
Drawings
FIG. 1 is a schematic diagram of the system connections of the present invention;
FIG. 2 is a schematic diagram of the connection between the built-in test boards in the test head of the present invention;
FIG. 3 is a schematic transmission diagram of the light path generated by the light source of the present invention;
FIG. 4 is a schematic diagram of PCI bus transmission according to the present invention;
fig. 5 is a pulse waveform diagram of modulated light output from the modulated light drive control board of the present invention.
In the figure: 1. a mechanical arm; 2. a test head; 3. a device interface board; 4. a load board; 5. a light source; 6. a probe card; 7. a probe station;
21. a first connector; 31. a second connector; 32. a third connector; 41. a pad;
51. a DC optical module; 52. a modulation optical module; 53. a crystalline grain photosensitive member; 54. a light hole;
511. a direct current light source; 512. a first collimating lens; 513. a fly-eye lens; 514. a second collimating lens; 515. a semi-transparent semi-reflective mirror;
521. modulating a light source; 522. a modulated light drive control board;
501. a first direct current path; 502. a second direct current path; 504. a fourth direct current path; 505. a fifth direct current path; 506. a sixth direct current path;
601. a first modulation optical path; 602. a second modulated light path.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It will be understood that when an element is referred to as being "secured to" another element, it can be directly on the other element or intervening elements may also be present. When a component is referred to as being "connected" to another component, it can be directly connected to the other component or intervening components may also be present. When a component is referred to as being "disposed on" another component, it can be directly on the other component or intervening components may also be present. The terms "vertical," "horizontal," "left," "right," and the like as used herein are for illustrative purposes only.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
The embodiments of the invention will be described in further detail below with reference to the accompanying drawings:
the semiconductor chip testing system comprises a testing mechanism, a probe station 7 and a processing end, wherein the probe station 7 is provided with a probe card 6, the testing mechanism comprises a driving part and a testing part, the driving part is used for driving the testing part to move, the testing part is provided with a direct current light source 511, the probe card 6 is provided with a second modulated light driving unit and a modulated light source 521, and the second modulated light driving unit is used for driving the modulated light source 521 to work;
the test part comprises a test integration, the test integration comprises a test interaction interface and a test feedback interface, the test interaction interface is connected to the probe card 6, and the test feedback interface is connected with the probe station 7 through a processing end;
the test integration comprises the following steps:
the dc light testing module comprises a dc light driving unit, the dc light driving unit is coupled to the dc light source 511, and is used for driving the dc light source 511 to work;
the power supply load module comprises a switching configuration unit and a first test feedback unit, wherein the switching configuration unit is configured with a power supply state and a load state, the switching configuration unit is configured as a power supply in the power supply state, and the switching configuration unit is configured as a load in the load state; the switching configuration unit is coupled to the test interaction interface to form a power supply test loop or a load test loop with the wafer to be tested, and the first test feedback unit is coupled to the test feedback interface and used for receiving a first test feedback signal fed back by the probe station 7 in the working state of the power supply test loop or the load test loop;
the modulated light test module comprises a first modulated light driving unit and a modulated test feedback unit, wherein the first modulated light driving unit is connected with the second modulated light driving unit through a coupling test interaction interface to configure the second modulated light driving unit, and the modulated test feedback unit is coupled with the test interaction interface and is used for receiving an image acquisition signal fed back by the probe card 6 under the action of the modulated light source 521 or the direct current light source 511;
the communication test module comprises a data output unit and a second test feedback unit, wherein the data output unit is coupled to the test interaction interface so as to form a communication test loop with the wafer to be tested, and the second test feedback unit is coupled to the test feedback interface and used for receiving a second test feedback signal fed back by the probe station 7 in the working state of the communication test loop.
The test interaction interface is configured as a laser driving interface for sending a laser driving signal to the modulated light test module, as a power supply interface for sending a power supply signal to the probe card 6, as an open/short circuit test interface for sending an open/short circuit test signal to the probe card 6, and as an image acquisition interface for sending an image acquisition signal fed back by the wafer to be tested under the action of the modulated light source 521 or the direct current light source 511 to the processing terminal.
The direct current optical test module is arranged on the direct current optical drive board card, and the direct current optical drive board card is detachably connected with the resource distribution board card through the slot.
The power load module further comprises a first open short circuit test unit, wherein the first open short circuit test unit inputs a first power open short circuit signal and outputs a first open short circuit feedback signal.
The communication test module also comprises a second open short circuit test unit, wherein the second open short circuit test unit inputs a second power supply open short circuit signal and outputs a second open short circuit feedback signal.
The direct current light test module comprises a direct current light module 51, a half-transmitting mirror 515 is arranged below the direct current light module 51, the direct current light module 51 comprises direct current light emitting components arranged from top to bottom in sequence, a first collimating lens 512, a fly-eye lens component and a second collimating lens 514, the direct current light emitting components comprise a direct current light source 511 and a direct current driving circuit, the direct current driving circuit is used for driving the direct current light source 511 to work to generate a direct current light path, and the direct current light source 511 is arranged facing the first collimating lens 512 so that the direct current light path sequentially passes through the first collimating lens 512, the fly-eye lens component, the second collimating lens 514 and the half-transmitting mirror 515.
The modulated light test module comprises a modulated light module 52, the modulated light module 52 comprises a modulated light emitting assembly, the modulated light emitting assembly comprises a modulated light source 521 and a modulation driving circuit, the modulation driving circuit is used for driving the modulated light source 521 to generate a modulated light path, and the modulated light source 521 is arranged facing the half mirror 515 so that the modulated light path is reflected at the half mirror 515.
As shown in fig. 1, the driving portion is a mechanical arm 1, the testing portion includes a testing head 2, an equipment interface board 3 and a loading board 4, the testing head 2 is used for testing a wafer to be tested, the equipment interface board 3 is used for providing an equipment serial port, the loading board 4 serves as a data connector, the mechanical arm 1 is used for controlling the testing head 2 to perform a vertical turning motion, an execution end of the testing head 2 is connected with the mechanical arm 1, the testing head 2 is provided with a first connector 21, the equipment interface board 3 is provided with a second connector 31 and a third connector 32, the loading board 4 is provided with a pad 41, the first connector 21 is in butt joint with the second connector 31 so that a data signal inside the testing head 2 is transmitted to the third connector 32 of the equipment interface board 3, the third connector 32 is in butt joint with the pad 41 so that a testing signal on the third connector 32 is transmitted to the loading board 4, so that a testing data in the testing head 2 is transmitted to the loading board 4 through the equipment interface board 3, a test area is arranged between the load board 4 and the probe card 6, the test area is used for providing a light source 5 for testing a wafer to be tested, so that a test signal on the load board 4 is transmitted to the wafer to be tested on the probe card 6 through the test area, the test work of a semiconductor chip is realized, the probe card 6 is used for clamping the wafer to be tested and forms a data transmission channel with grains on the wafer to be tested, the probe card 6 is mainly used for data transmission of the wafer to be tested, a processing end is configured as a workstation and used for processing the data signal of the wafer to be tested, and the probe table 7 is used for processing the test data of the wafer to be tested on the probe card 6 and transmitting the test data to the workstation.
As shown in fig. 2, the dc optical test module is configured as an ICLD board, the power load module is configured as a DPSH board and a DPSL board, the modulated optical test module is configured as an LD board, the communication test module is configured as a DM board and a CCB board, and the BB board is a resource allocation board, and the ICLD board, the DPSH board, the DPSL board, the DM board, the CCB board, and the BB board are all disposed in the test head 2, and the boards are further described below:
the DPSH board card is an 8-channel +/-40V/+/-4A high-power module and is used for providing power supply and electronic load functions, supplying power to the crystal grains on the wafer to be tested or serving as a load of the crystal grains on the wafer to be tested;
the DPSL board card is a power supply module with 40 channels and +/-10V/+/-1A and is used for providing power supply and electronic load functions, supplying power to the crystal grains on the wafer to be tested or serving as the load of the crystal grains on the wafer to be tested;
the DM board card is a digital signal module with 128 channels of digital channels, has a rate of 10MHz and 16 channels of PMU modules, is a per-pin parameter measurement unit, is a parameter measurement unit, can have the functions of FVMI (excitation voltage-to-current), FIMV (excitation current-to-voltage), FVMV (excitation voltage-to-voltage), and the like, and has the functions of current source and current sink, and each 8 channels of digital channels share one PMU module and are used for providing a digital signal transmission channel, and the functions of driving and comparing signals, generating high resistance states and waveforms and the like;
an ICLD board card is an image acquisition and laser driving board card and is used for carrying out 4 paths of MIPI (1pair clock +4pair data lines, the speed is 1.2Gbps/lane) image acquisition on a wafer to be tested and providing 4 paths of LVDS (200MHz max) signals to drive and modulate laser pulses of an optical driving control board 522, an Ultrascale plus V series FPGA of xilinx is adopted to acquire, cache and store image data, the image data are converted into an optical interface network and are sent to a workstation computer through a PCIe port, and the data transmission speed of ten thousands of megabits (19.2Gbps) can be achieved when a plurality of crystal grains are tested in parallel;
the CCB board card has a power output function of +/-5V/+/-12V @5A, 8 paths of IIC, 8 paths of SPI and 8 paths of UART functions, has 128 paths of GPIO drives, is used for providing power signals for the direct current optical module 51 and providing a communication port, and adjusts the illumination intensity of the direct current light source 511 by adjusting the power signals of the direct current optical module 51;
the LD board card is an ultrafast pulse laser driving board card and is used for outputting a laser pulse driving signal of 1ns and controlling the output frequency of the modulation light source 521, the pulse width is programmable, the rising edge of the laser pulse is 0.2ns, the repetition frequency of the laser pulse is 200MHz max, the FPGA of the ICLD board card drives the driving chip of the modulation light driving control board 522 through an LVDS signal to generate ultrafast programmable pulse laser, the repetition frequency of the pulse light can be controlled by the LVDS frequency of the FPGA, and the pulse width of the pulse light can be programmed and controlled by the driving chip of the modulation light driving control board 522 through the SPI interface of the FPGA;
and the BB board card is used for providing a plurality of slots, a plurality of test board cards are inserted into the slots, and the test board cards are subjected to resource allocation.
As shown in fig. 3, there is a light source 5 between the load board 4 and the probe card 6, for testing a wafer to be tested, the light source 5 includes modulated light and direct current light, the modulated light is provided by a modulated light module 52, the direct current light is provided by a direct current light module 51, the modulated light module 52 includes a modulated light driving control board 522 and a modulated light source 521, a data transmission end of the modulated light driving control board 522 is connected to a control end of the modulated light source 521, the direct current light module 51 includes a direct current light driving control board and a direct current light source 511, the data transmission end of the direct current light driving control board is connected to the control end of the direct current light source 511, the direct current light module 51 further includes a first collimating lens 512, a fly-eye lens assembly and a second collimating lens 514, a half mirror 515 is below the second collimating lens 514, the direct current light source 511 generates a first direct current light path 501, the first direct current light path 501 generates a second direct current light path 502 through the first collimating lens 512, the second dc optical path 502 generates a fourth dc optical path 504 through the fly-eye lens assembly, the fourth dc optical path 504 generates a fifth dc optical path 505 through the second collimating lens 514, and the fifth dc optical path 505 generates a sixth dc optical path 506 through the transmission of the half mirror 515. The modulated light module 52 includes a modulated light source 521 and a modulated light driving control board 522, the modulated light driving control board 522 has a modulation driving circuit thereon, a data transmission end of the modulated light driving control board 522 is connected to the modulated light source 521, the modulated light driving control board 522 is configured to output an excitation signal to the modulated light source 521 to generate a first modulated light path 601, the modulated light source 521 generates the first modulated light path 601, and the first modulated light path 601 generates a second modulated light path 602 through reflection of the half-mirror 515.
In this embodiment, the sixth direct current optical path 506 and the second modulation optical path 602 are transmitted to the die photosensitive member 53 of the chip to be tested through the optical hole 54, and then the probe card 6 transmits the data information of the chip to be tested to the probe station 7.
The number of the optical holes 54 is several, each optical hole 54 is provided with a crystalline grain photosensitive part 53 of a wafer to be tested, each wafer to be tested is provided with one modulation optical module 52, the modulation light driving control board 522 of each modulation optical module 52 independently controls the modulation light sources 521, and a spacing distance is arranged between every two modulation light sources 521, so that the modulation light emitted by the modulation light sources 521 corresponding to each crystalline grain photosensitive part 53 does not interfere with each other, and independent operation among a plurality of crystalline grains to be tested which are tested in parallel is ensured.
The half mirror 515, also called as a beam splitter or a beam splitter, is an optical element that is formed by plating a half reflective film on optical glass and changes the original transmission and reflection ratio of an incident light beam, and has the functions of penetrating half of the incident light beam and reflecting the other half of the incident light beam, and has the characteristic of low absorption, and the transmittance and the reflectivity of the plated film layer can be increased, increased and reflected, and the light intensity can be reduced, while the half mirror 515 refers to that the transmittance and the reflectivity of the plated film layer are respectively 50%, and when the light beam passes through the film, the transmitted light intensity and the reflected light intensity respectively account for half, and the required reflectivity is selected according to the required difference, and the transmittance and the reflectivity of the half mirror 515 in the embodiment are respectively 50%, so that the direct light beam can be directly emitted, the modulated light beam can be reflected, and the purpose of mixing the direct light beam and the modulated light beam can be achieved.
The grain photosensitive member 53 in this embodiment is a photosensitive portion of a wafer to be tested, and since the wafer to be tested in this technical scheme all belongs to a photoelectric semiconductor chip, and the photoelectric semiconductor chip is used for photoelectric conversion, the grain photosensitive member 53 needs to be tested by using light, and the test needs two types of direct current and modulated light, so that the photoelectric semiconductor chip needs to be tested by using mixed light of direct current and modulated light of this system, and the light receiving position on the photoelectric semiconductor chip is the grain photosensitive member 53, so the grain photosensitive member 53 is set as a light receiver, and the mixed light is emitted thereon for testing.
The control circuit of the modulated light driving control board 522 is a combined circuit formed by cascading two IC-HS05 chips, the input end of the combined circuit formed by cascading two IC-HS05 chips is connected with a signal input end, the output end of the combined circuit is connected with the modulated light source 521, the control circuit performs phase modulation on input signals and drives the modulated light source 521 to output modulated light, and the signal input end is provided with an SPI (serial peripheral interface) communication interface and an I (serial peripheral interface)2C communication interface, input signal is LVDS low voltage differential signal and I2The C signal drives the IC-HS05 chip through LVDS low-voltage differential signal, controls the driving current of the modulated light source 521 to generate programmable pulse laser, and modulates the IC-HS05 chip of the light driving control board 522 through SPI or I2The C communication protocol outputs and programs the pulse width of the modulated light source 521, the pulse width of the modulated light can be as small as 1ns, the duty ratio of the modulated light is 0-100%, the frequency is 0-200MHz, and the duty ratio and the frequency can be adjusted, as shown in FIG. 5, the waveform diagram of the IC-HS05 chip is shown, the rising edge is less than 0.2ns, the IC-HS05 chip is triggered and input by LVDS or TTL, the repetition frequency is as high as 200MHz in the LVDS mode, the pulse width is from 100ps to 5ns, the resolution is 1ps, the peak laser current is as high as 500mA, the IC-HS05 chip is mostly applied to TOF (time of flight) distance meters, 3D scanning and short-distance laser radars.
In this embodiment, since there are 8 test board cards, 8 slots on the BB board card are selected, and these 8 test board cards are inserted at arbitrary positions to perform the distribution and transmission processing of data.
As shown in fig. 4, the workstation is connected to a PCI board card through a PCI bus for converting PCI bus signals into local bus signals, the PCI board card has 4 read-write control bits, 16 data lines and 23 address lines, the local bus is connected to an IF board card, the system is used for carrying out relay processing on local bus signals, the IF board realizes the relay function of 8 SLOT selection signals and local bus communication signals, the IF board is connected with the BB board and transmits the relayed local bus signals to the test head 2 test board through the BB board, the workstation is connected with a plurality of test board cards arranged in the test head 2 through a PCI bus, the workstation is connected with the probe station 7 through a GPIB bus to control the workstation, the power supply case supplies power to the whole test system, the mechanical arm 1 is controlled through the PLC, so that the mechanical arm 1 drives the test head 2 to perform vertical turning motion, and the wafer to be tested on the probe card 6 is tested.
In specific implementation, the test items of the semiconductor chip test system include an open/short circuit test, a power consumption test, a communication test, a static image acquisition mode and a dynamic image acquisition mode, and the test items are described in detail as follows:
open short circuit test: carrying out open-short circuit test on the wafer to be tested through the DPSH board card or the DPSL board card and PMU modules of the ICLD board card and the DM board card, wherein the open-short circuit test adopts a FIMV (force current measurement voltage) method, the open-short circuit test is carried out on the semiconductor chip through the actually acquired voltage value, the FIMV judges whether the diode is short-circuited by adding current test voltage, and the different tested voltages represent different states (open circuit or short circuit) of the diode;
and (3) power consumption testing: supplying power to the crystal grain to be tested through a DPSH board card or a DPSL board card, testing the voltage and the current of the crystal grain to be tested, and performing power consumption test;
and (3) communication testing: providing an IO signal for the crystal grain to be tested through the DM board card, and meanwhile, carrying out IIC/SPI communication between the DM board card and the crystal grain to be tested, configuring the value of a corresponding register in the crystal grain to be tested, and enabling the wafer to be tested to work in different modes;
static image acquisition mode: the CCB board controls the light emission of the direct current light source to irradiate a plurality of to-be-detected crystal grains, and the ICLD board collects the image data of the to-be-detected crystal grains through the MIPI/LVDS interface;
dynamic image acquisition mode: and exciting the LD board card through an LVDS output interface of the ICLD board card, so that a VCSEL laser on the LD board card emits pulsed light to irradiate the crystalline grain to be detected, and acquiring image data of the crystalline grain to be detected through the MIPI/LVDS interface by the ICLD board card.
The calibration chassis of the test head 2 is used to calibrate parameters of the test board in the test head 2, and the following description will be given by taking calibration of the output voltage of the DPSH board or the DPSL board as an example:
s1, generating a voltage by the DPSH/DPSL board card, testing the voltage by a standard instrument (such as keysight34465A), completing voltage acquisition of a plurality of points, and performing error calculation;
s2, writing the compensation value into the DPSL/DPSH board card according to a calibration algorithm, wherein the calibration algorithm is as follows: firstly, collecting output voltage or current of a DPSL/DPSH board card from an external high-precision instrument, reading DPSL/DPSH board card data through communication, comparing the collected output voltage or current with the data read through communication, calculating an offset value according to a specific formula, and writing the offset value into an EEPORM of the DPSL/DPSH board card;
s3, generating voltage again by the DPSH/DPSL board card, measuring again by a standard instrument, and determining whether the errors of the DPSH/DPSL board card and the DPSL board card meet the precision requirement;
s4, if the precision meets the requirement, the calibration is finished; if the requirement can not be met, the step is returned to the step of S1 for re-execution, and if the calibration fails after repeating the step for 3 times, the calibration is determined to fail.
The chip testing system of the invention carries out function test on the wafer to be tested on the probe card 6 through the testing board card arranged in the testing head 2, wherein the light source 5 required by the test is formed by mixing modulated light and direct current light, a plurality of modulated light sources 521 can be configured, the number of the modulated light sources is equal to that of crystal grains of the wafer to be tested, and each modulated light source 521 is independently controlled, so as to ensure that the crystal grains of a plurality of wafers to be tested can be simultaneously tested in parallel, and the working efficiency of the test is improved.
It should be emphasized that the embodiments described herein are illustrative rather than restrictive, and thus the present invention is not limited to the embodiments described in the detailed description, but other embodiments derived from the technical solutions of the present invention by those skilled in the art are also within the scope of the present invention.
Claims (10)
1. A semiconductor chip test system, characterized by: the probe card testing device comprises a testing mechanism, a probe station (7) and a processing end, wherein the probe station (7) is provided with a probe card (6), the testing mechanism comprises a driving part and a testing part, the driving part is used for driving the testing part to move, the testing part is provided with a direct current light source (511), the probe card (6) is provided with a second modulated light driving unit and a modulated light source (521), and the second modulated light driving unit is used for driving the modulated light source (521) to work;
the test part comprises a test integration, the test integration comprises a test interaction interface and a test feedback interface, the test interaction interface is connected to a probe card (6), and the test feedback interface is connected with a probe station (7) through the processing end;
the test integration comprises the following steps:
the direct current light testing module comprises a direct current light driving unit, wherein the direct current light driving unit is coupled to the direct current light source (511) and is used for driving the direct current light source (511) to work;
the power supply load module comprises a switching configuration unit and a first test feedback unit, wherein the switching configuration unit is configured with a power supply state and a load state, the switching configuration unit is configured as a power supply in the power supply state, and the switching configuration unit is configured as a load in the load state; the switching configuration unit is coupled with the test interaction interface to form a power supply test loop or a load test loop with the wafer to be tested, and the first test feedback unit is coupled with the test feedback interface and used for receiving a first test feedback signal fed back by the probe station (7) under the working state of the power supply test loop or the load test loop;
the modulation light test module comprises a first modulation light drive unit and a modulation test feedback unit, the first modulation light drive unit is connected with the second modulation light drive unit by being coupled with the test interaction interface to configure the second modulation light drive unit, and the modulation test feedback unit is coupled with the test interaction interface and used for receiving an image acquisition signal fed back by the probe card (6) under the action of a modulation light source (521) or a direct current light source (511);
the communication test module comprises a data output unit and a second test feedback unit, the data output unit is coupled to the test interaction interface so as to form a communication test loop with the wafer to be tested, and the second test feedback unit is coupled to the test feedback interface and used for receiving a second test feedback signal fed back by the probe station (7) under the working state of the communication test loop.
2. The semiconductor chip test system of claim 1, wherein: the test interaction interface is configured as a laser driving interface for sending a laser driving signal to the modulated light test module.
3. The semiconductor chip test system of claim 1, wherein: the test interaction interface is configured as a power supply interface for sending a power supply signal to the probe card (6).
4. The semiconductor chip test system of claim 1, wherein: the test interaction interface is configured as an open short circuit test interface for sending an open short circuit test signal to the probe card (6).
5. The semiconductor chip test system of claim 1, wherein: the test feedback interface is configured as an image acquisition interface and used for sending an image acquisition signal fed back by the wafer to be tested under the action of the modulation light source (521) or the direct current light source (511) to the processing end.
6. The semiconductor chip test system of claim 1, wherein: the direct current optical test module is arranged on the direct current optical drive board card, and the direct current optical drive board card is detachably connected with the resource distribution board card through the slot.
7. The semiconductor chip test system of claim 1, wherein: the power load module further comprises a first open short circuit test unit, wherein the first open short circuit test unit inputs a first power open short circuit signal and outputs a first open short circuit feedback signal.
8. The semiconductor chip test system of claim 1, wherein: the communication test module further comprises a second open short circuit test unit, wherein the second open short circuit test unit inputs a second power supply open short circuit signal and outputs a second open short circuit feedback signal.
9. The semiconductor chip test system of claim 1, wherein: the direct current light test module comprises a direct current light module (51), a semi-transparent semi-reflecting mirror (515) is arranged below the direct current light module (51), the direct current light module (51) comprises a direct current light emitting component, a first collimating lens (512), a fly eye lens component and a second collimating lens (514), the direct current light emitting component comprises a direct current light source (511) and a direct current driving circuit, the direct current driving circuit is used for driving the direct current light source (511) to work to generate a direct current light path, and the direct current light source (511) faces the first collimating lens (512) so that the direct current light path sequentially passes through the first collimating lens (512), the fly eye lens component, the second collimating lens (514) and the semi-transparent semi-reflecting mirror (515).
10. The semiconductor chip test system of claim 9, wherein: the modulated light test module comprises a modulated light module (52), the modulated light module (52) comprises a modulated light emitting component, the modulated light emitting component comprises a modulated light source (521) and a modulation driving circuit, the modulation driving circuit is used for driving the modulated light source (521) to generate a modulated light path, and the modulated light source (521) faces the half-mirror (515) so that the modulated light path is reflected at the half-mirror (515).
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