CN113807999A - Multi-path graphic processing equipment - Google Patents
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Abstract
The invention discloses a multi-path graphic processing device, which is realized by a GPU (graphics processing Unit), and comprises a high-resolution graphic output interface and a graphic output interface conversion unit based on synchronous multiple pixel frequency, wherein the high-resolution graphic output interface based on the synchronous multiple pixel frequency outputs a high-resolution graphic comprising a multi-path low-resolution graphic processing result according to a customized graphic output time sequence; wherein, the parameters related to the graphic output time sequence comprise: the pixel frequency is n times of the middle and low resolution pattern, the pattern output interface conversion unit is used as an operation clock, and the phase of the frame effective pulse is advanced by one line compared with the middle and low resolution pattern and is used for pre-correcting the processing delay of the pattern output interface conversion unit; the graphic output interface conversion unit converts the high-resolution graphics into a plurality of independent medium-low resolution graphics for output. The invention has the characteristic of good time delay characteristic when processing multi-path low-resolution graphs.
Description
Technical Field
The present invention relates to display processing and avionics, and more particularly to a multi-path graphics processing apparatus for performing multi-path low-resolution graphics processing using a Graphics Processing Unit (GPU).
Background
Modern GPUs generally have strong graphics processing capacity, have two independent graphics outputs, and can meet the real-time two-path ultrahigh-resolution graphics processing requirements, and independent graphics output interfaces generally have two paths. In some avionics applications, multiple paths of low-resolution graphics processing (such as XGA, SVGA, VGA) are required, and the processing capability of the GPU can generally meet the requirement of processing multiple paths (such as 4 paths or 8 paths) in real time, but limited by the number of graphics processing interfaces, one GPU can generally only undertake no more than two processing tasks. There are two main types of conventional technologies that can alleviate this problem: the first is to use multiple GPUs, each of which allocates no more than two graphics processing tasks. Taking 8-way processing as an example, 4 GPUs are used, and each GPU takes over two-way graphics processing tasks. Such techniques have the advantage of no additional processing delay, and the disadvantage of very high power consumption and cost. The second type is that one GPU is used, multiple paths of low-resolution graphics are synthesized into a single path of high-resolution graphics for output, and then the low-resolution graphics in each path are separated from the high-resolution graphics through the conversion of a graphics output interface. Taking the example of processing 8 paths, the process of using one GPU to perform 8 paths of low-resolution graphics processing is as follows: dividing the 8 paths of low-resolution graphics processing into two groups, wherein each group of 4 paths share a graphics output interface of a GPU; and each group of 4 paths of low-resolution graphs need to be synthesized into 1 path of high-resolution graphs before output, and the high-resolution graphs output by the GPU can be output from the GPU, and the FPGA acquires the high-resolution graphs output by the GPU, performs frame caching, and then separates out 4 paths of low-resolution graph output. Compared with the first technology, the technology has the advantages of higher integration level and lower cost, and has the defect that extra processing delay is present, the delay is 1-2 frames, and the application with strict delay requirement cannot be well met.
The graphic processing application delay requirement in the avionics field is strict, the reliability requirement is high, the limitation is obvious when the traditional technology carries out multi-path medium-low resolution graphic processing, the delay characteristic is better, and the graphic processing application requirement in the avionics field can be better met only by realizing a simpler medium-low resolution multi-path graphic processing technology.
Disclosure of Invention
The invention aims to provide a multi-path graphic processing device which is simple to realize, has the characteristics of good delay characteristic and low power consumption when processing multi-path low-resolution graphics, and can better meet the graphic processing application requirements in the field of avionics.
The invention aims to be realized by the following technical scheme:
a multi-path graphic processing device is realized by a GPU and comprises a high-resolution graphic output interface based on synchronous multiple pixel frequency and a graphic output interface conversion unit;
outputting a high-resolution graph containing a processing result of the multi-path middle-low resolution graph according to a customized graph output time sequence by a high-resolution graph output interface based on the synchronous multiple pixel frequency; wherein, the parameters related to the graphic output time sequence comprise: the pixel frequency is n times of the middle and low resolution pattern, the pulse width and phase of the line synchronous pulse and the frame synchronous pulse are completely the same as those of the middle and low resolution pattern, the pulse width and phase of the line effective pulse are completely the same as those of the middle and low resolution pattern, the pulse width of the frame effective pulse is completely the same as those of the middle and low resolution pattern, and the phase of the frame effective pulse is advanced by one line compared with that of the middle and low resolution pattern and is used for pre-correcting the processing delay of the pattern output interface conversion unit;
the graphic output interface conversion unit comprises a high-resolution graphic input interface unit, a medium-low resolution graphic multi-path separation unit, a medium-low resolution graphic output time sequence generation and output control unit based on a clock frequency division and line delay method, a line cache unit and a frequency divider;
the high-resolution graphic input interface unit extracts high-resolution graphics from the high-resolution graphic input interface line by line and sends the high-resolution graphics to the medium-low resolution graphic multi-path separation unit;
the low-and-medium-resolution graph multi-path separation unit separates low-and-medium-resolution graph data in each path which are sequentially and horizontally synthesized into the high-resolution graph line by line, the low-and-medium-resolution graph data in each path are sequentially written into the line cache unit, and the line cache unit has a group of line caches for the low-and-medium-resolution graph in each path;
the frequency divider divides the pixel frequency of the input high-resolution graph, reduces the pixel frequency to the frequency corresponding to the middle-low resolution, and sends the frequency to a middle-low resolution graph output time sequence generation and output control unit based on a clock frequency division and line delay method to serve as an operation clock;
the low-and-medium-resolution graph output time sequence generation and output control unit based on the clock frequency division and line delay method generates a low-and-medium-resolution graph output time sequence according to the phase of a frame effective pulse appointed by a high-resolution graph output interface based on the synchronous multiple pixel frequency, and extracts the low-and-medium-resolution graph output time sequence line from the line cache unit to output the low-and-medium-resolution graph in each path.
Furthermore, the multi-path graphic processing equipment also comprises a multi-path graphic processing manager, a multi-path graphic processing task management unit, a multi-path medium-low resolution graphic frame buffer memory, a graphic synthesizer and a high resolution graphic frame buffer memory;
the multi-path graphic processing manager provides an access interface for the multi-path graphic processing task management unit, and the access interface is used for receiving configuration information of the multi-path graphic processing task management unit for caching multi-path low-resolution graphic frames, a graphic synthesizer, a high-resolution graphic frame cache, a high-resolution graphic output interface based on synchronous multiple pixel frequency and a graphic output interface conversion unit; the multi-path graphic processing manager allocates and releases the storage resources of the multi-path medium-low resolution graphic frame cache, the graphic synthesizer and the high resolution graphic frame cache according to the configuration information, and allocates and schedules the processing resources of the multi-path medium-low resolution graphic frame cache, the graphic synthesizer, the high resolution graphic frame cache, the high resolution graphic output interface based on the synchronous multiple pixel frequency and the graphic output interface conversion unit;
the multi-path graphic processing task management unit configures a plurality of paths of medium and low resolution graphic frame caches, a graphic synthesizer, a high resolution graphic frame cache, a high resolution graphic output interface based on synchronous multiple pixel frequency and a graphic output interface conversion unit through a multi-path graphic processing manager, the multi-path graphic processing task management unit firstly completes the processing of each path of medium and low resolution graphics and then stores the processed low resolution graphics in the paths of medium and low resolution graphic frame caches into the multi-path medium and low resolution graphic frame cache, then controls the graphic synthesizer to store the multi-path medium and low resolution graphic synthesized high resolution graphics stored in the multi-path medium and low resolution graphic frame cache into the high resolution graphic frame cache, controls the high resolution graphic output interface based on the synchronous multiple pixel frequency to output the high resolution graphics in the high resolution graphic frame cache to the graphic output interface conversion unit according to the graphic output time sequence, and finally controls the graphic output interface conversion unit to convert the high resolution graphics into a plurality of independent medium and low resolution graphics And (6) outputting graphics.
The graphic synthesizer sequentially accesses the 1 st path …, the 2 nd path … to the nth path of medium and low resolution graphic data with the resolution of h x v from the multi-path medium and low resolution graphic frame buffer, synthesizes high resolution graphics with the resolution of (n x h) x v according to a horizontal side-by-side mode, and stores the high resolution graphics into the high resolution graphic frame buffer.
The invention has the beneficial effects that: the multi-path graphic processing equipment provided by the invention can simultaneously process multi-path independent graphics and is suitable for processing and applying 3-path to 8-path low-resolution independent graphics. The invention has high integration level, lower realization cost, small average power consumption of each path of graphic processing, and elimination of extra delay existing in the traditional technology by graphic interface conversion. The total power consumption and cost of the display processing device or system can be obviously reduced by using the invention. The invention is particularly suitable for 3-path to 8-path avionics equipment with low-resolution independent graphic processing.
The invention is simple to realize, does not depend on a specific chip, is easy to use, can obviously reduce the total power consumption and the cost of display processing equipment or a system by using the invention, is suitable for processing multi-path independent low-resolution graphics, has strong popularization, and has obvious economic benefit in the avionics market.
Drawings
Fig. 1 is a schematic structural diagram of a multi-path graphics processing apparatus.
FIG. 2 is a schematic diagram of a high resolution pattern synthesized from multiple low resolution patterns.
FIG. 3 is a graphical output timing diagram.
Fig. 4 is a block diagram of the operation of the graphic output interface conversion unit.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples.
The multi-path graphics processing device shown in this embodiment is implemented by a GPU, and includes at least one graphics output interface conversion unit, where the graphics output interface conversion unit can solve the problem of insufficient number of graphics output interfaces of the GPU, and there is no extra delay in the graphics conversion process of the conventional technology, and the number of graphics paths processed by the multi-path graphics processing device at the same time can be many times the number of graphics output interfaces of the GPU. Referring to fig. 1, the multi-channel graphics processing apparatus according to this embodiment includes a multi-channel graphics processing manager, a multi-channel graphics processing task management unit, a multi-channel low-resolution graphics frame buffer, a graphics synthesizer, a high-resolution graphics frame buffer, a high-resolution graphics output interface based on a synchronized multiple pixel frequency, and a graphics output interface conversion unit.
In the embodiment, the width of the low-resolution pattern is h pixels, and the height of the low-resolution pattern is v pixels. The high-resolution pattern is a pattern formed by laterally arranging and synthesizing n paths of low-resolution patterns in parallel, and the high-resolution pattern has a width of n x h pixels and a height of v pixels. The schematic diagram of the middle/low resolution pattern and the high resolution pattern described in this embodiment may refer to a schematic diagram of a high resolution pattern synthesized by multiple middle/low resolution patterns shown in fig. 2.
The detailed description of the components of the multi-path graphics processing apparatus is as follows:
the multi-path graphic processing manager is a core control component for multi-path graphic processing, and provides an access interface for a multi-path graphic processing task management unit, wherein the access interface is used for receiving configuration information of the multi-path graphic processing task management unit for multi-path low-resolution graphic frame cache, a graphic synthesizer, high-resolution graphic frame cache, a high-resolution graphic output interface based on synchronous multiple pixel frequency and a graphic output interface conversion unit. The multi-path graphic processing manager configures and manages multi-path low-resolution graphic frame cache, a graphic synthesizer, high-resolution graphic frame cache, a high-resolution graphic output interface based on synchronous multiple pixel frequency and a graphic output interface conversion unit according to configuration information, and comprises the steps of initializing, state checking and configuring parts such as the multi-path low-resolution graphic frame cache, the graphic synthesizer and the high-resolution graphic frame cache, allocating and scheduling processing resources, allocating and releasing storage resources and the like, and initializing, state checking and configuring the high-resolution graphic output interface based on the synchronous multiple pixel frequency and the graphic output interface conversion unit, and allocating and scheduling the processing resources.
The multi-path graphics processing task management unit is a component that directly provides multi-path graphics processing services to applications. This component is responsible for the scheduling, execution, and management of multiple graphics processing tasks. The component configures and manages a plurality of paths of medium and low resolution graphics frame caches, a graphics synthesizer, a high resolution graphics frame cache, a high resolution graphics output interface based on synchronous multiple pixel frequency and a graphics output interface conversion unit through a plurality of paths of graphics processing managers, ensures the configuration, the coordination and the synchronization of all the components in the multi-path graphics processing process, and realizes the continuous processing and the output of a plurality of paths of independent medium and low resolution graphics. The multi-path graphic processing task management unit firstly completes the processing of the low-resolution graphics in each path and then stores the processed low-resolution graphics in the multi-path low-resolution graphics frame cache, then controls the graphics synthesizer to synthesize the high-resolution graphics from the multi-path low-resolution graphics stored in the multi-path low-resolution graphics frame cache into the high-resolution graphics frame cache, controls the high-resolution graphics output interface based on the synchronous multiple pixel frequency to output the high-resolution graphics in the high-resolution graphics frame cache 5 to the graphics output interface conversion unit according to the graphics output time sequence, and finally controls the graphics output interface conversion unit to convert the high-resolution graphics into the multi-path independent low-resolution graphics for output.
The multi-path middle and low resolution graphic frame buffer is a memory component for storing the middle and low resolution graphic data. The component caches the medium and low resolution graphics processed by each path of graphics task for the graphics synthesizer to synthesize the high resolution graphics.
The graphics synthesizer is a component that synthesizes multiple paths of low-resolution graphics into one path of high-resolution graphics. The component sequentially accesses the medium-low resolution graphics data with the resolution of h x v from the 1 st path and the 2 nd path … to the nth path from the multi-path medium-low resolution graphics frame buffer, synthesizes high-resolution graphics with the resolution of (n x h) x v according to a horizontal side-by-side mode, and stores the high-resolution graphics data into the high-resolution graphics frame buffer. The principle of synthesizing high-resolution patterns from multiple low-resolution patterns is shown in fig. 2.
The high-resolution graphics frame buffer is a memory component that stores high-resolution graphics data. The component buffers the high resolution graphics synthesized by the graphics synthesizer for access by a high resolution graphics output interface based on synchronized multiple pixel frequencies.
A high resolution graphics output interface based on synchronized multiple pixel frequencies is a graphics output interface component. The component extracts a high resolution graphic from the high resolution graphic frame buffer and outputs the high resolution graphic containing the processing results of the plurality of paths of low resolution graphics according to a customized graphic output timing sequence. The graphics output timing is a customization of the medium to low resolution graphics timing based on the synchronized multiple of the pixel frequency. By using the graph output time sequence, the high-resolution graph output interface can keep the same synchronous relation with the middle-low resolution graph output interface while having the capability of outputting multiple times of graph data. The pattern output timing may also advance the blanking signal phase to compensate for the delay introduced by the line buffer. By using the graphics output timing sequence, the graphics output interface conversion unit can complete the delay-free conversion from the single-path high-resolution graphics output interface to the multi-path low-resolution graphics output interface by using the line buffer and the line delay compensation.
Graphical output timing refers to the H _ Total Time, H _ Sync Time, H _ Back _ Porttime, H _ Active _ Graphics Time, H _ Front _ Porttime, V _ Total Time, V _ Sync Time, V _ Back _ Porttime, V _ Active _ Graphics Time, V _ Front _ Porttime parameter, and Pixel _ Clock Frequency parameter illustrated in FIG. 3. When the multiple is n and the line delay time of the graphic output interface conversion unit is H _ delay, the comparison relationship between the output timing sequence of the high-resolution graphic and the output customized timing sequence of the middle/low resolution graphic based on the synchronous multiple pixel frequency and the output timing sequence of the middle/low resolution graphic is specified in the table below.
TABLE 1 customized high resolution graph timing and middle and low resolution output timing comparison table
Compared with the 640 x 480 graph output time sequence, the graph output time sequence of the high-resolution graph output interface based on the synchronous multiple pixel frequency has the advantages that the pixel frequency is n times of that of the middle-low resolution graph, the pulse width and the phase of the line synchronous pulse and the frame synchronous pulse are completely the same as those of the middle-low resolution graph, the pulse width and the phase of the line effective pulse are completely the same as those of the middle-low resolution graph, the phase of the frame effective pulse is one line ahead of the middle-low resolution graph and used for pre-correcting the processing delay of the graph output interface conversion unit, and the effect that the final output result of the graph output interface conversion unit does not have extra delay is achieved.
The graphic output interface conversion unit is a component for separating each path of low-resolution graphics from the high-resolution graphics and outputting the low-resolution graphics. The functional block diagram of the graphic output interface conversion unit is shown in fig. 4, and is composed of a high resolution graphic input interface unit, a medium and low resolution graphic demultiplexing unit, a medium and low resolution graphic output timing generation and output control unit based on a clock frequency division and line delay method, a line buffer unit, a frequency divider and other components.
The high-resolution graphic input interface unit extracts high-resolution graphics from the high-resolution graphic input interface line by line and sends the high-resolution graphics to the medium-low resolution graphic demultiplexing unit. The low-and-medium-resolution graph multi-path separation unit separates low-and-medium-resolution graph data in each path which are sequentially and horizontally synthesized into the high-resolution graph line by line, the low-and-medium-resolution graph data in each path are sequentially written into the line cache unit, and the line cache unit has a group of line caches for the low-and-medium-resolution graph in each path. The frequency divider divides the pixel frequency of the input high-resolution graph, reduces the pixel frequency to the frequency corresponding to the middle-low resolution, and sends the frequency to the middle-low resolution graph output time sequence generation and output control unit based on the clock frequency division and line delay method to serve as the operation clock of the middle-low resolution graph output time sequence generation and output control unit. The low-and-medium-resolution graphic output time sequence generation and output control unit based on the clock frequency division and line delay method cooperates with the high-resolution graphic input interface unit, the low-and-medium-resolution graphic multi-path separation unit and the line cache unit, completes the generation of the converted graphic output time sequence according to the line delay agreed with the high-resolution graphic output interface based on the synchronous multiple pixel frequency, counteracts the pre-correction advance of the high-resolution graphic output interface based on the synchronous multiple pixel frequency, and achieves the non-delay conversion.
Taking processing of 8-path 640 × 480 resolution graphics as an example, the specific working principle of the present invention is described as follows:
step 1: the designer divides the 8 paths 640 x 480 resolution graphics processing tasks into two groups, the 1 st to 4 paths are the 1 st group, and the 5 th to 8 paths are the 2 nd group. Then, the process goes to step 2.
Step 2: the multi-path graphic processing task management unit establishes 8 paths of graphic processing tasks, establishes two paths of graphic synthesis tasks in a graphic synthesizer through a multi-path graphic processing manager, establishes 8 groups of frame buffers with the resolution of 640 x 480 in multi-path low-resolution graphic frame buffers through the multi-path graphic processing manager and sequentially distributes the frame buffers to every 1-8 paths, and establishes two groups of high-resolution buffer areas with the resolution of 2560 x 480 in a high-resolution graphic frame buffer through the multi-path graphic processing manager and respectively distributes the two groups of high-resolution buffer areas to a 1 st group of graphic synthesis tasks and a 2 nd group of graphic synthesis tasks. Then, the process proceeds to step 3.
And step 3: the designer calculates the parameters of the graphics output timing of the high resolution graphics output interface based on the synchronized multiple pixel frequency according to the relationships of table 1. The multi-path graphic processing task management unit completes the setting of parameters of two paths of 2560 multiplied by 480 high-resolution graphic output interfaces of the high-resolution graphic output interface based on the synchronous multiple pixel frequency through a multi-path graphic processing manager, so that two paths of high-resolution graphics can be output. Then go to step 4.
And 4, step 4: the multi-path graphics processing task management unit controls the graphics output interface conversion unit to convert the 2560 × 480 high-resolution graphics output interface into the 8-path 640 × 480 low-resolution graphics output enable without delay through the multi-path graphics processing manager. Then, the process proceeds to step 5.
And 5: the multi-path graphic processing task management unit carries out continuous scheduling execution and management on 8 paths of 640 multiplied by 480 resolution graphic processing tasks, completes graphic processing according to the update rate required by each path of graphic processing, and stores the graphic processing into corresponding frame caches in the multi-path low-resolution graphic frame caches. Then, the graphics synthesizer is scheduled by the multi-path graphics processing manager to respectively complete the high-resolution graphics synthesis of the 1 st group and the 2 nd group at each frame period, and the result of the 4-path 640 × 480 resolution graphics processing of each group is stored in the 2560 × 480 high-resolution graphics cache of the high-resolution graphics frame cache according to the principle of the multi-path low-resolution graphics synthesis high-resolution graphics of the multi-path low-resolution graphics frame cache of fig. 2. The high resolution graphics cache data of the high resolution graphics frame cache is continuously converted into 8-way 640 x 480 graphics interface output through the high resolution graphics output interface based on the synchronous multiple pixel frequency to the graphics output interface conversion unit. This completes 8-way 640 × 480 resolution graphics processing results to continue to be output from the 8-way 640 × 480 graphics interface. The graphics processing process will continue to be performed at step 5. And (6) when all the graphic processing tasks are finished and are to be exited.
Step 6: the multi-path graphic processing task management unit releases multi-path low-resolution graphic frame cache, a graphic synthesizer, high-resolution graphic frame cache, a high-resolution graphic output interface based on synchronous multiple pixel frequency, storage resources and processing resources of the graphic output interface conversion unit through a multi-path graphic processing manager, closes the output of the high-resolution graphic output interface based on the synchronous multiple pixel frequency and the graphic output interface conversion unit, and finally releases resources of 8 paths of graphic processing tasks to finish graphic processing.
It should be understood that equivalents and modifications of the technical solution and inventive concept thereof may occur to those skilled in the art, and all such modifications and alterations should fall within the scope of the appended claims.
Claims (3)
1. A multi-channel graphics processing device, implemented by a GPU, comprising a high resolution graphics output interface based on synchronized multiple pixel frequencies and a graphics output interface conversion unit, characterized by:
outputting a high-resolution graph containing a processing result of the multi-path middle-low resolution graph according to a customized graph output time sequence by a high-resolution graph output interface based on the synchronous multiple pixel frequency; wherein, the parameters related to the graphic output time sequence comprise: the pixel frequency is n times of the middle and low resolution pattern, the pulse width and phase of the line synchronous pulse and the frame synchronous pulse are completely the same as those of the middle and low resolution pattern, the pulse width and phase of the line effective pulse are completely the same as those of the middle and low resolution pattern, the pulse width of the frame effective pulse is completely the same as those of the middle and low resolution pattern, and the phase of the frame effective pulse is advanced by one line compared with that of the middle and low resolution pattern and is used for pre-correcting the processing delay of the pattern output interface conversion unit;
the graphic output interface conversion unit comprises a high-resolution graphic input interface unit, a medium-low resolution graphic multi-path separation unit, a medium-low resolution graphic output time sequence generation and output control unit based on a clock frequency division and line delay method, a line cache unit and a frequency divider;
the high-resolution graphic input interface unit extracts high-resolution graphics from the high-resolution graphic input interface line by line and sends the high-resolution graphics to the medium-low resolution graphic multi-path separation unit;
the low-and-medium-resolution graph multi-path separation unit separates low-and-medium-resolution graph data in each path which are sequentially and horizontally synthesized into the high-resolution graph line by line, the low-and-medium-resolution graph data in each path are sequentially written into the line cache unit, and the line cache unit has a group of line caches for the low-and-medium-resolution graph in each path;
the frequency divider divides the pixel frequency of the input high-resolution graph, reduces the pixel frequency to the frequency corresponding to the middle-low resolution, and sends the frequency to a middle-low resolution graph output time sequence generation and output control unit based on a clock frequency division and line delay method to serve as an operation clock;
the low-and-medium-resolution graph output time sequence generation and output control unit based on the clock frequency division and line delay method generates a low-and-medium-resolution graph output time sequence according to the phase of a frame effective pulse appointed by a high-resolution graph output interface based on the synchronous multiple pixel frequency, and extracts the low-and-medium-resolution graph output time sequence line from the line cache unit to output the low-and-medium-resolution graph in each path.
2. The multi-channel graphics processing apparatus according to claim 1, further comprising a multi-channel graphics processing manager, a multi-channel graphics processing task management unit, a multi-channel low-resolution graphics frame buffer, a graphics compositor, and a high-resolution graphics frame buffer;
the multi-path graphic processing manager provides an access interface for the multi-path graphic processing task management unit, and the access interface is used for receiving configuration information of the multi-path graphic processing task management unit for caching multi-path low-resolution graphic frames, a graphic synthesizer, a high-resolution graphic frame cache, a high-resolution graphic output interface based on synchronous multiple pixel frequency and a graphic output interface conversion unit; the multi-path graphic processing manager allocates and releases the storage resources of the multi-path medium-low resolution graphic frame cache, the graphic synthesizer and the high resolution graphic frame cache according to the configuration information, and allocates and schedules the processing resources of the multi-path medium-low resolution graphic frame cache, the graphic synthesizer, the high resolution graphic frame cache, the high resolution graphic output interface based on the synchronous multiple pixel frequency and the graphic output interface conversion unit;
the multi-path graphic processing task management unit configures a plurality of paths of medium and low resolution graphic frame caches, a graphic synthesizer, a high resolution graphic frame cache, a high resolution graphic output interface based on synchronous multiple pixel frequency and a graphic output interface conversion unit through a multi-path graphic processing manager, the multi-path graphic processing task management unit firstly completes the processing of each path of medium and low resolution graphics and then stores the processed low resolution graphics in the paths of medium and low resolution graphic frame caches into the multi-path medium and low resolution graphic frame cache, then controls the graphic synthesizer to store the multi-path medium and low resolution graphic synthesized high resolution graphics stored in the multi-path medium and low resolution graphic frame cache into the high resolution graphic frame cache, controls the high resolution graphic output interface based on the synchronous multiple pixel frequency to output the high resolution graphics in the high resolution graphic frame cache to the graphic output interface conversion unit according to the graphic output time sequence, and finally controls the graphic output interface conversion unit to convert the high resolution graphics into a plurality of independent medium and low resolution graphics And (6) outputting graphics.
3. The multi-channel graphic processing device according to claim 2, wherein the graphic synthesizer accesses the 1 st channel, the 2 nd channel … through the nth channel of the medium and low resolution graphic data having the resolution of hxv in order from the multi-channel medium and low resolution graphic frame buffer, synthesizes the high resolution graphics having the resolution of (nxh) xv in a horizontal side-by-side manner, and stores the high resolution graphics into the high resolution graphic frame buffer.
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