CN101420515B - Image zooming device - Google Patents
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- CN101420515B CN101420515B CN2008102389574A CN200810238957A CN101420515B CN 101420515 B CN101420515 B CN 101420515B CN 2008102389574 A CN2008102389574 A CN 2008102389574A CN 200810238957 A CN200810238957 A CN 200810238957A CN 101420515 B CN101420515 B CN 101420515B
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Abstract
The invention provides an image scaler, which comprises a clock couple unit and an image zooming unit. The clock couple unit is used for generating the output clock of couple input clocks. The image zooming unit comprises a timing sequence synchronous module, a data buffering module, a phase position computing module and a zooming filtering module. The timing sequence synchronous module is used for outputting the clock and generating the timing sequence which is synchronous with input source image data. The data buffering module is used for using the input clock to receive the source image data and using the synchronous timing sequence to output the source image data so as to buffer the source image data; the phase position computing module is used for calculating the phase position of the synchronous timing sequence; the zooming filtering module is used for zooming filtering treating on the buffered source image data by the phase position. The image scaler provides a good modular structure, is clear and concise, has simple design, strong reusability and readability, small chip design area and low cost.
Description
Technical field
The present invention relates to the digital video field, in particular to a kind of image zooming device.
Background technology
The digital video field adopts image zooming device to handle the convergent-divergent of image.Fig. 1 shows the structure chart of conventional image zooming device, comprising:
Input data synchronizing unit (input data synchronizer) 110 is used to receive the source image pixel data of SCLK frequency, and is transformed into the high-frequency clock territory;
Line buffer (line buffer) 120 is used for the high-capacity and high-speed data buffering;
FIFO 130, are used for clock zone and isolate
Vertical interpolators (V interpolator) 140 is used to carry out the convergent-divergent processing of vertical direction;
Horizontal interpolater (H interpolator) 150, the convergent-divergent that is used for the executive level direction is handled;
Interpolater line buffer (interpolator line buffer abbreviates ILB as) 160 is used for providing the prescan line to vertical interpolators 140.
In realizing process of the present invention, the inventor finds existing image zooming device complex structure, cause that power consumption is big, failure rate is higher.
Summary of the invention
The present invention aims to provide a kind of image zooming device, can solve existing image zooming device complex structure, cause big, the failure rate problem of higher of power consumption.
In an embodiment of the present invention, provide a kind of image zooming device, having comprised: clock couple unit is used to produce the output clock of clock of couple input; And the image-zooming unit, comprising: the sequential synchronization module is used for the synchronous sequential of source image data with output clock generating and input; The data buffering module is used to use input clock reception sources image data, and uses synchronous sequence output source image data, with buffering source image data; The phase calculation module is used for synchronous sequence is carried out phase calculation; The convergent-divergent filtration module is used for phase place the source image data that cushions being carried out the convergent-divergent Filtering Processing.
Optionally, in above-mentioned image zooming device, clock couple unit comprises fractional frequency-division phase-locked loop, is used to produce arbitrary small number frequency multiplication relation.
Optionally, in above-mentioned image zooming device, the sequential synchronization module comprises: synchronizer is used to produce the signal synchronous with the source image data; Timing sequencer is used for producing synchronous sequence with output clock and synchronizing signal.
Optionally, in above-mentioned image zooming device, the data buffering module comprises: first-in first-out buffer is used for the mechanism buffering source image data by first in first out; Many taps buffer, the buffer of each tap are used to cushion the source image data of a unit; The tap changing device is used to switch a plurality of tap buffers; Buffer control unit is used for synchronous sequence regulation and control first-in first-out buffer, a plurality of tap buffer and tap changing device.
Optionally, in above-mentioned image zooming device, the tap changing device adopts heterogeneous construction of switch.
Optionally, in above-mentioned image zooming device, the convergent-divergent filter module comprises: the filter factor memory is used for stored filter coefficients coupling phase place; Many tap filters are used for the phase place of coupling the source image data that cushions being carried out the convergent-divergent Filtering Processing.
Optionally, in above-mentioned image zooming device, comprise two image-zooming unit, an image-zooming unit constitutes a vertical scaler, and another image-zooming unit constitutes a horizontal scaling device, vertical scaler cascade horizontal scaling device.
Optionally, in above-mentioned image zooming device, comprise two image-zooming unit, an image-zooming unit constitutes a vertical scaler, and another image-zooming unit constitutes a horizontal scaling device, horizontal scaling device cascade vertical scaler.
Optionally, in above-mentioned image zooming device, comprise two image-zooming unit, an image-zooming unit constitutes a vertical scaler, another image-zooming unit constitutes a horizontal scaling device, vertical scaler cascade horizontal scaling device, and the first-in first-out buffer of the shared vertical scaler of horizontal scaling device and sequential synchronization module.
Optionally, in above-mentioned image zooming device, also comprise the 3rd image-zooming unit, the 3rd image-zooming unit constitutes an independently horizontal reducer, the vertical scaler and the horizontal scaling device of the above-mentioned cascade of independently horizontal reducer cascade.
The image zooming device of the foregoing description is divided into image-zooming " clock coupling, sequential synchronously, data buffering, phase calculation, convergent-divergent filtering " five functional group, imposes modularization and handles.This image zooming device provides good modular construction, and is clear succinct, makes simplicity of design, durability and readable strong, and the chip design area is little, and cost is low.
Description of drawings
Accompanying drawing described herein is used to provide further understanding of the present invention, constitutes the application's a part, and illustrative examples of the present invention and explanation thereof are used to explain the present invention, do not constitute improper qualification of the present invention.In the accompanying drawings:
Fig. 1 shows the structure chart of conventional image zooming device;
Fig. 2 shows the structure chart of image zooming device according to an embodiment of the invention;
Fig. 3 shows the structure chart of the clock coupling module of one embodiment of the invention;
Fig. 4 shows the internal structure of image-zooming unit according to an embodiment of the invention;
Fig. 5 shows the parallel buffer structure of FIFO in the horizontal scaling unit according to an embodiment of the invention;
Fig. 6 shows four kinds of modularization image-zooming structured flowcharts according to the embodiment of the invention;
Fig. 7 shows the image zooming device of VH structure according to an embodiment of the invention.
Embodiment
Below with reference to the accompanying drawings and in conjunction with the embodiments, describe the present invention in detail.
Fig. 2 shows the structure chart of image zooming device according to an embodiment of the invention, comprising:
Image-zooming unit 20 comprises:
Convergent-divergent filtration module 208 is used for phase place the source image data that cushions being carried out the convergent-divergent Filtering Processing.
The image zooming device of this embodiment is divided into image-zooming " clock coupling, sequential synchronously, data buffering, phase calculation, convergent-divergent filtering " five functional group, imposes modularization and handles.This image zooming device provides good modular construction, and is clear succinct, makes simplicity of design, durability and readable strong, and the chip design area is little, and cost is low.
Optionally, in above-mentioned scaler, clock couple unit comprises fractional frequency-division phase-locked loop, is used to produce arbitrary small number frequency multiplication relation.
Fig. 3 shows the structure chart of the clock coupling module of one embodiment of the invention.This module adopts Fractional-N PLL (fractional frequency-division phase-locked loop), realizes coupling and the arbitrary small number frequency multiplication relation of output clock to input clock.
Existing image scaling method is divided into two classes by the clock coupled relation.One class is non-coupling scheme: the clock of image is produced through PLL (Phase-LockedLoop, phase-locked loop) frequency multiplication by oscillator clock behind the convergent-divergent, does not have coupled relation with input image source clock.Another kind of is " complete " coupling scheme: the clock of image is produced through the PLL frequency multiplication by input image source clock behind the convergent-divergent, and frequency multiplication is than being the ratio of image output with the whole two field picture sum of all pixels of input image, i.e. there is direct coupled relation in output with input clock.
The common feature of above-mentioned two class image scaling methods aspect data buffering is, adopt high speed single port RAM (Random Access Memory, random asccess memory) realizes data buffering, with the independently high-frequency clock that does not have a coupled relation with input source single port RAM is carried out the alternative expression sequential scheduling, attempt the dual port RAM of avoiding usable floor area relatively large.
Yet increased a high-frequency clock territory like this, caused sequential and logic complicated.Compare with the common PLL of conventional method, the Fractional-N PLL area of Fig. 3 embodiment is littler, power consumption is lower, and can realize arbitrarily small several times clock multiplier relation.
Fig. 4 shows the internal structure of image-zooming unit according to an embodiment of the invention.In this scaler, the sequential synchronization module comprises:
Synchronizer (synchronizer) is used to produce the signal synchronous with the source image data;
Timing sequencer (timing gen) is used for producing synchronous sequence with output clock and synchronizing signal.
In above-mentioned scaler, the data buffering module comprises:
First-in first-out buffer (FIFO) is used for the mechanism buffering source image data by first in first out;
Many taps buffer (tap buffer 1-n), the buffer of each tap is used to cushion the source image data of a unit; Specifically, when handling the image data of vertical direction, the buffer of each tap is used to cushion delegation's source image data; When the image data of processing horizontal direction, the buffer of each tap is used to cushion a source image data.
Tap changing device (tap switch) is used to switch a plurality of tap buffers;
Buffer control unit (buffer controller) is used for synchronous sequence regulation and control first-in first-out buffer, a plurality of tap buffer and tap changing device.
Optionally, in above-mentioned scaler, the tap changing device adopts heterogeneous construction of switch.The heterogeneous switch switching construction of data buffering need not data and postpones with displacement mode, and power consumption can significantly reduce.
In above-mentioned scaler, the convergent-divergent filter module comprises:
Filter factor memory (cof RAM) is used for stored filter coefficients coupling phase place;
Many tap filters (n-tap filter) are used for the phase place of coupling the source image data that cushions being carried out the convergent-divergent Filtering Processing.
The image-zooming unit of Fig. 4 is by " sequential synchronously, data buffering, phase calculation " and " convergent-divergent filtering " four big function groups formations.Synchronizer (synchronizer) and timing gen (timing sequencer) form sequential synchronizing function group.FIFO (first-in first-out buffer), a n tap buffer (tap buffer) and tap switch (tap changing device) composition data buffer path, regulated and control with sequential by buffer controller (buffer control unit), four parts are formed data buffering function group jointly.Phase gen (phase generator) carries out phase calculation with sequential, and reads the corresponding phase coefficient among the cof RAM (filter factor memory), delivers n-tap filter (n tap filter) and finishes convergent-divergent filtering.In this modularization image-zooming unit, only have two clock zones of input and output, the two realizes at the FIFO place isolating, and promptly the computational process of image-zooming is carried out at the output clock zone.
Another shortcoming of prior art is: the adaptive capacity to various convergent-divergent situations poor (zoom degree is limited maybe can only to be amplified).Embodiment illustrated in fig. 6 based on modularization image-zooming unit, derive four kinds of application structures that are suitable for the different zoom situation, be respectively V-H structure, H-V structure, VH structure and H-VH structure, described in detail below.
Can adopt above-mentioned image-zooming unit to constitute vertical scaler (V scaler).Tap buffer in the vertical scaler physically is that dual port RAM (dpram) is realized, each tapbuffer realizes the buffering of full line data, and promptly the degree of depth of dual port RAM is possible input maximum horizontal resolution.In whole panntographic system, shared largest of the tap buffer in the vertical scaler is the main determining factor of chip design cost.For instance, if adopt 5 tap vertical convergent-divergents and the input of maximum support 1920 maximum horizontal resolution, then need the dual port RAM of 5 1920 degree of depth; And if adopt bilinearity filtering, i.e. 2 tap vertical convergent-divergents then need the dual port RAM of 2 1920 degree of depth, only the RAM cost just differs 2.5 times, whole Zoom module will have the cost gap about twice.Certainly, in general, adopt many tap filters can obtain better image-zooming quality, this is a kind of balance between cost and the usefulness.
Can adopt above-mentioned image-zooming unit to constitute horizontal scaling device (H scaler).Tap buffer in the horizontal scaling device physically is that register (reg) is realized, only stores a pixel data.
The parallel buffer structure of FIFO in the horizontal scaling device (H scaler): dwindle under the K.x situation of (x represents fractional part) in level, each clock cycle requires to upgrade K or k+1 tap registers (tap reg).For this reason, the embodiment of the invention proposes the parallel buffer structure of FIFO in the horizontal scaling device, it is K+1 times (K is the integer part of maximum minification) of pixel bit wide (the pixel bit wide as the RGB888 color depth is 24) that the bit wide that is about to FIFO increases, and the projected depth of corresponding FIFO can be reduced to 1/ (K+1) of initial value.As shown in Figure 5, parallel buffer structure makes FIFO can provide multiple spot to upgrade to the tap registers of H scaler simultaneously, thereby satisfies the doubly maximum minification application demand of K.x.K=4 in Fig. 5 example is no more than 5 times the application of dwindling so can satisfy.Simultaneously, level is amplified in the application, and each clock cycle requires to upgrade 0 (not upgrading) or 1 tap registers, and therefore, the parallel buffer structure of FIFO does not influence to amplify to be used.
Vertical scaler is owing to carried out the conversion of effective line number, and the variation of clock promptly needs the switching of clock zone before and after generally can causing.And the horizontal scaling device is owing to only carry out the convergent-divergent of image in capable, avoided H scaler that the switching of clock zone is required (otherwise the depth requirements of FIFO will heighten) in the embodiment of the invention.The image-zooming system of being made up of vertical scaler and horizontal scaling device only has two clock zones like this.
The V-H structure:
Shown in Fig. 6 a, this is a kind of direct structure with vertical scaler and the cascade of horizontal scaling device.The characteristics of this structure are: vertically scale and horizontal scaling are independent fully, and the independently synchronous and data buffering control of sequential is arranged separately, can be according to application demand, and the Scaler that design has any zoom capabilities.
The H-V structure:
Shown in Fig. 6 b, in this structure, the position of vertical and horizontal scaler and V-H inverted configuration.Because H scaler is preceding, can not be as the V-H structure, clock zone is changed and to amplify row long in advance, therefore, the H scaler of this structure only is suitable for dwindling the amplification little with degree.Be the situation that this structure is suitable for being reduced into level main application, and level is dwindled the depth requirements that can reduce tap dpram among the V scaler in advance, cost-saved.
The VH structure:
As Fig. 6 c and shown in Figure 7, the synchronous and data buffering control section with the sequential in the horizontal scaling device is transplanted to unified scheduling in the vertical scaler, can reduce control logic; Simultaneously by revising time sequence control logic among the V scaler, make it only when H scaler need upgrade tapreg, just calculate and effectively export, can further save the FIFO buffer cell of H scaler, so can reach the purpose that reduces cost.But owing to the continuous output of V scaler, can't satisfy level and dwindle under the situation, the requirement that tap registers single clock cycle multiple spot upgrades, therefore, this structure only is suitable for the application that level is amplified.Because vertical and horizontal scaling close-coupled (the synchronous and buffering controller of common sequential is arranged, and FIFO has also realized merging in essence) is so claim the VH structure.
The H-VH structure:
Shown in Fig. 6 d, this structure can be understood as: on the basis of VH structure, the front increases a level and dwindles unit (being made of above-mentioned image-zooming unit).Dwindle by the level of going ahead of the rest, carry out vertically scale and level again and amplify, can reduce the depth requirements of tap dpram in the vertical scaler, promptly, between cost, performance and scaling requirements, obtain compromise by suitably sacrificing certain horizontal definition.We can say that this is a kind of universal lower cost solution, is particularly suitable for TV applications.
Table 1 has been enumerated the applicability of the various image zooming device structure types of the present invention's proposition, can select suitable structure type according to concrete application demand in the design.
Table 1: the applicability of modularization image scaling method
The present invention is the innovative technology of Digital Video Processing, is applied to the Digital Video Processing chip design in the digital display system (as panel TV and computer monitor).The present invention is directed to convergent-divergent the most frequently used in the Digital Video Processing (Scaler) functional unit and propose the modular design method of innovation, solve complex structure, power consumption that prior art exists big, to the problems such as adaptive capacity difference of various convergent-divergent situations.As can be seen from the above description, the above embodiments of the present invention have realized following technique effect:
The present invention proposes clock coupling scheme and modularization image-zooming unit, and derive four kinds of application structures that are suitable for the different zoom situation in view of the above based on Fractional-N PLL (fractional frequency-division phase-locked loop).Modularization image-zooming unit is divided into image-zooming " clock coupling, sequential synchronously, data buffering, phase calculation, convergent-divergent filtering " five functional group, imposes modularization and handles.The invention has the advantages that: good modular construction, clear succinct, make simplicity of design, durability and readable strong, the chip design area is little, and cost is low.The heterogeneous switch switching construction of data buffering need not data and postpones with displacement mode, and power consumption can significantly reduce.Through the actual design checking, high efficient and flexible of the present invention, cost is low, and effect is good.
Obviously, those skilled in the art should be understood that, above-mentioned each module of the present invention or each step can realize with the general calculation device, they can concentrate on the single calculation element, perhaps be distributed on the network that a plurality of calculation element forms, alternatively, they can be realized with the executable program code of calculation element, carry out by calculation element thereby they can be stored in the storage device, perhaps they are made into each integrated circuit modules respectively, perhaps a plurality of modules in them or step are made into the single integrated circuit module and realize.Like this, the present invention is not restricted to any specific hardware and software combination.
The above is the preferred embodiments of the present invention only, is not limited to the present invention, and for a person skilled in the art, the present invention can have various changes and variation.Within the spirit and principles in the present invention all, any modification of being done, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (10)
1. an image zooming device is characterized in that, comprising:
Clock couple unit is used to produce the output clock of clock of couple input; And the image-zooming unit, comprising:
The sequential synchronization module is used for the synchronous sequential of source image data with described output clock generating and input;
The data buffering module is used to use described input clock to receive described source image data, and uses described synchronous sequence to export described source image data, to cushion described source image data;
The phase calculation module is used for described synchronous sequence is carried out phase calculation;
The convergent-divergent filtration module is used for described phase place the source image data of described buffering being carried out the convergent-divergent Filtering Processing.
2. image zooming device according to claim 1 is characterized in that described clock couple unit comprises fractional frequency-division phase-locked loop, is used to produce arbitrary small number frequency multiplication relation.
3. image zooming device according to claim 1 is characterized in that, described sequential synchronization module comprises:
Synchronizer is used to produce and the synchronous signal of described source image data;
Timing sequencer is used for producing described synchronous sequence with described output clock and described synchronizing signal.
4. image zooming device according to claim 1 is characterized in that, described data buffering module comprises:
First-in first-out buffer is used for cushioning described source image data by the mechanism of first in first out;
Many taps buffer, the buffer of each tap are used to cushion the described source image data of a unit;
The tap changing device is used to switch described a plurality of tap buffer;
Buffer control unit is used for regulating and control described first-in first-out buffer, described a plurality of tap buffers and described tap changing device with described synchronous sequence.
5. image zooming device according to claim 4 is characterized in that, described tap changing device adopts heterogeneous construction of switch.
6. image zooming device according to claim 1 is characterized in that, described convergent-divergent filter module comprises:
The filter factor memory is used for the stored filter coefficients described phase place that is coupled;
Many tap filters are used for the phase place of described coupling the source image data that cushions being carried out the convergent-divergent Filtering Processing.
7. image zooming device according to claim 1, it is characterized in that, comprise two described image-zooming unit, a described image-zooming unit constitutes a vertical scaler, another described image-zooming unit constitutes a horizontal scaling device, the described horizontal scaling device of described vertical scaler cascade.
8. image zooming device according to claim 1, it is characterized in that, comprise two described image-zooming unit, a described image-zooming unit constitutes a vertical scaler, another described image-zooming unit constitutes a horizontal scaling device, the described vertical scaler of described horizontal scaling device cascade.
9. image zooming device according to claim 4, it is characterized in that, comprise two described image-zooming unit, a described image-zooming unit constitutes a vertical scaler, another described image-zooming unit constitutes a horizontal scaling device, the described horizontal scaling device of described vertical scaler cascade, and the described first-in first-out buffer of the shared described vertical scaler of described horizontal scaling device and described sequential synchronization module.
10. image zooming device according to claim 9, it is characterized in that, also comprise the 3rd described image-zooming unit, described the 3rd image-zooming unit constitutes an independently horizontal reducer, the vertical scaler and the horizontal scaling device of the described cascade of described independently horizontal reducer cascade.
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| CN106527649A (en) * | 2015-09-09 | 2017-03-22 | 冠捷投资有限公司 | Labor division method of video scaler and plug-in sleep microcontroller unit for displayer |
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