CN113784497B

CN113784497B - Circuit board with shielding hole and manufacturing method thereof

Info

Publication number: CN113784497B
Application number: CN202010525729.6A
Authority: CN
Inventors: 周进群; 王亮
Original assignee: Shennan Circuit Co Ltd
Current assignee: Shennan Circuit Co Ltd
Priority date: 2020-06-10
Filing date: 2020-06-10
Publication date: 2023-07-07
Anticipated expiration: 2040-06-10
Also published as: CN113784497A

Abstract

The application provides a circuit board with a shielding hole and a manufacturing method thereof. The method comprises the following steps: a first shielding hole penetrating through the first surface and the second surface is formed in the inner layer plate, and electroplating hole filling is carried out on the first shielding hole; laminating the outer laminate to the first and second surfaces of the inner laminate, respectively, to form a multi-layer board; a signal hole concentric with the first shielding hole is formed in the multilayer board, and copper deposition electroplating treatment is carried out on the signal hole; the aperture of the signal hole is smaller than that of the first shielding hole, and the signal hole penetrates through the first surface of the multilayer board and the second surface opposite to the first surface; forming a plurality of second shielding holes around the axis of the first shielding holes at a first preset position of the outer layer plate, and electroplating and hole filling the second shielding holes; and manufacturing a signal wire at a second preset position of the outer layer plate and connecting the signal wire with the signal hole. The manufacturing method of the circuit board with the shielding hole not only can enable the signal wire to be connected with the signal hole, but also can greatly reduce the probability of signal leakage.

Description

Circuit board with shielding hole and manufacturing method thereof

Technical Field

The invention relates to the technical field of circuit board processing, in particular to a circuit board with shielding holes and a manufacturing method thereof.

Background

The circuit board is a provider of electrical connection of electronic components, and is generally provided with a plurality of layers of signal wires, and the plurality of layers of signal wires are communicated through signal holes.

Referring now to fig. 1, fig. 1 is a perspective view of a shield hole and a signal hole on a circuit board according to the prior art; specifically, in order to prevent signal leakage, a plurality of shielding holes 12 are often arranged around the signal hole 11 at intervals, so that the shielding holes 12 surround the signal hole 11 to further shield the signal; however, since the signal hole 11 needs to be connected to the signal line 13 on the outer layer, 1-2 shielding holes 12 are generally required to be arranged less in the process of arranging the shielding holes 12, so as to avoid the space of the signal line 13. However, this makes signal leakage worse.

Disclosure of Invention

The application provides a circuit board with a shielding hole and a manufacturing method thereof, wherein the manufacturing method of the circuit board with the shielding hole not only can enable a signal wire to be connected with the signal hole, but also can greatly reduce the probability of signal leakage.

In order to solve the technical problems, one technical scheme adopted by the application is as follows: a method for manufacturing a circuit board with shielding holes is provided. The method comprises the following steps: a first shielding hole is formed in the inner layer plate, and electroplating hole filling is carried out on the first shielding hole; wherein the first shielding hole penetrates through the first surface of the inner layer plate and the second surface opposite to the first surface; laminating the outer laminate to the first and second surfaces of the inner laminate, respectively, to form a multi-layer board; a signal hole concentric with the first shielding hole is formed in the multilayer board, and copper deposition electroplating treatment is carried out on the signal hole; the aperture of the signal hole is smaller than that of the first shielding hole, and the signal hole penetrates through the first surface of the multilayer board and the second surface opposite to the first surface; forming a plurality of second shielding holes around the axis of the first shielding holes at a first preset position of the outer layer plate, and electroplating and hole filling the second shielding holes; the diameter of a pattern surrounded by the second shielding holes is the same as that of the first shielding holes; and manufacturing a signal wire at a second preset position of the outer layer plate and connecting the signal wire with the signal hole.

In order to solve the technical problems, another technical scheme adopted by the application is as follows: a wiring board having a shield hole is provided. The circuit board comprises: the first outer layer plate, the inner layer plate, the second outer layer plate and the signal holes penetrating through the first outer layer plate and the second outer layer plate are arranged in a stacked mode; the signal holes are used for communicating a first signal wire on the first outer layer plate and a second signal wire on the second outer layer plate; the inner layer plate is provided with a first shielding hole which surrounds the first hole section of the signal hole and is used for preventing signal leakage of the first hole section of the signal hole; a plurality of second shielding holes are formed around the signal holes at the first preset position of the first outer layer plate, and the second shielding holes are used for preventing signal leakage of second hole sections of the signal holes; a plurality of third shielding holes are respectively formed around the signal holes at the first preset position of the second outer layer plate, and the third shielding holes are used for preventing signal leakage of third hole sections of the signal holes; the diameters of patterns surrounded by the second shielding holes and the third shielding holes are the same as those of the first shielding holes.

The manufacturing method of the circuit board with the shielding holes comprises the steps of forming a first shielding hole on an inner layer board, electroplating the first shielding hole to fill the hole, and then respectively laminating an outer layer board on the first surface and the second surface of the inner layer board to form a multilayer board; a signal hole concentric with the first shielding hole is formed in the multilayer board, and copper deposition electroplating treatment is carried out on the signal hole; secondly, forming a plurality of second shielding holes around the axle center of the first shielding hole at a first preset position of the outer layer plate, and electroplating and hole filling the second shielding holes; finally, a signal wire is manufactured at a second preset position of the outer layer plate and is connected with the signal hole, so that connection between the signal hole and the signal wire can be achieved, and because the position where the signal wire is arranged in the method is avoided by arranging the second shielding holes, signals shielded by the second shielding holes are fewer, and the signal shielding at the position where the first shielding holes are arranged is not influenced by arranging the second shielding holes.

Drawings

Fig. 1 is a perspective view of a shield hole and a signal hole on a circuit board according to the prior art;

fig. 2 is a flowchart of a method for manufacturing a circuit board with a shielding hole according to an embodiment of the present disclosure;

fig. 3 is a perspective view of a first shielding hole, a signal hole, a second shielding hole and a signal wire according to an embodiment of a method for manufacturing a circuit board with shielding holes in the present application;

FIG. 4 is a top view of FIG. 3;

FIG. 5 is a sub-flowchart of step S11 in FIG. 2;

fig. 6 is a schematic structural diagram of a first shielding hole according to an embodiment of the present disclosure;

FIG. 7 is a schematic view of a pattern surrounded by a plurality of second shielding holes according to an embodiment of the present disclosure;

FIG. 8 is a perspective view of a first shielding hole, a signal hole and a second shielding hole according to an embodiment of the present disclosure;

FIG. 9 is a sub-flowchart of step S14 in FIG. 2;

fig. 10 is a perspective view of a first shielding hole, a signal hole, a second shielding hole, a third shielding hole and a signal wire according to an embodiment of a circuit board with shielding holes of the present application;

FIG. 11 is a top view of FIG. 10;

fig. 12 is a side view of fig. 10.

Detailed Description

The following description of the technical solutions in the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings in the embodiments of the present application, and it is apparent that the described embodiments are only some embodiments of the present application, not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present disclosure.

The terms "first," "second," "third," and the like in this application are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first", "a second", and "a third" may explicitly or implicitly include at least one such feature. In the description of the present application, the meaning of "plurality" means at least two, for example, two, three, etc., unless specifically defined otherwise. All directional indications (such as up, down, left, right, front, back … …) in the embodiments of the present application are merely used to explain the relative positional relationship, movement, etc. between the components in a particular gesture (as shown in the drawings), and if the particular gesture changes, the directional indication changes accordingly. Furthermore, the terms "comprise" and "have," as well as any variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those listed steps or elements but may include other steps or elements not listed or inherent to such process, method, article, or apparatus.

Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the present application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.

The present application is described in detail below with reference to the accompanying drawings and examples.

Referring to fig. 2 to 4, fig. 2 is a flowchart of a method for manufacturing a circuit board with a shielding hole according to an embodiment of the present application; fig. 3 is a perspective view of a first shielding hole, a signal hole, a second shielding hole and a signal wire according to an embodiment of a method for manufacturing a circuit board with shielding holes in the present application; FIG. 4 is a top view of FIG. 3; in this embodiment, a method for manufacturing a circuit board with shielding holes is provided, in which a plurality of first shielding holes 21 and second shielding holes 23 are disposed at the periphery of a signal hole 22, so that the first shielding holes 21 surround most of the positions of the signal hole 22, and a plurality of second shielding holes 23 bordering the first shielding holes 21 surround other positions at two ends of the signal hole 22, so that signals are shielded by the first shielding holes 21 and the second shielding holes 23, wherein, in the method, the positions avoiding the signal wires 24 are avoided by the few second shielding holes 23, and the signals shielded by the second shielding holes 23 are less, and the few second shielding holes 23 do not affect the shielding of the signals at the positions where the first shielding holes 21 are located.

Specifically, the method comprises the following steps:

step S11: and forming a first shielding hole on the inner layer plate and electroplating and filling the first shielding hole.

Specifically, referring to fig. 5, fig. 5 is a sub-flowchart of step S11 in fig. 2, where step S11 specifically includes:

step S111: the inner layer plate is provided with a first shielding hole.

Wherein the inner layer plate can be a core plate; in one embodiment, the core plate may be a copper-clad plate; the first shielding hole 21 penetrates specifically through the first surface of the inner layer plate and the second surface opposite to the first surface; the first shielding hole 21 may be a circular hole, and the specific structure thereof may be seen in fig. 6, and fig. 6 is a schematic structural diagram of the first shielding hole according to an embodiment of the present application; in a specific embodiment, the aperture Φ1 of the first shielding hole 21 may be 1.6 millimeters.

Step S112: and carrying out copper deposition electroplating treatment on the first shielding hole.

Specifically, a copper layer 211 having a thickness of 0.05 mm may be electroplated.

Step S113: and carrying out resin plugging treatment on the first shielding hole after the copper deposition electroplating treatment.

Specifically, a resin plug hole process is performed in the first shield hole 21 so as to form a first shield layer, whereby signals at the corresponding positions are shielded with the first shield layer at a later stage.

Step S12: the outer laminate is laminated to the first and second surfaces of the inner laminate, respectively, to form a multi-layer board.

The outer layer plate can be a core plate, and the core plate can be a copper-clad plate.

In one embodiment, the outer laminate of the same thickness is laminated to the first and second surfaces of the inner laminate, respectively, to form a multi-layer board.

Specifically, the first and second surfaces of the inner laminate may be laminated with the outer laminate having a thickness of 0.3 mm, respectively. At this time, since the first shielding hole 21 is fully closed, the signal leakage problem does not occur at the position corresponding to the first shielding hole 21, and the height of the first shielding hole 21 from the signal line 24 on the outer layer board is only 0.25 mm, at this time, the influence of the small number of 1-2 second shielding holes 23 on the signal leakage is very small and can be almost ignored, so that the probability of occurrence of the signal leakage can be greatly reduced. It should be noted that, the height of the first shielding hole 21 from the signal line 24 on the outer board may be specifically obtained by subtracting the thickness of the signal line 24 from the thickness of the outer board; the thickness of the signal line 24 is typically 0.05 mm.

Of course, in other embodiments, the first surface and the second surface of the inner laminate may also be laminated with outer laminates having different thicknesses, respectively, for example, an outer laminate of 0.3 mm is laminated on the first surface of the inner laminate, and an outer laminate of 0.6 mm is laminated on the second surface of the inner laminate to form a multi-layer board, which is not limited in this embodiment.

Step S13: and forming a signal hole concentric with the first shielding hole on the multilayer board, and carrying out copper deposition electroplating treatment on the signal hole.

In an implementation, a copper layer may be electroplated on the inner sidewalls of the signal holes 22 to form a conductive layer.

Specifically, the aperture Φ2 of the signal hole 22 is smaller than the aperture Φ1 of the first shielding hole 21, and the signal hole 22 penetrates through the first surface and the second surface opposite to the first surface of the multilayer board. Specifically, the aperture Φ2 of the signal aperture 22 may be 0.3 millimeters; it will be appreciated that since the outer laminate is obtained by laminating the outer laminate on the first and second surfaces of the inner laminate, the axial length of the signal holes 22 through the first and second surfaces of the multilayer board is greater than the first shield holes 21 through the first and second surfaces of the inner laminate.

Step S14: and forming a plurality of second shielding holes around the axis of the first shielding holes at a first preset position of the outer layer plate, and electroplating and hole filling the second shielding holes.

Specifically, the diameter of the pattern surrounded by the plurality of second shielding holes 23 is the same as the aperture Φ1 of the first shielding holes 21; specifically, after the first shielding hole 21 is formed and the first shielding hole 21 is subjected to copper deposition electroplating, the diameter of a pattern surrounded by the plurality of second shielding holes 23 is specifically the same as the diameter of the first shielding hole 21 after copper deposition electroplating, so that the second shielding holes 23 are bordered by the first shielding hole 21, and signals are shielded through the synergistic effect of the two; it will be appreciated that if the maximum diameter of the pattern surrounded by the second shielding hole 23 is smaller than the aperture of the first shielding hole 21 after copper plating or the minimum diameter of the pattern surrounded by the second shielding hole 23 is larger than the aperture of the first shielding hole 21 after copper plating, the signal will leak through the gap between the two.

Specifically, referring to fig. 7, fig. 7 is a schematic diagram of a plurality of first embodiments of the present applicationThe pattern surrounded by the two shielding holes may be all circles which are centered on the axis of the first shielding holes 21 and pass through the first shielding holes 21, such as circle C ₁ 、C ₂ 、C ₃ .....C _n The method comprises the steps of carrying out a first treatment on the surface of the In an embodiment, referring to fig. 8, fig. 8 is a perspective view of a first shielding hole, a signal hole and a second shielding hole according to an embodiment of the present application; the diameter of the circle C1 surrounded by the plurality of second shielding holes 23 is the same as the aperture of the first shielding holes 21 after copper plating.

Specifically, referring to fig. 9, fig. 9 is a sub-flowchart of step S14 in fig. 2, where step S14 specifically includes:

step S141: and a plurality of second shielding holes are formed around the axis of the first shielding hole at a first preset position of the outer layer plate.

Specifically, the second shielding hole 23 penetrates the first surface and the second surface of the outer layer plate, and the positional relationship among the second shielding hole 23, the first shielding hole 21, and the signal hole 22 can be seen in fig. 8; in a specific embodiment, in order to avoid the connection position between the signal line 24 and the signal hole 22, a plurality of second shielding holes 23 are disposed at a first preset position of the outer layer board and are disposed at equal intervals along the circumferential direction of the signal hole 22.

Specifically, the aperture Φ3 of the second shielding hole 23 may be 0.3 mm.

Step S142: and carrying out copper deposition electroplating treatment on the second shielding hole.

Specifically, a copper layer 231 having a thickness of 0.05 mm may be electroplated.

Step S143: and carrying out resin plugging treatment on the second shielding hole after the copper deposition electroplating treatment.

Specifically, a resin plug hole process is performed in the second shield hole 23 to form a second shield layer, so that signals at the corresponding positions are shielded with the second shield layer at a later stage.

Step S15: and manufacturing a signal wire at a second preset position of the outer layer plate and connecting the signal wire with the signal hole.

It will be appreciated that the signal wires 24 on the outer laminate, which are laminated to the first and second surfaces of the inner laminate, are in particular connected by the conductive layer plated in the signal holes 22.

Wherein the second preset position of the outer layer plate is independent of the first preset position of the outer layer plate; it can be appreciated that the signal line 24 manufactured in the application is specifically formed by arranging the second shielding holes 23 on the outer layer plate to avoid the signal holes 22, the second shielding holes 23 only surround a small part of the signal holes 22, and most of the positions of the signal holes 22 are wrapped by the first shielding holes 21, and the first shielding holes 21 are fully closed, so that the signal leakage problem can not occur, and therefore, in order to avoid the positions of manufacturing the signal line 24, the second shielding holes 23 are arranged by 1-2, the influence on the signal leakage is small, and compared with the prior art, the probability of the signal leakage can be greatly reduced.

Specifically, referring to fig. 3 and 4, the signal wire 24 is specifically disposed at a second preset position of the outer layer board, and the signal wire 24 is specifically communicated with the signal hole 22 by disposing at least one second shielding hole 23 on the outer layer board; specifically, referring to fig. 4, nine second shielding holes 23 may be provided at a first preset position of the outer plate at equal intervals along the axial direction of the signal hole 22.

According to the manufacturing method of the circuit board with the shielding holes, the signal holes 22 are kept consistent with the centers of the first shielding holes 21, the first shielding holes 21 are large and short relative to the signal holes 22, and the signal holes 22 are small and long relative to the first shielding holes 21 (see figure 3), so that most of the signal holes 22 are fully wrapped by the first shielding holes 21; for a part of the length of the signal hole 22, the second shielding hole 23 is designed to supplement the shielding effect of this part; wherein, the density of the second shielding holes 23 is controlled by the depth (i.e. the axial length of the second shielding holes 23), the shallower the depth is, the greater the density is, i.e. the smaller the hole wall is; if the depth of the second shielding hole 23 is 0.1 mm, the hole wall of the second shielding hole 23 can be 0.15 mm, which is more reliable than the conventional scheme; further, the coaxial shielding hole has better shielding effect, can replace the coaxial hole (namely the coaxially arranged signal hole 11 and the shielding hole 12) with the existing design, is also applicable to products with higher future frequency, and can provide a very good solution for future products.

The manufacturing method of the circuit board with the shielding hole provided by the embodiment comprises the steps of forming a first shielding hole 21 on an inner layer board, electroplating the first shielding hole 21 for hole filling, and respectively laminating an outer layer board on the first surface and the second surface of the inner layer board to form a multi-layer board; a signal hole 22 concentric with the first shielding hole 21 is formed in the multilayer board, and copper deposition electroplating treatment is carried out on the signal hole 22; secondly, forming a plurality of second shielding holes 23 around the axle center of the first shielding hole 21 at a first preset position of the outer layer plate, and electroplating and hole filling the second shielding holes 23; finally, the signal line 24 is manufactured at the second preset position of the outer layer plate, and the signal line 24 is connected with the signal hole 22, so that connection between the signal hole 22 and the signal line 24 can be realized, and because the position of the signal line 24 is avoided by arranging the second shielding holes 23 in the method, signals shielded by the second shielding holes 23 are fewer, and the second shielding holes 23 are arranged in the method, the signal shielding of the position of the first shielding holes 21 is not influenced, and meanwhile, the first shielding holes 21 are totally closed, and the signal leakage problem is avoided.

Referring to fig. 10 to 12, fig. 10 is a perspective view of a first shielding hole, a signal hole, a second shielding hole, a third shielding hole and a signal wire according to an embodiment of a circuit board with shielding holes in the present application; FIG. 11 is a top view of FIG. 10; FIG. 12 is a side view of FIG. 10; in the present embodiment, a wiring board having a shield hole is provided, which specifically includes a first outer layer board, an inner layer board, a second outer layer board, and a signal hole 32 penetrating the first outer layer board and the second outer layer board, which are stacked.

The inner layer plate, the first outer layer plate and the second outer layer plate can be core plates, and the core plates can be copper-clad plates; the first outer layer plate is provided with a first signal line 35, the second outer layer plate is provided with a second signal line 36, and the signal hole 32 is used for communicating the first signal line 35 and the second signal line 36.

Specifically, a conductive layer is electroplated in the signal hole 32, bonding pads 37 are respectively arranged at two end ports of the signal hole 32, and the bonding pads 37 are connected with the conductive layer; in the implementation process, the first signal line 35 and the second signal line 36 are specifically connected with a bonding pad 37 arranged at a port of the signal hole 32, so as to connect the conductive layer in the signal hole 32 through the bonding pad 37, and further communicate the first signal line 35 and the second signal line 36 through the conductive layer in the signal hole 32; the conductive layer may be a copper layer.

The inner layer board is provided with a first shielding hole 31, the first shielding hole 31 surrounds a first hole section L1 of the signal hole 32, and insulating materials such as resin are filled in the first shielding hole 31 to form a first shielding layer, so that the first shielding layer is used for preventing signal leakage of the first hole section L1 of the signal hole 32; specifically, the aperture Φ1 of the first shielding hole 31 is larger than the aperture Φ2 of the signal hole 32, and in an embodiment, the aperture Φ1 of the first shielding hole 31 may be 1.6 mm, and the aperture Φ2 of the signal hole 32 may be 0.3 mm.

In a specific implementation process, a metal layer 311 is further electroplated on the wall of the first shielding hole 31, and the metal layer 311 may be a copper layer.

Wherein, a plurality of second shielding holes 33 are formed around the signal hole 32 at a first preset position of the first outer layer plate, and insulating materials such as resin are filled in the plurality of second shielding holes 33 to form a plurality of second shielding layers, so that signal leakage of a second hole section L2 of the signal hole 32 is prevented by the plurality of second shielding layers; in one embodiment, the first preset position of the first outer plate is provided with nine second shielding holes 33 around the signal hole 32, and the nine second shielding holes 33 are equally spaced along the circumferential direction of the signal hole 32.

In an implementation process, a metal layer 331 is further electroplated on the wall of the second shielding hole 33, and the metal layer 331 is, for example, a copper layer.

Specifically, the diameter of the pattern surrounded by the plurality of second shielding holes 33 is the same as the aperture Φ1 of the first shielding holes 31; the diameter of the pattern surrounded by the second shielding holes 33 may be referred to as fig. 7, and in a specific embodiment, the diameter of the circle C1 surrounded by the second shielding holes 33 is the same as the diameter of the first shielding holes 31 after the metal layer is plated.

Specifically, the aperture Φ3 of the second shielding hole 33 may be 0.3 mm.

Wherein, a plurality of third shielding holes 34 are formed around the signal hole 32 at the first preset position of the second outer layer plate, and the plurality of third shielding holes 34 are used for preventing signal leakage of the third hole section L3 of the signal hole 32. In one embodiment, the first preset position of the second outer layer plate is provided with nine third shielding holes 34 around the signal hole 32, and the nine third shielding holes 34 are equally spaced along the circumferential direction of the signal hole 32.

Specifically, the diameter of the pattern surrounded by the plurality of third shielding holes 34 is also the same as the aperture Φ1 of the first shielding holes 31; in the embodiment, the diameter of the pattern surrounded by the third shielding holes 34 is the same as the diameter of the circle C1 surrounded by the third shielding holes 34 after the metal layer is plated in the first shielding hole 31, as shown in fig. 7.

Specifically, the shapes, sizes and arrangement of the second shielding hole 33 and the third shielding hole 34 may be the same, that is, the aperture of the third shielding hole 34 may be 0.3 mm, and the depth thereof may be the same as the depth of the second shielding hole 33. Specifically, each of the second shielding holes 33 penetrates through the first surface of the first outer layer plate and the second surface opposite to the first surface; each of the third shield holes 34 described above penetrates through the first surface of the second outer laminate and the second surface opposite to the first surface.

Specifically, the axial length of the first hole section L1 of the signal hole 32 is far greater than the axial lengths of the second hole section L2 and the third hole section L3 of the signal hole 32, so as to avoid the position of the signal line and reduce the probability of signal leakage as much as possible.

Specifically, the thicknesses of the first outer layer plate and the second outer layer plate are the same; and in one embodiment, the thickness of the first outer ply and the second outer ply may be specifically 0.3 millimeters. At this time, since the first shielding hole 31 is fully closed, the signal leakage problem does not occur at the position corresponding to the first shielding hole 31, and the heights of the first shielding hole 31 from the first signal line 35 and the second signal line 36 are only 0.25 mm, at this time, the influence of the 1-2 second shielding holes 33 and the third shielding holes 34 on the signal leakage is very small and can be almost ignored, so that the probability of occurrence of the signal leakage can be greatly reduced. Note that, the height of the first shielding hole 31 from the first signal line 35 may be specifically obtained by subtracting the thickness of the first signal line 35 from the thickness of the first outer plate; the height of the first shielding hole 31 from the second signal line 36 can be specifically obtained by subtracting the thickness of the second signal line 36 from the thickness of the second outer plate; the thickness of the first signal line 35 and the second signal line 36 is generally 0.05 mm. It will be appreciated that in this embodiment, the second and third bore sections L2, L3 of the signal bore 32 are the same axial length.

The circuit board with the shielding hole provided by the embodiment is provided with the signal hole 32 so as to communicate the first signal wire 35 of the first outer layer board with the second signal wire 36 on the second outer layer board; meanwhile, by providing the first shielding hole 31 at the periphery of the first hole section L1 of the signal hole 32 to shield the signal at the opposite position, since the first shielding hole 31 is totally closed, the signal leakage problem does not occur at the position; in addition, the second shielding hole 33 and the third shielding hole 34 are respectively provided at the outer periphery of the second hole section L2 and the third hole section L3 of the signal hole 32 to shield the signal at the corresponding positions; because the position of the signal line in the circuit board is avoided by arranging the second shielding hole 33 and the third shielding hole 34, and the first shielding hole 31 is the first hole section L1 fully enclosed around the signal hole 32, the second shielding hole 33 and the third shielding hole 34 avoid the space for manufacturing the signal line and simultaneously do not influence the signal corresponding to the first shielding hole 31, in a specific embodiment, in order to avoid the position for manufacturing the signal line, 1-2 second shielding holes 33 and the third shielding hole 34 are arranged, the influence on signal leakage is small, and compared with the prior art, the probability of signal leakage can be greatly reduced.

The foregoing is only the embodiments of the present application, and not the patent scope of the present application is limited by the foregoing description, but all equivalent structures or equivalent processes using the contents of the present application and the accompanying drawings, or directly or indirectly applied to other related technical fields, which are included in the patent protection scope of the present application.

Claims

1. The manufacturing method of the circuit board with the shielding hole is characterized by comprising the following steps of:

a first shielding hole is formed in the inner layer plate, and electroplating hole filling is carried out on the first shielding hole; wherein the first shielding hole penetrates through a first surface of the inner layer plate and a second surface opposite to the first surface;

laminating an outer laminate on the first and second surfaces of the inner laminate, respectively, to form a multi-layer board;

a signal hole concentric with the first shielding hole is formed in the multilayer board, and copper deposition electroplating treatment is carried out on the signal hole; the aperture of the signal hole is smaller than that of the first shielding hole, and the signal hole penetrates through the first surface of the multilayer board and the second surface opposite to the first surface;

a plurality of second shielding holes are formed around the axle center of the first shielding hole at a first preset position of the outer layer plate, and electroplating hole filling is carried out on the second shielding holes; the diameter of a pattern surrounded by the second shielding holes is the same as the aperture of the first shielding holes after copper deposition electroplating;

and manufacturing a signal wire at a second preset position of the outer layer plate and connecting the signal wire with the signal hole.

2. The method for manufacturing a circuit board with shielding holes according to claim 1, wherein the steps of forming a first shielding hole in the inner layer board and electroplating and filling the first shielding hole specifically comprise:

a first shielding hole is formed in the inner layer plate;

carrying out copper deposition electroplating treatment on the first shielding hole;

and carrying out resin plugging treatment on the first shielding hole after copper deposition electroplating treatment.

3. The method of manufacturing a circuit board with shielding holes according to claim 1, wherein the step of laminating outer laminate on the first surface and the second surface of the inner laminate to form a multilayer board, respectively, specifically comprises:

and laminating outer layers of the same thickness on the first surface and the second surface of the inner layer plate respectively to form a multi-layer plate.

4. The method of manufacturing a circuit board with shielding holes according to claim 3, wherein the thickness of the outer layer plate is 0.3 mm.

5. The method for manufacturing a circuit board with shielding holes according to claim 1, wherein the step of forming a plurality of second shielding holes around the axis of the first shielding hole at the first preset position of the outer layer board and electroplating and filling the second shielding holes specifically comprises:

a plurality of second shielding holes are formed around the axis of the first shielding hole at a first preset position of the outer layer plate;

carrying out copper deposition electroplating treatment on the second shielding hole;

and carrying out resin plugging treatment on the second shielding hole after copper deposition electroplating treatment.

6. The method of manufacturing a circuit board with shielding holes according to any one of claims 1 to 5, wherein the aperture of the first shielding hole is 1.6 mm, and the aperture of the second shielding hole and the aperture of the signal hole are 0.3 mm.

7. A wiring board having a shield hole, comprising: the first outer layer plate, the inner layer plate, the second outer layer plate and the signal holes penetrating through the first outer layer plate and the second outer layer plate are arranged in a stacked mode;

the signal hole is used for communicating a first signal wire on the first outer layer plate and a second signal wire on the second outer layer plate; the inner layer plate is provided with a first shielding hole which surrounds the first hole section of the signal hole and is used for preventing signal leakage of the first hole section of the signal hole; a plurality of second shielding holes are formed around the signal hole at a first preset position of the first outer layer plate, and the second shielding holes are used for preventing signal leakage of a second hole section of the signal hole; a plurality of third shielding holes are formed around the signal hole at the first preset position of the second outer layer plate, and the third shielding holes are used for preventing signal leakage of a third hole section of the signal hole; the diameters of patterns respectively surrounded by the second shielding holes and the third shielding holes are the same as the diameters of the first shielding holes after copper deposition electroplating.

8. The circuit board with shielding holes of claim 7, wherein the first outer layer plate and the second outer layer plate have the same thickness.

9. The wiring board with shielding holes according to claim 7, wherein the plurality of second shielding holes are arranged at equal intervals along the circumferential direction of the signal hole; the plurality of third shielding holes are arranged at equal intervals along the circumferential direction of the signal hole.

10. The circuit board with shielding holes of claim 7, wherein the aperture of the first shielding hole is 1.6 mm, the apertures of the second shielding hole, the third shielding hole and the signal hole are 0.3 mm, and the thicknesses of the first outer layer board and the second outer layer board are 0.3 mm.