CN113747276A - Code element recovery and fault tolerance method and device for Ethernet over Ethernet data link layer - Google Patents

Code element recovery and fault tolerance method and device for Ethernet over Ethernet data link layer Download PDF

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CN113747276A
CN113747276A CN202110982278.3A CN202110982278A CN113747276A CN 113747276 A CN113747276 A CN 113747276A CN 202110982278 A CN202110982278 A CN 202110982278A CN 113747276 A CN113747276 A CN 113747276A
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code element
value
data
symbol
output
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CN113747276B (en
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刘宇
王振华
周东杰
沈沉
倪传坤
李宝伟
王晓锋
李旭
闫志辉
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State Grid Corp of China SGCC
Xuji Group Co Ltd
State Grid Shanghai Electric Power Co Ltd
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State Grid Corp of China SGCC
Xuji Group Co Ltd
State Grid Shanghai Electric Power Co Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q11/00Selecting arrangements for multiplex systems
    • H04Q11/0001Selecting arrangements for multiplex systems using optical switching
    • H04Q11/0062Network aspects
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q11/00Selecting arrangements for multiplex systems
    • H04Q11/0001Selecting arrangements for multiplex systems using optical switching
    • H04Q11/0062Network aspects
    • H04Q2011/0079Operation or maintenance aspects
    • H04Q2011/0081Fault tolerance; Redundancy; Recovery; Reconfigurability
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00Reducing energy consumption in communication networks
    • Y02D30/50Reducing energy consumption in communication networks in wire-line communication networks, e.g. low power modes or reduced link rate

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Abstract

The invention discloses a method and a device for recovering code elements and fault tolerance of an Ethernet optical network data link layer, wherein the method comprises the following steps: receiving an optical Ethernet carrier signal, and oversampling a high-speed asynchronous code element of the optical Ethernet carrier signal to obtain an oversampling value result; reading out the high-speed asynchronous code elements in sequence according to a storage sequence, carrying out XOR operation on the over-sampling values in sequence from front to back according to bits, searching for the code element hopping edge and determining edge searching data; and searching the jumping edge of the edge data through a typical value recurrence method index to obtain an inverted code element and a non-inverted code element, and performing code element fault tolerance recovery and outputting the code element according to the inverted code element and the non-inverted code element. The method comprises the steps of obtaining edge searching data by processing high-speed asynchronous code elements, further carrying out typical value recursion calculation on the edge searching data, determining an overturning code element and a non-overturning code element, eliminating distortion of code element sampling data caused by various factors, restoring original data from the distorted data, improving the fault tolerance of communication, and realizing code element recovery and fault tolerance of an optical Ethernet data link layer.

Description

Code element recovery and fault tolerance method and device for Ethernet over Ethernet data link layer
Technical Field
The invention relates to the technical field of power network data transmission, in particular to a method and a device for recovering code elements and fault tolerance of an optical Ethernet data link layer.
Background
In the ethernet seven-layer model, the PHY chip mainly implements the functions of the data link layer, the internal functions and structure of the PHY are as shown in fig. 1, and the PHY chip is used for implementing the data encoding and decoding functions of the ethernet data link layer. The PHY chip based on optical signal receiving and transmitting has relatively single function, the communication speed is fixed at hundred mega or giga, the coding format is fixed at NRZI mode, and the functions of auto-negotiation and the like are not needed. Because the level standard is fixed and the main function is based on digital logic, the realization of the coding and decoding functions of the Ethernet optical network data link layer through pure digital devices such as FPGA and the like and the digital logic has feasibility.
The optical Ethernet link layer is realized by digital logic coding, wherein the main difficulty involved is the acquisition and decoding and fault-tolerant technology of high-speed asynchronous code elements. The coding mode of the bottom layer of the Ethernet data link layer is NRZI code elements which are called non-return-to-zero inverse coding and are non-return-to-zero code elements, and the code elements are represented by jumping edges of the level. Firstly, data sampling needs to be carried out on an optical Ethernet carrier signal (NRZI code) with the baud rate of 125M, and according to the Nyquist sampling law, the sampling point of one period is generally not lower than 8 points. After 8 times of oversampling is carried out on the optical Ethernet high-speed serial data, the sampled value is stored in a buffer memory. We take a string of asynchronous serial data sequences as an example: "0101101010, 10100110". Each symbol is 8ns in duration for one clock cycle. Ideally, after 8 times of oversampling, the oversampling value of symbol 1 corresponding to 8 BITs is: 11111111, symbol 0 corresponds to 8 BITs with over-sampled value of 00000000, and the storage sequence of the above symbols in the buffer after over-sampling should be "00000000, 11111111, 00000000, 11111111111, 00000000, 11111111, 00000000, 11111111, … … … …".
As the receiving end receives asynchronous serial data, the actually sampled data is not an ideal value, and the real sampled data has a large distortion, as shown in table 1, the reasons for the distortion of the sampled data include: firstly, asynchronous serial data communication, the clocks of the transmitting and receiving ends are different, the clock deviation of the transmitting and receiving sides is accumulated to cause the deviation of over-sampled data, and the increase or decrease of over-sampled BIT can occur after accumulation; secondly, the circuit causes waveform distortion, particularly the conversion process of Ethernet photoelectric signals, square wave high and low level duty ratio distortion is easily caused, and finally the deviation of an over-sampling value is caused; thirdly, the jitter of the over-sampling clock at the receiving end causes the deviation of the over-sampling data. As shown in table 1, there is a large difference between actual sampled data and ideal data, so it is difficult to recover the original symbol from the distorted waveform and the distorted waveform caused by clock skew and complete the fault tolerance of the symbol. Purely by digital logic there is no sophisticated algorithm to implement.
Disclosure of Invention
The embodiment of the invention aims to provide a code element recovery and fault tolerance method and device for an optical Ethernet data link layer.
To solve the above technical problem, a first aspect of an embodiment of the present invention provides a method for recovering and fault-tolerant code elements of an optical ethernet data link layer, including the following steps:
receiving an optical Ethernet carrier signal, and oversampling a high-speed asynchronous code element of the optical Ethernet carrier signal to obtain an oversampling value result;
reading the high-speed asynchronous code elements in sequence according to a storage sequence, carrying out XOR operation on the oversampling values in sequence according to the bits, searching the code element hopping edge and determining edge searching data;
and indexing the jumping edge of the edge searching data by a typical value recurrence method to obtain a flip code element and a non-flip code element, and performing code element fault tolerance recovery and outputting a code element according to the flip code element and the non-flip code element.
Further, the indexing the edge-seeking data transition edges by a typical value recurrence and deriving flipped symbols and non-flipped symbols includes:
sequentially carrying out recursion calculation on the numerical values of the edge searching data, and judging whether the overturning code elements and the non-overturning code elements are output or not;
wherein the flipped symbol is a flip of a last symbol value, and the non-flipped symbol is a continuation of the last symbol value.
Further, the typical value in the recursive calculation is the sum of the current sequence number characteristic value and the last sequence number characteristic;
the current sequence number characteristic value is the number of 0 behind 1 in the edge searching data, and the last sequence number characteristic value is the number of 0 in front of 1 in the previous edge searching data.
Further, the output threshold of the non-flipped symbol is set to the threshold of the typical value, and when the consecutive five same oversampled BITs are full, one non-flipped symbol is output, and when the consecutive four same oversampled BITs are not output, the non-flipped symbol is output.
Further, the threshold value of the typical value is 12;
outputting one of the non-flipped symbols when the representative value is greater than or equal to 12;
when the representative value is less than 12, the non-flipped symbol is not output.
Further, the performing symbol fault tolerant recovery and outputting symbols includes:
outputting the code elements in units of even numbers, and outputting the code elements to a shift register in an even number alignment mode after accumulating enough two code elements as an output time slot;
wherein each oversampling unit may output 0 symbols, 1 symbol, or 2 symbols.
Accordingly, a second aspect of the embodiments of the present invention provides an apparatus for recovering and fault-tolerant symbols of an optical ethernet data link layer, including:
the oversampling module is used for receiving the optical Ethernet carrier signal and oversampling the high-speed asynchronous code element thereof to obtain an oversampling value result;
the data processing module is used for sequentially reading the high-speed asynchronous code elements according to a storage sequence, sequentially carrying out XOR operation on the over-sampling values in a bit-forward and bit-backward mode, and searching the code element hopping edge to determine edge searching data;
and the code element processing module is used for indexing the hopping edge of the edge searching data by a typical value recurrence method to obtain a flip code element and a non-flip code element, and performing code element fault-tolerant recovery and outputting a code element according to the flip code element and the non-flip code element.
Further, the data processing module performs recursive calculation on the values of the edge searching data in sequence, and determines whether to output the flipping code element and the non-flipping code element;
wherein the flipped symbol is a flip of a last symbol value, and the non-flipped symbol is a continuation of the last symbol value.
Further, the typical value of the recursion calculation is the sum of the current serial number characteristic value and the previous serial number characteristic;
the current sequence number characteristic value is the number of 0 behind 1 in the edge searching data, and the last sequence number characteristic value is the number of 0 in front of 1 in the previous edge searching data.
Further, the output threshold of the non-flipped symbol is set to the threshold of the typical value, and when the consecutive five same oversampled BITs are full, one non-flipped symbol is output, and when the consecutive four same oversampled BITs are not output, the non-flipped symbol is output.
Further, the threshold value of the typical value is 12;
outputting one of the non-flipped symbols when the representative value is greater than or equal to 12;
when the representative value is less than 12, the non-flipped symbol is not output.
Furthermore, the code element processing module outputs the code elements in units of even numbers, and the code elements are used as an output time slot after accumulating enough two code elements and output to the shift register in an even number alignment mode;
wherein each oversampling unit may output 0 symbols, 1 symbol, or 2 symbols.
The technical scheme of the embodiment of the invention has the following beneficial technical effects:
the method comprises the steps of obtaining edge searching data by processing high-speed asynchronous code elements, further carrying out typical value recursion calculation on the edge searching data, determining an overturning code element and a non-overturning code element, eliminating distortion of code element sampling data caused by various factors, restoring original data from the distorted data, improving the fault tolerance of communication, and realizing code element recovery and fault tolerance of an optical Ethernet data link layer.
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Fig. 1 is a schematic diagram of an ethernet PHY chip according to an embodiment of the present invention;
fig. 2 is a flowchart of a symbol recovery and fault tolerance method for an optical ethernet data link layer according to an embodiment of the present invention;
FIG. 3 is a logic diagram of a method for recovering symbols and fault tolerance of an Ethernet data link layer according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of an oversampled signal processing provided by an embodiment of the present invention;
fig. 5 is a block diagram of an apparatus for recovering symbols and fault-tolerant of an optical ethernet data link layer according to an embodiment of the present invention.
Reference numerals:
1. the device comprises an oversampling module 2, a data processing module 3 and a code element processing module.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in further detail with reference to the accompanying drawings in conjunction with the following detailed description. It should be understood that the description is intended to be exemplary only, and is not intended to limit the scope of the present invention. Moreover, in the following description, descriptions of well-known structures and techniques are omitted so as to not unnecessarily obscure the concepts of the present invention.
Fig. 2 is a flowchart of a symbol recovery and fault tolerance method for an optical ethernet data link layer according to an embodiment of the present invention.
Fig. 3 is a logic diagram of a symbol recovery and fault tolerance method for an optical ethernet data link layer according to an embodiment of the present invention.
Fig. 4 is a schematic diagram of processing an oversampled signal according to an embodiment of the present invention.
Referring to fig. 2, fig. 3 and fig. 4, a first aspect of the embodiments of the present invention provides a method for recovering and fault-tolerant data link layer symbols of an ethernet network, including the following steps:
s100, receiving an optical Ethernet carrier signal, oversampling a high-speed asynchronous code element of the optical Ethernet carrier signal to obtain an oversampling value result, and caching the oversampling value.
S200, reading out the high-speed asynchronous code elements in sequence according to the storage sequence, carrying out XOR operation on the oversampling values in sequence before and after the bit, and searching the code element hopping edge to determine the edge searching data.
S300, searching the jumping edge of the edge data through a typical value recurrence method index to obtain an upset code element and a non-upset code element, and performing code element fault tolerance recovery and outputting the code element according to the upset code element and the non-upset code element.
Specifically, in step S200, searching for an edge data transition edge through a recursive index of typical values and obtaining a flipped symbol and a non-flipped symbol specifically include: and sequentially carrying out recursion calculation on the numerical values of the edge searching data, and judging whether to output the flip code elements and the non-flip code elements.
The inverted code element is the inversion of the value of the last code element, and the non-inverted code element is the continuation of the value of the last code element.
Further, the typical value in the recursion calculation is the sum of the current serial number characteristic value and the previous serial number characteristic; the current sequence number characteristic value is the number of 0 behind 1 in the edge searching data, and the last sequence number characteristic value is the number of 0 in front of 1 in the previous edge searching data.
Further, the output threshold of the non-inverted symbol is set to the threshold of the typical value, when five consecutive same oversampled BITs are full, one non-inverted symbol is output, and when four consecutive same oversampled BITs are full, the non-inverted symbol is not output.
Optionally, the threshold value of the typical value is 12; when the typical value is greater than or equal to 12, outputting a non-flipping code element; when the typical value is less than 12, no non-flipped symbols are output.
Further, in step S200, performing symbol fault-tolerant recovery and outputting a symbol specifically includes: and outputting the data in units of even numbers, and outputting the data to the shift register in an even number alignment mode after accumulating enough two code elements as one output time slot. Wherein each oversampling unit may output 0 symbols, 1 symbol, or 2 symbols.
In the following, taking a string of asynchronous serial symbols "0101101010, 10100110" as an example, the simulation waveform and data derivation thereof refer to fig. 3 and table 1:
each sampling data is 8 bits, after completing or searching edge, the values of the sampling data have combinations of '00000000', '10000000', '01000000', '00100000 … …' and the like, and the values of the searching edge data are subjected to recursion algorithm in sequence by taking a storage unit as a unit to judge whether to output a flipping code element and a non-flipping code element.
The turnover code element is defined as the turnover of the last code element, if the last code element is 1, the turnover code element is 0, and if the last code element is 0, the turnover code element is 1; the non-flipped symbol is defined as a continuation of the last symbol, and if the last symbol is 1, the non-flipped symbol is 1, and if the last symbol is 0, the non-flipped symbol is 0.
Typical values are used to derive the output of the non-flipped symbols. Each edge-seeking data is demarcated by 1, the number of 0 after 1 is defined as a characteristic value A, and the number of zero before 1 is defined as a characteristic value B, namely, a typical value is the current sequence number characteristic value B + the last sequence number characteristic value A.
The typical value threshold is used to define the output threshold for non-flipped symbols, following a rounding principle. A full of five consecutive identical oversampled BITs output one symbol and four consecutive identical oversampled BITs discard no output. According to this principle, the representative value threshold is set to 12, and a non-flipped symbol is output when the representative value is greater than or equal to 12. Less than this value is not output.
When analyzing the edge searching data, firstly judging whether to output a non-flip code element according to the typical value, then if 1, forcibly outputting a flip code element, and if not, not outputting the flip code element.
The output code elements of the algorithm are output in units of even numbers, and are used as an output time slot after every two code elements are accumulated, as shown in table 1, each oversampling unit has three conditions of outputting 0 code element, 1 code element and 2 code elements, and the three conditions are output to a shift register through an even number alignment mode, so that the code element jitter in the algorithm can be overcome, and the processing of the code elements by a later stage is facilitated.
TABLE 1
Figure BDA0003229601470000071
Figure BDA0003229601470000081
According to the IEEE802.3 standard, the maximum duty cycle distortion allowed by the ethernet link layer is in the range of 40% -60%. The typical value threshold is set to be 12 by our algorithm, when the duty ratio of the received code element is 5:11, namely the distortion range of 30% -70%, the code element can be recovered and restored normally, which is far larger than the requirement specified by the standard, and the fault tolerance of the system is further improved. Based on sampling value errors caused by asynchronous clock deviation and clock jitter, the algorithm can be easily recovered in the recovery process of the code element. The logic algorithm can realize the communication function of the optical Ethernet data link layer through verification on an FPGA device, has higher fault-tolerant capability and has important significance for Ethernet communication.
According to the code element recovery and fault tolerance method for the optical Ethernet data link layer, the data processing is carried out on the high-speed asynchronous code elements to obtain the edge searching data, the typical value recursion calculation is further carried out on the edge searching data, the overturning code elements and the non-overturning code elements are determined, the distortion of code element sampling data caused by various factors is eliminated, the original data is restored from the distorted data, the fault tolerance capability of communication is improved, and the code element recovery and fault tolerance of the optical Ethernet data link layer are achieved.
Fig. 5 is a block diagram of an apparatus for recovering symbols and fault-tolerant of an optical ethernet data link layer according to an embodiment of the present invention.
Accordingly, referring to fig. 5, a second aspect of the embodiments of the present invention provides an apparatus for recovering and fault-tolerant data link layer symbols of an ethernet network, including:
the oversampling module 1 is used for receiving an optical Ethernet carrier signal, oversampling a high-speed asynchronous code element of the optical Ethernet carrier signal to obtain an oversampling value result, and caching the oversampling value;
the data processing module 2 is used for sequentially reading the high-speed asynchronous code elements according to a storage sequence, sequentially carrying out XOR operation on oversampling values in a bit-by-bit manner, and searching the code element hopping edge to determine edge searching data;
and the code element processing module 3 is used for indexing the hopping edge of the edge searching data by a typical value recursion method to obtain an inverted code element and a non-inverted code element, performing code element fault tolerance recovery according to the inverted code element and the non-inverted code element and outputting the code element.
Further, the data processing module 2 sequentially performs recursive calculation on the numerical value of the edge finding data by taking the buffer unit as a unit, and determines whether to output the flipped symbol and the non-flipped symbol. The inverted code element is the inversion of the value of the last code element, and the non-inverted code element is the continuation of the value of the last code element.
Further, a typical value of the recursive calculation is the sum of the current sequence number feature value and the last sequence number feature. The current sequence number characteristic value is the number of 0 behind 1 in the edge searching data, and the last sequence number characteristic value is the number of 0 in front of 1 in the previous edge searching data.
Further, the output threshold of the non-inverted symbol is set to the threshold of the typical value, when five consecutive same oversampled BITs are full, one non-inverted symbol is output, and when four consecutive same oversampled BITs are full, the non-inverted symbol is not output.
Further, the threshold value of the typical value is 12. When the typical value is greater than or equal to 12, outputting a non-flipping code element; when the typical value is less than 12, no non-flipped symbols are output.
Furthermore, the code element processing module outputs the code elements in units of even numbers, and the code elements are used as an output time slot after accumulating enough two code elements and output to the shift register in an even number alignment mode. Wherein each oversampling unit may output 0 symbols, 1 symbol, or 2 symbols.
The code element recovery and fault tolerance device for the optical Ethernet data link layer obtains the edge searching data by carrying out data processing on the high-speed asynchronous code elements, further carries out typical value recursion calculation on the edge searching data, determines the turnover code elements and the non-turnover code elements, eliminates the distortion of code element sampling data caused by various factors, restores the original data from the distorted data, improves the fault tolerance capability of communication, and realizes the code element recovery and fault tolerance of the optical Ethernet data link layer.
Accordingly, a third aspect of the embodiments of the present invention further provides an electronic device, including: at least one processor; and a memory coupled to the at least one processor; wherein the memory stores instructions executable by the one processor to cause the at least one processor to perform the above-described method of optical ethernet data link layer symbol recovery and fault tolerance.
Furthermore, a fourth aspect of the embodiments of the present invention further provides a computer-readable storage medium, on which computer instructions are stored, and when the instructions are executed by a processor, the method for recovering and fault-tolerant ethernet data link layer symbols is implemented.
The embodiment of the invention aims to protect a code element recovery and fault tolerance method and a device of an optical Ethernet data link layer, wherein the method comprises the following steps: receiving an optical Ethernet carrier signal, and oversampling a high-speed asynchronous code element of the optical Ethernet carrier signal to obtain an oversampling value result; reading out the high-speed asynchronous code elements in sequence according to a storage sequence, carrying out XOR operation on the over-sampling values in sequence from front to back according to bits, searching for the code element hopping edge and determining edge searching data; and searching the data jumping edge through a typical value recurrence method index to obtain an inverted code element and a non-inverted code element, and performing code element fault tolerance recovery and outputting the code element according to the inverted code element and the non-inverted code element. The technical scheme has the following effects:
the method comprises the steps of obtaining edge searching data by processing high-speed asynchronous code elements, further carrying out typical value recursion calculation on the edge searching data, determining an overturning code element and a non-overturning code element, eliminating distortion of code element sampling data caused by various factors, restoring original data from the distorted data, improving the fault tolerance of communication, and realizing code element recovery and fault tolerance of an optical Ethernet data link layer.
As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, system, or computer program product. Accordingly, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solutions of the present invention and not for limiting the same, and although the present invention is described in detail with reference to the above embodiments, those of ordinary skill in the art should understand that: modifications and equivalents may be made to the embodiments of the invention without departing from the spirit and scope of the invention, which is to be covered by the claims.

Claims (12)

1. A code element recovery and fault tolerance method for an optical Ethernet data link layer is characterized by comprising the following steps:
receiving an optical Ethernet carrier signal, and oversampling a high-speed asynchronous code element of the optical Ethernet carrier signal to obtain an oversampling value result;
reading the high-speed asynchronous code elements in sequence according to a storage sequence, carrying out XOR operation on the oversampling values in sequence according to the bits, searching the code element hopping edge and determining edge searching data;
and indexing the jumping edge of the edge searching data by a typical value recurrence method to obtain a flip code element and a non-flip code element, and performing code element fault tolerance recovery and outputting a code element according to the flip code element and the non-flip code element.
2. The method of claim 1, wherein indexing the edge-seeking data transition edges and deriving flipped and non-flipped symbols by a recursive approach to typical values comprises:
sequentially carrying out recursion calculation on the numerical values of the edge searching data, and judging whether the overturning code elements and the non-overturning code elements are output or not;
wherein the flipped symbol is a flip of a last symbol value, and the non-flipped symbol is a continuation of the last symbol value.
3. The Ethernet optical data link layer symbol recovery and fault tolerance method of claim 2,
the typical value in the recursion calculation is the sum of the current serial number characteristic value and the previous serial number characteristic;
the current sequence number characteristic value is the number of 0 behind 1 in the edge searching data, and the last sequence number characteristic value is the number of 0 in front of 1 in the previous edge searching data.
4. The Ethernet optical data link layer symbol recovery and fault tolerance method of claim 3,
and the output threshold of the non-inverted code element is set as the threshold of the typical value, when the five same over-sampled BITs are continuously filled, one non-inverted code element is output, and when the four same over-sampled BITs are continuously filled, the non-inverted code element is not output.
5. The Ethernet optical data link layer symbol recovery and fault tolerance method of claim 4,
the threshold value of the typical value is 12;
outputting one of the non-flipped symbols when the representative value is greater than or equal to 12;
when the representative value is less than 12, the non-flipped symbol is not output.
6. The method for recovering and fault-tolerant symbols of the data link layer of the optical ethernet according to claim 1, wherein the performing of the fault-tolerant recovery of the symbols and outputting the symbols comprises:
outputting the code elements in units of even numbers, and outputting the code elements to a shift register in an even number alignment mode after accumulating enough two code elements as an output time slot;
wherein each oversampling unit may output 0 symbols, 1 symbol, or 2 symbols.
7. An Ethernet over Ethernet data link layer code element recovery and fault tolerance device, comprising:
the oversampling module is used for receiving the optical Ethernet carrier signal and oversampling the high-speed asynchronous code element thereof to obtain an oversampling value result;
the data processing module is used for sequentially reading the high-speed asynchronous code elements according to a storage sequence, sequentially carrying out XOR operation on oversampling values in a bit-by-bit manner, and searching code element hopping edges to determine edge searching data;
and the code element processing module is used for indexing the hopping edge of the edge searching data by a typical value recurrence method to obtain a flip code element and a non-flip code element, and performing code element fault-tolerant recovery and outputting a code element according to the flip code element and the non-flip code element.
8. The Ethernet optical data link layer symbol recovery and fault tolerance apparatus of claim 7,
the data processing module carries out recursion calculation on the numerical values of the edge searching data in sequence and judges whether the overturning code elements and the non-overturning code elements are output or not;
wherein the flipped symbol is a flip of a last symbol value, and the non-flipped symbol is a continuation of the last symbol value.
9. The Ethernet optical data link layer symbol recovery and fault tolerance apparatus of claim 8,
the typical value of the recursion calculation is the sum of the current serial number characteristic value and the previous serial number characteristic;
the current sequence number characteristic value is the number of 0 behind 1 in the edge searching data, and the last sequence number characteristic value is the number of 0 in front of 1 in the previous edge searching data.
10. The Ethernet optical data link layer symbol recovery and fault tolerance apparatus of claim 9,
and the output threshold of the non-inverted code element is set as the threshold of the typical value, when the five same over-sampled BITs are continuously filled, one non-inverted code element is output, and when the four same over-sampled BITs are continuously filled, the non-inverted code element is not output.
11. The Ethernet optical data link layer symbol recovery and fault tolerance apparatus of claim 10,
the threshold value of the typical value is 12;
outputting one of the non-flipped symbols when the representative value is greater than or equal to 12;
when the representative value is less than 12, the non-flipped symbol is not output.
12. The Ethernet optical data link layer symbol recovery and fault tolerance apparatus of claim 7,
the code element processing module outputs the code elements by taking an even number as a unit, and the code elements are used as an output time slot after accumulating enough two code elements and output to the shift register in an even number alignment mode;
wherein each oversampling unit may output 0 symbols, 1 symbol, or 2 symbols.
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Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040208169A1 (en) * 2003-04-18 2004-10-21 Reznik Yuriy A. Digital audio signal compression method and apparatus
CN1722720A (en) * 2004-07-07 2006-01-18 三星电子株式会社 Detect the equipment and the method for the time synchronized of frame and code element
US20060034406A1 (en) * 2004-08-16 2006-02-16 Lg Electronics Inc. Apparatus for timing recovery and method thereof
US20140286466A1 (en) * 2013-03-20 2014-09-25 Qualcomm Incorporated Multi-wire open-drain link with data symbol transition based clocking
US20150234774A1 (en) * 2014-02-20 2015-08-20 Qualcomm Incorporated Coexistence of legacy and next generation devices over a shared multi-mode bus
WO2016078506A1 (en) * 2014-11-18 2016-05-26 刘伯安 Method and apparatus for asynchronously receiving serial data
CN110034915A (en) * 2019-04-19 2019-07-19 哈尔滨工业大学 A kind of high-speed asynchronous serial data transmission method applied to array Ground Penetrating Radar
CN112073169A (en) * 2019-06-11 2020-12-11 中车株洲电力机车研究所有限公司 Serial communication dynamic bit recovery device and method

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040208169A1 (en) * 2003-04-18 2004-10-21 Reznik Yuriy A. Digital audio signal compression method and apparatus
CN1722720A (en) * 2004-07-07 2006-01-18 三星电子株式会社 Detect the equipment and the method for the time synchronized of frame and code element
US20060034406A1 (en) * 2004-08-16 2006-02-16 Lg Electronics Inc. Apparatus for timing recovery and method thereof
US20140286466A1 (en) * 2013-03-20 2014-09-25 Qualcomm Incorporated Multi-wire open-drain link with data symbol transition based clocking
US20150234774A1 (en) * 2014-02-20 2015-08-20 Qualcomm Incorporated Coexistence of legacy and next generation devices over a shared multi-mode bus
WO2016078506A1 (en) * 2014-11-18 2016-05-26 刘伯安 Method and apparatus for asynchronously receiving serial data
CN110034915A (en) * 2019-04-19 2019-07-19 哈尔滨工业大学 A kind of high-speed asynchronous serial data transmission method applied to array Ground Penetrating Radar
CN112073169A (en) * 2019-06-11 2020-12-11 中车株洲电力机车研究所有限公司 Serial communication dynamic bit recovery device and method

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
YULUN CHENG; LONGXIANG YANG: "Phase offset equalization based on half-blind pre-distortion for asynchronous physical-layer network coding", 2017 IEEE 9TH INTERNATIONAL CONFERENCE ON COMMUNICATION SOFTWARE AND NETWORKS (ICCSN) *
钟声;谢顺钦;张健;杨春: "多指数连续相位调制信号非数据辅助的前馈符号定时恢复算法", 计算机应用 *

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