CN113746435A - Doherty power amplifier, base station comprising Doherty power amplifier and communication system - Google Patents
Doherty power amplifier, base station comprising Doherty power amplifier and communication system Download PDFInfo
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
- H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
- H03F1/0288—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/42—Modifications of amplifiers to extend the bandwidth
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F3/211—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W88/00—Devices specially adapted for wireless communication networks, e.g. terminals, base stations or access point devices
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Abstract
The application discloses a Doherty power amplifier, a base station comprising the Doherty power amplifier and a communication system comprising the Doherty power amplifier. The Doherty power amplifier comprises a power divider, a carrier power amplifying circuit, a peak power amplifying circuit and a load modulation network. The load modulation network comprises a first microstrip line, a second microstrip line and a double-frequency matching circuit, one end of the first microstrip line and one end of the second microstrip line are respectively connected with the output ends of the carrier power amplification circuit and the peak power amplification circuit, the other ends of the first microstrip line and the second microstrip line are connected to be used as a path combining end to be connected with one end of the double-frequency matching circuit, and the other end of the double-frequency matching circuit is connected with a load. Compared with the traditional Doherty power amplifier, the double-frequency matching circuit can compensate the frequency dispersion effect of the microstrip line, can obviously improve the bandwidth of the power amplifier and the backspacing efficiency, and is well applied to a future wireless communication system.
Description
Technical Field
The present invention relates to the field of communications technologies, and in particular, to a Doherty power amplifier, and a base station and a communication system including the Doherty power amplifier.
Background
In recent years, with the increasing demand of data traffic and the emergence of new radio frequency front ends, the popularization of 5G communication is faster and faster. In order to fully exploit the potential of 4G networks and protect existing large-scale communication assets during this time period of gradual transition to 5G communication, mobile communication systems will generate new communication standards and modes. This requires the development of new frequency bands, and also the need to minimize the space occupied by the rf front-end and reduce the cost, which will be the case for a long time in the future. A Power Amplifier (PA) plays an important role in a wireless communication system, and the quality of the PA greatly affects the quality of the communication system, so that research on broadening bandwidth of the PA is particularly important. The Doherty power amplifier has the advantages of simple structure, high efficiency and low cost, so that it becomes the mainstream form of the power amplifier adopted by the current wireless communication system.
Fig. 1 is a schematic block diagram of a conventional Doherty power amplifier. As shown in fig. 1, the Doherty power amplifier 100 includes a power divider 110, a carrier power amplifying circuit 120, a peak power amplifying circuit 130, and microstrip lines TL1 to TL 3. The carrier power amplification circuit 120 includes a carrier input matching circuit 121, a carrier amplifier 122, a carrier output matching circuit 123, and a compensation line 124. The peak power amplifying circuit 130 includes a peak input matching circuit 131, a peak amplifier 132, a peak output matching circuit 133, and a compensation line 134. The power divider 110 divides an input Radio Frequency (RF) signal into two paths, which are respectively sent to the carrier power amplifier circuit 120 and the peak power amplifier circuit 130, and in a low power state, the peak amplifier 132 does not enter a working state, and the signal passes through the power divider 110, goes through the carrier input matching circuit 121 to the carrier amplifier 122, and then is provided with output power by the carrier output matching circuit 123. When the power of the input signal reaches a certain critical point, the peak amplifier 132 just enters the operating state, and the carrier amplifier 122 is close to the saturation state at this time. If the input power is increased again, the peak amplifier 132 just enters a stable operating state, and the entire Doherty power amplifier enters a high output power state. The 1/4 wavelength microstrip TL2 behind the carrier power amplifier circuit 120 functions as an impedance transformation, that is, when the peak amplifier 132 operates, the equivalent load impedance of the carrier amplifier 122 is reduced, so that both the output power and the efficiency are maintained at a high level.
The conventional Doherty power amplifier uses two impedance transformers for load modulation, and the two impedance transformers are all composed of 1/4 wavelength microstrip lines (i.e. microstrip lines TL2 and TL3 in fig. 1), so that the bandwidth characteristic of the Doherty power amplifier is limited. The main reason is that the 1/4 wavelength microstrip line has a frequency dispersion effect, that is, the microstrip line at the output end in the prior art is designed on the basis of a certain central frequency, and as the signal frequency deviates from the central frequency, the impedance transformation line and the phase compensation line at the output end have relatively large fluctuation, so that the output impedance of the carrier power amplification circuit and the peak amplification circuit is unstable, and the instability causes the defect that the bandwidth of the traditional Doherty power amplifier is narrow.
With the development of wireless communication technology, the signal bandwidth is also increasing, and how to widen the bandwidth of the Doherty power amplifier becomes a problem to be solved urgently.
Disclosure of Invention
In view of the above problems, an object of the present invention is to provide a Doherty power amplifier, and a base station and a communication system including the same, which can significantly improve the bandwidth of the Doherty power amplifier.
According to an aspect of the present invention, there is provided a Doherty power amplifier including: the power divider is suitable for dividing input signals and then respectively outputting the input signals to the carrier power amplifying circuit and the peak power amplifying circuit, the output ends of the carrier power amplifying circuit and the peak power amplifying circuit are connected with the load modulation network, power is output to a load through the load modulation network, the load modulation network comprises a first microstrip line, a second microstrip line and a dual-frequency matching circuit, one end of the first microstrip line and one end of the second microstrip line are respectively connected with the output ends of the carrier power amplifying circuit and the peak power amplifying circuit, the other end of the first microstrip line and the other end of the second microstrip line are connected as a combined end and are connected with one end of the dual-frequency matching circuit, and the other end of the dual-frequency matching circuit is connected with the load, the dual-frequency matching circuit is used for compensating the frequency dispersion effect of the microstrip line so as to widen the bandwidth of the power amplifier.
Optionally, the dual-frequency matching circuit includes: and the third microstrip line and the fourth microstrip line are sequentially connected between the combining end and the load.
Optionally, the load modulation network further includes: and the first phase shift line is connected between the first microstrip line and the combining end, one end of the first phase shift line is connected with the other end of the first microstrip line, and the other end of the first phase shift line is connected with the combining end.
Optionally, the Doherty power amplifier further comprises: and the second phase shift line is connected between the output end of the power divider and the input end of the peak power amplification circuit.
Optionally, the power divider is implemented by an equally-divided wilkinson power divider.
Optionally, the power divider includes fifth to ninth microstrip lines and a first resistor, where one end of the fifth microstrip line is connected to the input signal, the other end of the fifth microstrip line is connected to one ends of a sixth microstrip line and a seventh microstrip line, the other ends of the sixth microstrip line and the seventh microstrip line are connected to two ends of the first resistor, one end of an eighth microstrip line is connected to a junction of the sixth microstrip line and the first resistor, the other end of the eighth microstrip line is connected to the input end of the carrier power amplifier circuit as a signal output end, one end of the ninth microstrip line is connected to a junction of the seventh microstrip line and the first resistor, and the other end of the ninth microstrip line is connected to the input end of the peak power amplifier circuit as another signal output end.
Optionally, the carrier power amplifying circuit and the peak power amplifying circuit both include: the input matching circuit, the stabilizing circuit, the amplifier and the output matching circuit are sequentially connected in series.
Optionally, the amplifiers in the carrier power amplifying circuit and the peak power amplifying circuit are both implemented by transistors.
Optionally, the carrier power amplifying circuit and the peak power amplifying circuit both further include: the grid biasing circuit is connected with the grid of the amplifier and used for providing voltage for the grid of the amplifier; and the drain electrode biasing circuit is connected with the drain electrode of the amplifier and is used for providing voltage for the drain electrode of the amplifier.
Optionally, the input matching circuit includes a first capacitor, a tenth microstrip line, an eleventh microstrip line, and a twelfth microstrip line connected in series between the input terminal of the amplifying circuit and the gate of the transistor.
Optionally, the stabilizing circuit is implemented by a resistor-capacitor network formed by connecting a second resistor and a second capacitor in parallel.
Optionally, the output matching circuit includes a thirteenth microstrip line, a fourteenth microstrip line, a fifteenth microstrip line and a third capacitor connected in series between the drain of the transistor and the output end of the amplifying circuit.
Optionally, the gate bias circuit includes: a sixteenth microstrip line, a seventeenth microstrip line, an eighteenth microstrip line, a nineteenth microstrip line and a third resistor which are connected in series between the gate power supply and the gate of the transistor; and one ends of the fourth to sixth capacitors are respectively connected between two adjacent microstrip lines in the sixteenth to nineteenth microstrip lines, and the other ends of the fourth to sixth capacitors are grounded.
Optionally, the nineteenth microstrip line is a microstrip line with a wavelength of 1/4.
Optionally, the drain bias circuit includes: a twentieth microstrip line, a twenty-first microstrip line, a twenty-second microstrip line and a twenty-third microstrip line which are connected in series between the drain electrode and the drain electrode power supply of the transistor; and one ends of the seventh to ninth capacitors are respectively connected between two adjacent microstrip lines in the twentieth to twenty-third microstrip lines, and the other ends of the seventh to ninth capacitors are grounded.
Optionally, the twentieth microstrip line is a microstrip line with a wavelength of 1/4.
According to another aspect of the present invention, there is also provided a base station comprising the Doherty power amplifier described above.
According to still another aspect of the present invention, there is also provided a communication system including the above-mentioned base station.
In summary, the load modulation network of the Doherty power amplifier provided by the invention includes a first microstrip line, a second microstrip line and a dual-frequency matching circuit, wherein one end of the first microstrip line and one end of the second microstrip line are respectively connected with the output ends of the carrier power amplifying circuit and the peak power amplifying circuit, the other ends of the first microstrip line and the second microstrip line are connected as a combining end and connected with one end of the dual-frequency matching circuit, and the other end of the dual-frequency matching circuit is connected with a load. Compared with the traditional Doherty power amplifier, the double-frequency matching circuit can compensate the frequency dispersion effect of the microstrip line, can obviously improve the bandwidth of the power amplifier and the backspacing efficiency, and is well applied to a future wireless communication system.
Drawings
Fig. 1 is a schematic block diagram of a conventional Doherty power amplifier;
fig. 2 is a schematic block diagram of a Doherty power amplifier according to an embodiment of the present invention;
fig. 3 is a schematic circuit diagram of the power divider of fig. 2;
fig. 4 is a schematic circuit diagram of the carrier power amplifying circuit of fig. 2;
fig. 5 is a diagram of the ADS simulation result of the Doherty power amplifier according to the embodiment of the present invention;
fig. 6 is a diagram of ADS simulation results of the Doherty power amplifier of the embodiment of the invention under different output powers;
fig. 7 is a diagram of the ADS simulation result of the Doherty power amplifier of the embodiment of the invention under different input powers.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Fig. 2 is a schematic block diagram of a Doherty power amplifier according to an embodiment of the present invention. As shown in fig. 2, the Doherty power amplifier 200 includes a power divider 210, a carrier power amplifying circuit 220, a peak power amplifying circuit 230, and a load modulating circuit 240. The power divider 210 is configured to distribute the input radio frequency signals and output the distributed radio frequency signals to the carrier power amplifying circuit 220 and the peak power amplifying circuit 230, where output ends of the carrier power amplifying circuit 220 and the peak power amplifying circuit 230 are connected to a load modulation network 240, and output power to a load through the load modulation network 240.
Optionally, the carrier power amplifying circuit 220 includes a carrier input matching circuit 221, a stabilizing circuit 222, a carrier gate bias circuit 223, a carrier amplifier 224, a carrier drain bias circuit 225, and a carrier output matching circuit 226, which are sequentially connected in series. The peak power amplification circuit 230 includes a peak input matching circuit 231, a stabilization circuit 232, a peak gate bias circuit 233, a peak amplifier 234, a peak drain bias circuit 235, and a peak output matching circuit 236, which are connected in series in this order.
The load modulation network 240 includes a first microstrip line TL1, a second microstrip line TL2, and a dual-frequency matching circuit 241. One end of the first microstrip line TL1 is connected to the output end of the carrier power amplifier circuit 220, one end of the second microstrip line TL2 is connected to the output end of the peak power amplifier circuit 230, the other end of the first microstrip line TL1 is connected to the other end of the second microstrip line TL2 as a junction end to be connected to one end of the dual-frequency matching circuit 241, and the other end of the dual-frequency matching circuit 241 is connected to a load. The first microstrip line TL1 and the second microstrip line TL2 are both microstrip lines with 1/4 wavelengths.
Compared with the traditional Doherty power amplifier, the technical scheme has the advantages that the double-frequency transmission line principle is adopted after the combiner end, the double-frequency matching circuit 241 replaces the traditional microstrip line with the wavelength of 1/4, the frequency dispersion effect of the microstrip line can be compensated, the drift of the load impedance along with the change of the working frequency is effectively restrained, and the purpose of widening the bandwidth of the Doherty power amplifier is achieved.
Optionally, the dual-frequency matching circuit 241 includes a third microstrip line TL3 and a fourth microstrip line TL4, where one end of the third microstrip line TL3 is connected to the combining end, the other end of the third microstrip line TL 3526 is connected to one end of the fourth microstrip line TL4, and the other end of the fourth microstrip line TL4 is connected to the load. The third microstrip line TL3 and the fourth microstrip line TL4 jointly realize a dual-frequency function, so as to compensate for a frequency dispersion effect generated by the former phase-shift microstrip line, and because the third microstrip line TL3 and the fourth microstrip line TL4 jointly realize dual-frequency, parameters of the two microstrip lines are restricted with each other, and the two microstrip lines are not necessarily 1/4 wavelengths, specifically related to selection of dual-frequency points, and can be obtained through calculation, so that the bandwidth of the power amplifier can be effectively widened.
Optionally, the load modulation network 240 further includes a first phase shift line T1 connected between the first microstrip line TL1 and the combining end, one end of the first phase shift line T1 is connected to the other end of the first microstrip line TL1, and the other end of the first phase shift line T1 is connected to the combining end. Through phase conversion, the signal output by the carrier power amplifying circuit 220 and the signal output by the peak power amplifying circuit 230 can be synthesized to the combining terminal. In addition, the Doherty power amplifier 200 further includes a second phase shift line T2 connected between the output terminal of the power divider 210 and the input terminal of the peak power amplifying circuit 230.
In this embodiment, the two power amplifying circuits do not work in turn, but the carrier power amplifying circuit 220 works all the time, and the peak power amplifying circuit 230 works only when the input rf signal reaches a set peak value. The first phase shift line T1 with the wavelength of 1/4 of 90 ° connected behind the carrier power amplifier circuit 220 is used for impedance transformation, and is intended to play a role in reducing the output impedance of the carrier power amplifier circuit when the peak power amplifier circuit 230 operates, so as to ensure that the active load impedance formed by the peak power amplifier circuit 230 and the following circuits when the peak power amplifier circuit 230 operates is reduced, thereby increasing the output current of the carrier power amplifier circuit 220. Since the carrier power amplifier circuit 220 is followed by the quarter-wave first phase shift line T1, a 90 ° 1/4-wave second phase shift line T2 is also required at the input of the peak power amplifier circuit 230 in order to make the outputs of the two power amplifier circuits in phase.
Fig. 3 is a schematic circuit diagram of the power divider in fig. 2. In the present embodiment, the power divider 210 is implemented by, for example, an equal division wilkinson power divider, and as shown in fig. 3, the power divider 210 includes fifth to ninth microstrip lines TL5 to TL9 and a resistor R1. One end of the fifth microstrip line TL5 is connected to the port P1, the other end is connected to one end of the sixth microstrip line TL6 and one end of the seventh microstrip line TL7, and the other ends of the sixth microstrip line TL6 and the seventh microstrip line TL7 are connected to both ends of the resistor R1. One end of the eighth microstrip line TL8 is connected to a junction of the sixth microstrip line TL6 and the resistor R1, and the other end of the eighth microstrip line TL8 is connected to the port P2. One end of the ninth microstrip line TL9 is connected to the junction of the seventh microstrip line TL7 and the resistor R1, and the other end of the ninth microstrip line TL9 is connected to the port P3. The port P1 of the power divider 210 is connected to a radio frequency input signal, and is configured to divide the input radio frequency signal into two paths of signals with the same amplitude and a phase difference of 90 °. One path of signal without phase shift is connected to the input end of the carrier power amplifying circuit 220 through a port P2, and one path of signal with 90 ° phase shift is connected to the input end of the peak power amplifying circuit 230 through a port P3.
The power divider designed by combining the microstrip line and the isolation resistor in the embodiment can distribute equal power to the input radio frequency signal, and then serve as the input of the carrier power amplifying circuit 220 and the peak power amplifying circuit 230, when the output ends are matched, the power divider designed by the embodiment has good isolation, and can realize lossless power distribution theoretically.
Fig. 4 is a schematic circuit diagram of the carrier power amplifying circuit of fig. 2. In the present embodiment, the carrier amplifier 224 in the carrier power amplifying circuit 220 may be implemented by a transistor, for example.
Further, in the embodiment of the present invention, the carrier input matching circuit 221 and the carrier output matching circuit 226 both obtain characteristic impedance and electrical length by Smith chart matching according to the drawn optimal impedance value, and then convert the ideal transmission line into a microstrip line. As shown in fig. 4, the carrier input matching circuit 221 includes a serial capacitance C1, a tenth microstrip line TL10, an eleventh microstrip line TL11, and a twelfth microstrip line TL 12. One end of a serial capacitor C1 is connected to the output end of the power divider 210 through a port P4, the other end of a serial capacitor C1 is connected to one end of a tenth microstrip line TL10, the other end of the tenth microstrip line TL10 is connected to one end of an eleventh microstrip line TL11, the other end of the eleventh microstrip line TL11 is connected to one end of the stabilizing circuit 222, the other end of the stabilizing circuit 222 is connected to one end of a twelfth microstrip line TL12, and the other end of the twelfth microstrip line TL12 is connected to the gate of the transistor.
The resistor R2 and the capacitor C2 form a resistor-capacitor network to form the stabilizing circuit 222, so that self-oscillation of the transistor caused at certain frequency points can be avoided. One junction of the resistor R2 and the parallel capacitor C2 is connected to the other end of the eleventh microstrip line TL11, and the other junction of the resistor R2 and the parallel capacitor C2 is connected to one end of the twelfth microstrip line TL 12.
The carrier output matching circuit 226 includes a thirteenth microstrip line TL13, a fourteenth microstrip line TL14, a fifteenth microstrip line TL15, and a serial capacitor C3 in series. The thirteenth microstrip line TL13 to the fifteenth microstrip line TL15 are sequentially connected in series between the drain of the transistor and one end of the serial capacitor C3, the other end of the serial capacitor C3 is connected to a port P5, and the port P5 is used as an output end of the carrier power amplification circuit 220.
In the design of a power amplifier, the design of a bias circuit is a critical step, and a certain bias circuit (static operating point) is required for the transistor to work normally. Each transistor needs to select a quiescent operating point to achieve the design criteria, and in power amplifiers the bias supplies the transistor. The grid bias circuit is connected with the grid of the transistor and provides voltage for the grid, the voltage determines the static working point of the transistor, and the static working point directly influences the working state of the power amplifier. The drain bias circuit is connected to the drain to determine the voltage at the drain, and generally has a large voltage and needs to carry a large current during operation.
As shown in fig. 4, the embodiment of the present invention employs a structure in which microstrip lines with 1/4 wavelengths are connected in series and parallel capacitors are connected in series to form a gate bias circuit and a drain bias circuit. Specifically, the carrier gate bias circuit 223 includes sixteenth to nineteenth microstrip lines TL16 to TL19 and a resistor R3 connected in series between the port P6 and the gate of the transistor, and capacitors C4 to C6. The port P6 is used for connecting a gate power supply, the nineteenth microstrip line TL19 is a 1/4 wavelength microstrip line, one end of each of the capacitors C4 to C6 is connected between the two microstrip lines, and the other end of each of the capacitors is grounded. The capacitors C4 to C6 can be used to filter out radio frequency components of various frequencies and unavoidable alternating current components in the dc power supply, protect the amplifier circuit, and effectively maintain the stability of the circuit.
The carrier drain bias circuit 225 includes twenty-third microstrip lines TL20 to TL23 and capacitances C7 to C9 connected in series in this order between the drain of the transistor and the port P7. The port P7 is used for connecting a drain power supply, the twentieth microstrip line TL20 is a 1/4 wavelength microstrip line, one end of each of the capacitors C7 to C9 is connected between the two microstrip lines, and the other end is grounded. The capacitors C7 to C9 can be used to filter out radio frequency components of various frequencies and unavoidable alternating current components in the dc power supply, protect the amplifier circuit, and effectively maintain the stability of the circuit.
It should be noted that the peak power amplifying circuit 230 of the embodiment of the present invention adopts the same circuit structure as the carrier power amplifying circuit 220, wherein the peak input matching circuit 231, the stabilizing circuit 232, the peak gate bias circuit 233, the peak amplifier 234, the peak drain bias circuit 235 and the peak output matching circuit 236 adopt the same structure as that disclosed in fig. 4, and are not described herein again.
Fig. 5 is a diagram of the ADS simulation result of the Doherty power amplifier according to the embodiment of the invention. By utilizing the technical scheme, the invention designs the broadband Doherty power amplifier with the working center frequency of 3 GHz. The power supply voltage of the carrier power amplifying circuit is 2.7V and 28V respectively; the supply voltages of the peak power amplifying circuit are 1.34V and 28V, respectively. As shown in fig. 5, simulation results show that the operating frequency band of the power amplifier according to the embodiment of the present invention is 2.3GHz to 3.7GHz, the return loss S11 is-40.245 dBm at the center frequency of 3GHz, and the insertion loss S21 is 16.509 dBm.
Fig. 6 and fig. 7 are graphs of ADS simulation results of the Doherty power amplifier according to the embodiment of the invention under different output powers and input powers, respectively. As shown in fig. 6 and 7, the overall Doherty power amplifier of the embodiment of the invention has a gain of 15.833dBm at an input power of 25dBm, a power added efficiency PAE of 62.050%, and a power added efficiency of 40.269% at a back-off interval of-6 dB.
It can be seen from the above embodiments that the Doherty power amplifier provided by the invention adopts the load modulation network formed based on the dual-frequency matching circuit, and compared with the Doherty power amplifier, the Doherty power amplifier can significantly improve the bandwidth of the power amplifier, improve the back-off efficiency, and be well applied to the future wireless communication system.
According to another aspect of the present invention, there is provided a base station and a communication system including the Doherty power amplifier of the above embodiments.
The foregoing embodiments of the invention have not described in detail all of the details of the invention, nor are they intended to be the only specific embodiments of the invention. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and the practical application, to thereby enable others skilled in the art to best utilize the invention and various embodiments with various modifications as are suited to the particular use contemplated. The scope of the invention should be determined from the following claims.
Claims (18)
1. A Doherty power amplifier comprising: a power divider, a carrier power amplifying circuit, a peak power amplifying circuit and a load modulation network, wherein,
the power divider is suitable for distributing input signals and then respectively outputting the input signals to the carrier power amplifying circuit and the peak power amplifying circuit, the output ends of the carrier power amplifying circuit and the peak power amplifying circuit are connected with the load modulation network, and power is output to a load through the load modulation network,
the load modulation network comprises a first microstrip line, a second microstrip line and a dual-frequency matching circuit, one end of the first microstrip line and one end of the second microstrip line are respectively connected with the output ends of the carrier power amplifying circuit and the peak power amplifying circuit, the other ends of the first microstrip line and the second microstrip line are connected as a combined end to be connected with one end of the dual-frequency matching circuit, the other end of the dual-frequency matching circuit is connected with the load,
the dual-frequency matching circuit is used for compensating the frequency dispersion effect of the microstrip line so as to widen the bandwidth of the power amplifier.
2. The Doherty power amplifier of claim 1 wherein the dual frequency matching circuit comprises:
and the third microstrip line and the fourth microstrip line are sequentially connected between the combining end and the load.
3. The Doherty power amplifier of claim 1 wherein the load modulation network further comprises:
and the first phase shift line is connected between the first microstrip line and the combining end, one end of the first phase shift line is connected with the other end of the first microstrip line, and the other end of the first phase shift line is connected with the combining end.
4. The Doherty power amplifier of claim 1 further comprising:
and the second phase shift line is connected between the output end of the power divider and the input end of the peak power amplification circuit.
5. The Doherty power amplifier of claim 1 wherein the power divider is implemented by an equally dividing wilkinson power divider.
6. The Doherty power amplifier of claim 5 wherein the power divider comprises fifth to ninth microstrip lines and a first resistor,
wherein one end of the fifth microstrip line is connected with the input signal, the other end of the fifth microstrip line is connected with one end of the sixth microstrip line and one end of the seventh microstrip line,
the other ends of the sixth microstrip line and the seventh microstrip line are respectively connected with two ends of the first resistor,
one end of an eighth microstrip line is connected with the joint point of the sixth microstrip line and the first resistor, the other end of the eighth microstrip line is used as a signal output end and is connected with the input end of the carrier power amplifying circuit,
one end of a ninth microstrip line is connected with a joint point of the seventh microstrip line and the first resistor, and the other end of the ninth microstrip line is connected with the input end of the peak power amplifying circuit as the other signal output end.
7. The Doherty power amplifier of claim 1 wherein the carrier power amplifying circuit and the peak power amplifying circuit each comprise:
the input matching circuit, the stabilizing circuit, the amplifier and the output matching circuit are sequentially connected in series.
8. The Doherty power amplifier of claim 7 wherein the amplifiers in both the carrier power amplifying circuit and the peaking power amplifying circuit are implemented with transistors.
9. The Doherty power amplifier of claim 8 wherein the carrier power amplifying circuit and the peak power amplifying circuit each further comprise:
the grid biasing circuit is connected with the grid of the amplifier and used for providing voltage for the grid of the amplifier; and
and the drain electrode biasing circuit is connected with the drain electrode of the amplifier and is used for providing voltage for the drain electrode of the amplifier.
10. The Doherty power amplifier of claim 9 wherein the input matching circuit comprises a first capacitor, a tenth microstrip line, an eleventh microstrip line and a twelfth microstrip line connected in series between the input of the amplifying circuit and the gate of the transistor.
11. The Doherty power amplifier of claim 9 wherein the stabilizing circuit is implemented by a resistor-capacitor network formed by a second resistor and a second capacitor connected in parallel.
12. The Doherty power amplifier of claim 9 wherein the output matching circuit comprises a thirteenth microstrip line, a fourteenth microstrip line, a fifteenth microstrip line and a third capacitor connected in series between the drain of the transistor and the output of the amplifying circuit.
13. The Doherty power amplifier of claim 9 wherein the gate bias circuit comprises:
a sixteenth microstrip line, a seventeenth microstrip line, an eighteenth microstrip line, a nineteenth microstrip line and a third resistor which are connected in series between the gate power supply and the gate of the transistor; and
and one end of each of the fourth to sixth capacitors is connected between two adjacent microstrip lines in the sixteenth to nineteenth microstrip lines, and the other end of each of the fourth to sixth capacitors is grounded.
14. The Doherty power amplifier of claim 13 wherein the nineteenth microstrip line is an 1/4 wavelength microstrip line.
15. The Doherty power amplifier of claim 9 wherein the drain bias circuit comprises:
a twentieth microstrip line, a twenty-first microstrip line, a twenty-second microstrip line and a twenty-third microstrip line which are connected in series between the drain electrode and the drain electrode power supply of the transistor; and
and one ends of the seventh to ninth capacitors are respectively connected between two adjacent microstrip lines in the twentieth to twenty-third microstrip lines, and the other ends of the seventh to ninth capacitors are grounded.
16. The Doherty power amplifier of claim 15 wherein the twentieth microstrip line is an 1/4 wavelength microstrip line.
17. A base station comprising the Doherty power amplifier of any one of claims 1 to 16.
18. A communication system comprising the base station of claim 17.
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