CN117240235B - Power amplifying circuit and electronic system - Google Patents
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Abstract
The invention provides a power amplification circuit and an electronic system, which are suitable for the field of microwave ablation and provide accurate ablation power for the power amplification circuit. Wherein the power amplifying circuit includes: a power amplifier and a peripheral circuit connected to the power amplifier; the peripheral circuit includes: a bandwidth expansion circuit; the bandwidth expansion circuit includes: a plurality of microstrip lines and a plurality of capacitors; the bandwidth expansion circuit is connected with the drain electrode of the transistor; the drain electrode of the transistor is connected with the parasitic compensation circuit; the bandwidth expansion circuit is used for adjusting the resistance and reactance of the power amplification circuit based on the microstrip line and the capacitor; the parasitic compensation circuit is used for adjusting the resistance and reactance of the power amplification circuit based on the microstrip line so as to offset parasitic parameters in the transistor; the parasitic compensation circuit is arranged to adjust parameters in the circuit so as to reduce the influence of transistor parasitic parameters, and the bandwidth expansion circuit is arranged to adjust the resistance and reactance of the circuit, so that the bandwidth of the power amplification circuit is widened.
Description
Technical Field
The invention relates to the technical field of radio frequency circuit application, in particular to a power amplifying circuit and an electronic system.
Background
Minimally invasive ablation is a development trend of the future minimally invasive medical industry, and the microwave ablation instrument is used as main flow equipment for minimally invasive ablation, so that the characteristics of high efficiency and accuracy are very important. Therefore, in the background of the increasingly developed industry of wireless communication systems, the microwave ablation instrument is suitable for operation and is designed under the most important new standards of various wireless communication. This new set of standards places higher demands on the rf front-end components to meet the demands of the different industrial applications now. The radio frequency power amplifier is a key module in a broadband or multiband system, and its performance has a great influence on the performance of the whole system in terms of bandwidth, output power and efficiency. In the current trend, in order to pursue broadband and high-efficiency power amplification, switching power amplifiers such as class E and class F power amplifiers are widely studied.
However, the existing power amplifier has the problems of large influence of parasitic parameters and narrow bandwidth.
Disclosure of Invention
In view of the above, an object of the present invention is to provide a power amplifying circuit and an electronic system, in which the parasitic compensation circuit is set to adjust the parameters in the circuit, so as to reduce the influence of the parasitic parameters of the transistor, and the bandwidth of the power amplifying circuit is widened by setting the resistance and reactance of the bandwidth extending circuit to adjust the circuit.
In a first aspect, the present invention provides a power amplifying circuit comprising: a power amplifier and a peripheral circuit connected to the power amplifier; the power amplifier includes: a transistor, an L-shaped parasitic compensation circuit; the L-shaped parasitic compensation circuit comprises: two microstrip lines; the peripheral circuit includes: a bandwidth expansion circuit; the bandwidth expansion circuit includes: a plurality of microstrip lines and a plurality of capacitors; the bandwidth expansion circuit is connected with the drain electrode of the transistor; the drain electrode of the transistor is connected with the parasitic compensation circuit; the bandwidth expansion circuit is used for adjusting the resistance and reactance of the power amplification circuit based on the microstrip line and the capacitor; the L-shaped parasitic compensation circuit is used for adjusting the resistance and reactance of the power amplification circuit based on the microstrip line so as to offset parasitic parameters in the transistor; wherein the parasitic parameters include: parasitic capacitance, parasitic inductance and parasitic resistance between the drain and source of the transistor, and equivalent parameters resulting from parasitic capacitance of the transistor package.
In some preferred embodiments of the present invention, the peripheral circuit further comprises: an input matching circuit; the signal source, the input matching circuit and the grid electrode of the transistor are sequentially connected; and the input matching circuit is used for matching the output impedance of the signal source with the input impedance of the transistor.
In some preferred embodiments of the present invention, the input matching circuit includes a plurality of microstrip lines connected in series in turn; the input matching circuit is arranged in a step matching mode.
In some preferred embodiments of the present invention, the peripheral circuit further comprises: an RC parallel circuit; the RC parallel circuit includes: a resistor and a capacitor connected in parallel; the signal source, the RC parallel circuit and the grid electrode of the transistor are sequentially connected; a resistor in the RC parallel circuit is used for limiting the current of the signal output by the signal source; and the capacitor in the RC parallel circuit is used for shorting out the high-frequency harmonic signals in the signal source output signals.
In some preferred embodiments of the present invention, the peripheral circuit further comprises: an output matching circuit; the parasitic compensation circuit is connected with the output matching circuit and the load in sequence; and the output matching circuit is used for matching the output impedance of the transistor with the load.
In some preferred embodiments of the present invention, the output matching circuit includes a plurality of microstrip lines connected in series in turn; the output matching circuit is arranged in a step matching mode.
In some preferred embodiments of the present invention, the power amplifying circuit further comprises: a gate bias circuit and a drain bias circuit; the gate bias circuit includes: a plurality of capacitors connected in parallel; the grid power supply, the grid bias circuit and the grid of the transistor are sequentially connected; the drain bias circuit includes: a plurality of capacitors connected in parallel; the drain power supply, the drain bias circuit and the drain of the transistor are sequentially connected; a gate bias circuit for consuming a fundamental frequency signal of transistor gate leakage based on the microstrip line; the grid bias circuit is also used for grounding the high-frequency harmonic signals leaked by the grid of the transistor; the drain bias circuit is used for consuming the baseband signal leaked by the load based on the microstrip line; the drain bias circuit is also used for grounding the high-frequency harmonic signals leaked by the load.
In some preferred embodiments of the present invention, the drain bias circuit further comprises: a sector microstrip line; and the sector microstrip line is used for adjusting the resistance and reactance of the power amplifying circuit.
In some preferred embodiments of the present invention, the power amplifying circuit further comprises: a harmonic control circuit; the power amplifier is connected with the harmonic control circuit; and the harmonic control circuit is used for adjusting the load impedance of the power amplifier.
In a second aspect, the present invention provides an electronic system comprising: an electronic device and a power amplifying circuit of any of the above; the electronic equipment is connected with the output end of the power amplifying circuit; the electronic device operates based on the signal output by the power amplification circuit.
The invention has the following beneficial effects:
the invention provides a power amplifying circuit and an electronic system, wherein the power amplifying circuit comprises: a power amplifier and a peripheral circuit connected to the power amplifier; the power amplifier includes: a transistor, an L-shaped parasitic compensation circuit; the L-shaped parasitic compensation circuit comprises: two microstrip lines; the peripheral circuit includes: a bandwidth expansion circuit; the bandwidth expansion circuit includes: a plurality of microstrip lines and a plurality of capacitors; the bandwidth expansion circuit is connected with the drain electrode of the transistor; the drain electrode of the transistor is connected with the parasitic compensation circuit; the bandwidth expansion circuit is used for adjusting the resistance and reactance of the power amplification circuit based on the microstrip line and the capacitor; the L-shaped parasitic compensation circuit is used for adjusting the resistance and reactance of the power amplification circuit based on the microstrip line so as to offset parasitic parameters in the transistor; wherein the parasitic parameters include: parasitic capacitance, parasitic inductance and parasitic resistance between the drain and source of the transistor, and equivalent parameters generated by the parasitic capacitance of the transistor package; the parasitic compensation circuit is arranged to adjust parameters in the circuit so as to reduce the influence of transistor parasitic parameters, and the bandwidth expansion circuit is arranged to adjust the resistance and reactance of the circuit, so that the bandwidth of the power amplification circuit is widened.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are needed in the description of the embodiments or the prior art will be briefly described, and it is obvious that the drawings in the description below are some embodiments of the present invention, and other drawings can be obtained according to the drawings without inventive effort for a person skilled in the art.
Fig. 1 is a circuit diagram of a power amplifying circuit according to an embodiment of the present invention;
fig. 2 is a circuit diagram of another power amplifying circuit according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of two matching circuit structures according to an embodiment of the present invention;
FIG. 4 is a chart of a multi-branch matching Smith chart according to an embodiment of the invention;
FIG. 5 is a step-matching Smith chart according to an embodiment of the invention;
FIG. 6 is a schematic diagram of a harmonic equivalent circuit according to an embodiment of the present invention;
fig. 7 is a schematic structural diagram of an electronic system according to an embodiment of the present invention.
Icon: 30-an electronic system; 31-a power amplifying circuit; 32-an electronic device.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. The components of the embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the invention, as presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
It should be noted that: like reference numerals and letters denote like items in the following figures, and thus once an item is defined in one figure, no further definition or explanation thereof is necessary in the following figures.
In the description of the present invention, it should be noted that, directions or positional relationships indicated by terms such as "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., are directions or positional relationships based on those shown in the drawings, or are directions or positional relationships conventionally put in use of the inventive product, are merely for convenience of describing the present invention and simplifying the description, and are not indicative or implying that the apparatus or element to be referred to must have a specific direction, be constructed and operated in a specific direction, and thus should not be construed as limiting the present invention. Furthermore, the terms "first," "second," "third," and the like are used merely to distinguish between descriptions and should not be construed as indicating or implying relative importance.
Furthermore, the terms "horizontal," "vertical," "overhang," and the like do not denote a requirement that the component be absolutely horizontal or overhang, but rather may be slightly inclined. As "horizontal" merely means that its direction is more horizontal than "vertical", and does not mean that the structure must be perfectly horizontal, but may be slightly inclined.
In the description of the present invention, it should also be noted that, unless explicitly specified and limited otherwise, the terms "disposed," "mounted," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the above terms in the present invention will be understood in specific cases by those of ordinary skill in the art.
Some embodiments of the present invention are described in detail below with reference to the accompanying drawings. The following embodiments and features of the embodiments may be combined with each other without conflict.
Example 1
The embodiment of the invention provides a power amplifying circuit, which comprises: a power amplifier and a peripheral circuit connected to the power amplifier; the power amplifier includes: a transistor, an L-shaped parasitic compensation circuit; the L-shaped parasitic compensation circuit comprises: two microstrip lines; the peripheral circuit includes: a bandwidth expansion circuit; the bandwidth expansion circuit includes: a plurality of microstrip lines and a plurality of capacitors; the bandwidth expansion circuit is connected with the drain electrode of the transistor; the drain electrode of the transistor is connected with the parasitic compensation circuit; the bandwidth expansion circuit is used for adjusting the resistance and reactance of the power amplification circuit based on the microstrip line and the capacitor; the L-shaped parasitic compensation circuit is used for adjusting the resistance and reactance of the power amplification circuit based on the microstrip line so as to offset parasitic parameters in the transistor; wherein the parasitic parameters include: parasitic capacitance, parasitic inductance and parasitic resistance between the drain and source of the transistor, and equivalent parameters resulting from parasitic capacitance of the transistor package.
Specifically, referring to a circuit diagram of a power amplifying circuit provided by an embodiment of the present invention shown in fig. 1, R is an equivalent load. The defects of the transistor and the package have influence on the circuit, and the parasitic parameters are equivalent to a parasitic inductance L1, a parasitic capacitance C1 and an external parasitic capacitance C2 introduced by the package in fig. 1, so that the deterioration of the parasitic parameters of the transistor on the power amplifier index cannot be ignored in the microwave frequency band.
Accordingly, there is a need to provide a compensation structure to eliminate the influence of parasitic parameters, and fig. 1 shows an arrangement of an L-shaped parasitic compensation circuit comprising two microstrip lines TL1 and TL2, which is a transmission line structure widely used in high frequency communication and radio frequency circuits, formed by a narrow and flat metal strip (usually copper) placed on an insulating medium (e.g. polytetrafluoroethylene) to form a parallel plate capacitor-like structure. Microstrip lines are commonly used on Printed Circuit Boards (PCBs) for transmitting radio frequency signals and microwave signals. It has a small size and weight and is relatively easy to manufacture and install, and thus is widely used in many wireless communication systems, radar systems, and microwave integrated circuits; TL1 and TL2 can be equivalently capacitance and inductance, and by adjusting parameters in the circuit, the influence of parasitic parameters of the transistor on the circuit is eliminated.
Furthermore, because in the frequency band range of 1.1-2.5GHz, the second harmonic impedance and the fundamental wave impedance have overlapping parts (2.2-2.5 GHz), so that it becomes very difficult to realize the harmonic condition of the class F power amplifier in the target frequency band, that is, it is difficult to ensure high efficiency while the overlapping parts of the frequency bands present low impedance, therefore, the embodiment of the invention adds a bandwidth expansion circuit at the output end to improve efficiency on the basis of the original circuit, and with continued reference to fig. 1, fig. 1 shows a setting mode of the bandwidth expansion circuit, and the bandwidth expansion circuit comprises microstrip lines TL3, TL4, TL5 and TL6 and capacitors C3, C4 and C5; generally, the TL4 microstrip line width to length ratio is 1.7mm:9.2mm; TL5 microstrip line width to length ratio is 1.5mm:2.5mm; TL6 microstrip line width to length ratio is 1.5mm:2.1mm, the bandwidth extension circuit can be set to reduce the quality factor Q of the circuit by changing the resistance and reactance of the circuit, and the relation between the output bandwidth BW, the frequency lambda and the quality factor Q is as follows:
（1）
wherein lambda is 0 For fundamental frequencies, the output bandwidth BW of the circuit is proportional to frequency and inversely proportional to the quality factor, so decreasing the quality factor Q increases the output bandwidth of the circuit.
The invention provides a power amplifying circuit, which comprises: a power amplifier and a peripheral circuit connected to the power amplifier; the power amplifier includes: a transistor, an L-shaped parasitic compensation circuit; the L-shaped parasitic compensation circuit comprises: two microstrip lines; the peripheral circuit includes: a bandwidth expansion circuit; the bandwidth expansion circuit includes: a plurality of microstrip lines and a plurality of capacitors; the bandwidth expansion circuit is connected with the drain electrode of the transistor; the drain electrode of the transistor is connected with the parasitic compensation circuit; the bandwidth expansion circuit is used for adjusting the resistance and reactance of the power amplification circuit based on the microstrip line and the capacitor; the L-shaped parasitic compensation circuit is used for adjusting the resistance and reactance of the power amplification circuit based on the microstrip line so as to offset parasitic parameters in the transistor; wherein the parasitic parameters include: parasitic capacitance, parasitic inductance and parasitic resistance between the drain and source of the transistor, and equivalent parameters generated by the parasitic capacitance of the transistor package; the parasitic compensation circuit is arranged to adjust parameters in the circuit so as to reduce the influence of transistor parasitic parameters, and the bandwidth expansion circuit is arranged to adjust the resistance and reactance of the circuit, so that the bandwidth of the power amplification circuit is widened.
Example two
On the basis of the above embodiment, the embodiment of the present invention provides another power amplifying circuit, referring to the circuit diagram of another power amplifying circuit provided by the embodiment of the present invention shown in fig. 2, the peripheral circuit further includes: an input matching circuit; the signal source, the input matching circuit and the grid electrode of the transistor are sequentially connected; an input matching circuit for matching an output impedance of the signal source with an input impedance of the transistor; the peripheral circuit further includes: an output matching circuit; the parasitic compensation circuit is connected with the output matching circuit and the load in sequence; and the output matching circuit is used for matching the output impedance of the transistor with the load.
Specifically, referring to fig. 2, the input matching circuit includes a plurality of microstrip lines connected in series in sequence; the input matching circuit is arranged in a step-type matching mode, and the capacitor C7, the microstrip line TL11, the microstrip line TL12 and the microstrip line TL13 form the input matching circuit; the output matching circuit comprises a plurality of microstrip lines which are sequentially connected in series; the output matching circuit is arranged in a step-type matching mode, and the capacitor C8, the microstrip line TL14 and the microstrip line TL15 form the output matching circuit; in the design of a radio frequency power amplifier, if an input and output matching circuit has a large error in the design, part of radio frequency signals are reflected by the transmission of microstrip lines, so that loss of output power and sudden drop of efficiency are caused, and more serious self-oscillation of the circuit is even caused, so that a measuring instrument is damaged, and economic loss is caused.
Common matching modes are distributed, multi-branch matching, step matching and the like. However, compared with step-type matching, the disadvantage of multi-branch matching is that the layout area is increased and the bandwidth is smaller. The step matching is a matching scheme for connecting multi-terminal microstrip lines in series and optimizing paths so as to reduce the Q value of a circuit as much as possible, thereby achieving the purpose of broadband matching. Taking output matching of the embodiment of the present invention as an example, the embodiment of the present invention shown in fig. 3 provides two kinds of matching circuit structure schematic diagrams; the terminal 1 port (best load impedance end) is matched to the terminal 2 port (load end), and the impedance of the 1 port is the conjugate of the best load impedance, i.e., (10.603-j 14.062) Ω. Referring to a multi-branch matching smith chart provided by the embodiment of the invention shown in fig. 4, microstrip line TL34 and microstrip line TL35 form a multi-branch matching circuit, and arcs connected with two ends of a diameter in the smith chart are equal quality factor arcs, and a Q value is 1.8; by using a step-type matching method, referring to a step-type matching smith chart provided by the embodiment of the invention shown in fig. 5, a step-type matching circuit is formed by the microstrip line TL31, the microstrip line TL32 and the microstrip line TL33, and the Q value is 1.3, so that the Q value is reduced, the bandwidth is expanded, the area of a circuit board is effectively reduced, and the design requirement is met.
Further, the peripheral circuit further includes: an RC parallel circuit; the RC parallel circuit includes: a resistor and a capacitor connected in parallel; the signal source, the RC parallel circuit and the grid electrode of the transistor are sequentially connected; a resistor in the RC parallel circuit is used for limiting the current of the signal output by the signal source; and the capacitor in the RC parallel circuit is used for shorting out the high-frequency harmonic signals in the signal source output signals.
Specifically, with continued reference to fig. 2, the capacitor C6 and the resistor R1 form an RC parallel circuit, and when the frequency is high, the capacitance reactance of the capacitor is very small, which has a short circuit effect on the resistor, so that the gain flatness in the whole frequency band is improved, and the fan-shaped microstrip line structure is additionally arranged to expand the bandwidth, unlike the gate bias circuit.
An RC parallel structure is connected in series with the input end of the grid electrode, the method for increasing the stability of the circuit is realized by introducing a lossy network, and a resistor is connected in series to share a part of power, so that the introduction of the resistor can reduce the gain of the power amplifier, and the RC parallel structure is generally adopted to increase the stability of the circuit. When the frequency is higher, the capacitance reactance of the capacitor is very small, and the capacitor has a short circuit effect on the resistor, so that the gain flatness in the whole frequency band is improved.
Further, the power amplifying circuit further includes: a gate bias circuit and a drain bias circuit; the gate bias circuit includes: a plurality of capacitors connected in parallel; the grid power supply, the grid bias circuit and the grid of the transistor are sequentially connected; the drain bias circuit includes: a plurality of capacitors connected in parallel; the drain power supply, the drain bias circuit and the drain of the transistor are sequentially connected; a gate bias circuit for consuming a fundamental frequency signal of transistor gate leakage based on the microstrip line; the grid bias circuit is also used for grounding the high-frequency harmonic signals leaked by the grid of the transistor; the drain bias circuit is used for consuming the baseband signal leaked by the load based on the microstrip line; the drain bias circuit is also used for grounding the high-frequency harmonic signals leaked by the load.
Specifically, with continued reference to fig. 2, the design of the dc bias circuit provides static bias for the power transistor on one hand, and on the other hand, plays a role in isolating the rf main signal from the bias dc signal, and the most basic microstrip line replaces the high-frequency choke coil, so that the bias generally adopts the high-frequency choke coil to achieve the isolation purpose in a relatively low frequency band, such as TL17H and TL18 shown in fig. 2, but in the rf frequency band, loss and operability of circuit assembly should be considered, and the microstrip line is generally used to replace the high-frequency choke coil; the grid bias circuit totally selects four bypass capacitors with different magnitudes to short the radio frequency signals leaked to bias to the ground, so that the radio frequency signals are prevented from leaking to the bias circuit, and the power supply is further damaged; the drain bias circuit further includes: a sector microstrip line; the sector microstrip line is used for adjusting the resistance and reactance of the power amplifying circuit, the drain bias circuit structure is different from the grid bias circuit in that the sector microstrip line structure is additionally arranged to expand the bandwidth, the magnitude of the current passing through the drain bias is ampere A, so the width of the drain bias microstrip line is thicker, and the circular arc structure is used. Multisection matching is often used to extend bandwidth. According to the theory of a passive filter, a plurality of serially connected microstrip lines can provide a resonance point at a certain frequency point, and if a branch is added at one end, parameters of the microstrip lines in the branch are adjusted, so that the resonance point of the branch is close to the resonance point of a main path, and the purpose of expanding bandwidth can be achieved.
Further, the power amplifying circuit further includes: a harmonic control circuit; the power amplifier is connected with the harmonic control circuit; and the harmonic control circuit is used for adjusting the load impedance of the power amplifier.
Specifically, referring to fig. 2, microstrip line TL7, microstrip line TL8 and microstrip line TL9 form a harmonic control circuit, and the drain output end of the class F power amplifier covers three parts of a parasitic compensation circuit, a harmonic control network and an output matching circuit; the harmonic control network applies the concept of harmonic notch. As can be seen from fig. 2, the harmonic control network part comprises three transmission lines TL7, TL8 and TL9, respectively. Their lengths are λ/4, λ/8 and λ/12, respectively, where λ is the fundamental wavelength. The two parallel open stubs TL8 and TL9 have an electrical length of 90 ° at the second and third harmonic frequencies, respectively. TL8 and TL9 thus provide both second and third harmonic shorting points at point B. The series transmission line TL7 has an electrical length of 180 ° and 270 ° at the second and third harmonic frequencies, respectively, and is wound around one and one half turns in the smith chart. Therefore, the second harmonic is still in a short circuit state, and the third harmonic impedance track is more than half a circle, so that the conversion from a short circuit point to an open circuit point is realized. In summary, TL7 converts the second and third harmonic short-circuit conditions (2S, 3S) at point B into the second and third harmonic short-circuit conditions (2S, 3O) at point a.
Further, considering the influence of the parasitic parameters of the actual transistors, the embodiment of the invention still adopts the L-shaped parasitic compensation circuit to reduce the deterioration of the parasitic parameters on the measurement result of the large signal. In effect, point a topologically separates the L-type spurious compensation circuit and the harmonic control network. Namely TL1 is not TL2 is only existed in the equivalent circuit of the second harmonic, and TL1 and TL2 are simultaneously included in the equivalent circuit of the third harmonic, see a harmonic provided by the embodiment of the invention shown in figure 6Schematic diagram of wave equivalent circuit, wherein L D Equivalent to L in FIG. 2 1 ，C DS Equivalent to C in FIG. 2 1 ，C P Equivalent to C in FIG. 2 2 (a) and (b) respectively give the second and third harmonic equivalent circuits of the L-type parasitic compensation circuit.
For the second harmonic, only the parameter θ of TL1 needs to be changed 1 Any pure reactance value can be obtained at the inherent drain end face of the power amplifier tube. For the third harmonic, the parameter θ for TL1 is maintained 1 Changing the parameter θ of TL2 under unchanged condition 2 Any pure reactance value can be obtained at the inherent drain end face of the power amplifier tube. Thus correctly adjusting the electrical lengths θ of TL1 and TL2 1 And theta 2 The second harmonic impedance can be at an open point in the smith chart, and the third harmonic impedance is at a short point in the smith chart, so that the impedance condition of the class F power amplifier is satisfied. According to the structure shown in fig. 2, the second harmonic and third harmonic input impedances, as seen from the intrinsic drain end face of the transistor, can be expressed as:
(2)
(3)
wherein,(4)
(5)
omega is fundamental wave angular frequency, theta 1 And theta 2 TL1 and TL2, respectively. The impedance requirement of the F-type power amplifier is as follows:
(6)
therefore, the numerator of formula (2) is required to be zero, and the denominator of formula (3) is required to be zero:
(7)
solving the above equation set can be achieved:
(8)
wherein m and n are any integer. In practical design, the size problem of the layout is considered, so that the numerical values of the parameters m and n are properly determined, and the reduction of theta 1 and theta 2 is greatly beneficial to the reduction of the size of the layout.
The embodiment of the invention provides a power amplifying circuit, which utilizes an L-shaped parasitic compensation harmonic control network to solve the influence of parasitic capacitance of a transistor, utilizes step-type matching to reduce quality factor Q, increases bandwidth, and utilizes an arc-shaped bandwidth expansion structure to increase bandwidth; the fan-shaped microstrip line is utilized to increase the bandwidth, and the RC parallel structure is utilized to solve the stability and gain flatness of the transistor; the embodiment of the invention relates to the technical field of application of radio frequency circuits, which is particularly applied to the field of microwave ablation, and the design scheme of the radio frequency circuit is particularly applied to the field of microwave ablation, and particularly relates to a power amplification circuit and an electronic system.
Example III
On the basis of the above embodiments, the embodiment of the present invention provides an electronic system 30, referring to a schematic structural diagram of the electronic system provided in the embodiment of the present invention shown in fig. 7, the electronic system includes: an electronic device 32 and a power amplifying circuit 31 of any one of the above; the electronic equipment 32 is connected with the output end of the power amplification circuit 31, so as to realize the accurate ablation effect for the electronic equipment; the electronic device 32 operates based on the signal output from the power amplification circuit 31.
Specifically, the electronic system 30 may be a microwave ablation instrument, the electronic device may be a microwave antenna, and the power amplifying circuit 31 outputs a microwave signal to the microwave antenna; microwave ablation is a common treatment method used in the medical field for treating tumors and other abnormal tissues. It uses high frequency microwave energy to heat and destroy abnormal tissue. During microwave ablation, the physician inserts one or more microwave antennas into the body, which release microwave energy and deliver it to the target tissue. Microwave energy causes molecular vibrations and friction in the tissue to generate heat, which increases the temperature of the tissue and ultimately causes necrosis of the tissue.
It will be clear to those skilled in the art that, for convenience and brevity of description, the specific operation of the electronic system described above may refer to the corresponding process in the foregoing embodiment of the power amplifying circuit, which is not described herein again.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and not for limiting the same; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the invention.
Claims (8)
1. A power amplification circuit, characterized in that is applied to microwave ablation field, the power amplification circuit includes: a power amplifier and a peripheral circuit connected to the power amplifier; the power amplifier includes: a transistor, an L-shaped parasitic compensation circuit; the L-shaped parasitic compensation circuit comprises: two microstrip lines; the peripheral circuit includes: a bandwidth expansion circuit; the bandwidth extension circuit includes: a plurality of microstrip lines and a plurality of capacitors; the bandwidth expansion circuit is connected with the drain electrode of the transistor; the drain electrode of the transistor is connected with the parasitic compensation circuit;
the bandwidth expansion circuit is used for adjusting the resistance and reactance of the power amplification circuit based on the microstrip line and the capacitor;
the L-shaped parasitic compensation circuit is used for adjusting the resistance and reactance of the power amplification circuit based on the microstrip line so as to offset parasitic parameters in the transistor; wherein the parasitic parameters include: parasitic capacitance, parasitic inductance and parasitic resistance between the drain electrode and the source electrode of the transistor and equivalent parameters generated by the parasitic capacitance of the transistor package;
the bandwidth expansion circuit comprises four microstrip lines and three capacitors;
the bandwidth expansion circuit comprises a first microstrip line, a second microstrip line, a third microstrip line, a fourth microstrip line, a first capacitor, a second capacitor and a third capacitor;
the first end of the first microstrip line is connected with the drain electrode of the transistor; the second end of the first microstrip line is connected with the first end of the second microstrip line; the second end of the second microstrip line is connected with the first end of the third microstrip line; the second end of the third microstrip line is connected with the first end of the fourth microstrip line; the first end of the first capacitor is connected with the second end of the second microstrip line; the second end of the first capacitor is grounded; the first end of the second capacitor is connected with the second end of the third microstrip line; the second end of the second capacitor is grounded; the first end of the third capacitor is connected with the second end of the fourth microstrip line; the second end of the third capacitor is grounded;
the peripheral circuit further includes: an output matching circuit; the parasitic compensation circuit is connected with the output matching circuit and the load in sequence;
the output matching circuit is used for matching the output impedance of the transistor with the load;
the output matching circuit comprises a plurality of microstrip lines which are sequentially connected in series;
the output matching circuit is arranged in a step-type matching mode.
2. The power amplification circuit of claim 1, wherein the peripheral circuit further comprises: an input matching circuit; the signal source, the input matching circuit and the grid electrode of the transistor are sequentially connected;
the input matching circuit is used for matching the output impedance of the signal source with the input impedance of the transistor.
3. The power amplification circuit of claim 2, wherein the input matching circuit comprises a plurality of microstrip lines connected in series in sequence;
the input matching circuit is arranged in a step-type matching mode.
4. The power amplification circuit of claim 1, wherein the peripheral circuit further comprises: an RC parallel circuit; the RC parallel circuit includes: a resistor and a capacitor connected in parallel; the signal source, the RC parallel circuit and the grid electrode of the transistor are sequentially connected;
a resistor in the RC parallel circuit is used for limiting the current of the signal output by the signal source;
and the capacitor in the RC parallel circuit is used for short-circuiting the high-frequency harmonic signals in the signal source output signals.
5. The power amplification circuit of claim 1, further comprising: a gate bias circuit and a drain bias circuit; the gate bias circuit includes: a plurality of capacitors connected in parallel; the grid power supply, the grid bias circuit and the grid of the transistor are sequentially connected; the drain bias circuit includes: a plurality of capacitors connected in parallel; the drain power supply, the drain bias circuit and the drain of the transistor are sequentially connected;
the grid bias circuit is used for consuming a fundamental frequency signal leaked by the grid of the transistor based on a microstrip line;
the grid bias circuit is also used for grounding high-frequency harmonic signals leaked from the grid of the transistor;
the drain bias circuit is used for consuming the baseband signal leaked by the load based on the microstrip line;
the drain bias circuit is also used for grounding the high-frequency harmonic signals leaked by the load.
6. The power amplification circuit of claim 5, wherein the drain bias circuit further comprises: a sector microstrip line;
the sector microstrip line is used for adjusting the resistance and reactance of the power amplifying circuit.
7. The power amplification circuit of claim 1, further comprising: a harmonic control circuit; the power amplifier is connected with the harmonic control circuit;
the harmonic control circuit is used for adjusting the load impedance of the power amplifier.
8. An electronic system, the electronic system comprising: an electronic device and the power amplifying circuit of any of claims 1-7; the electronic equipment is connected with the output end of the power amplifying circuit;
the electronic device operates based on the signal output by the power amplification circuit.
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