CN113745124A - Test structure and test method - Google Patents

Test structure and test method Download PDF

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Publication number
CN113745124A
CN113745124A CN202010470615.6A CN202010470615A CN113745124A CN 113745124 A CN113745124 A CN 113745124A CN 202010470615 A CN202010470615 A CN 202010470615A CN 113745124 A CN113745124 A CN 113745124A
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China
Prior art keywords
tested
conductive layer
test
measurement value
partition
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CN202010470615.6A
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Chinese (zh)
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王伟
王成博
苏波
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Semiconductor Manufacturing International Shanghai Corp
Semiconductor Manufacturing International Beijing Corp
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Semiconductor Manufacturing International Shanghai Corp
Semiconductor Manufacturing International Beijing Corp
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Priority to CN202010470615.6A priority Critical patent/CN113745124A/en
Publication of CN113745124A publication Critical patent/CN113745124A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/14—Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
    • H01L22/32—Additional lead-in metallisation on a device or substrate, e.g. additional pads or pad portions, lines in the scribe line, sacrificed conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
    • H01L22/34—Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Automation & Control Theory (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

A test structure and a test method are provided, wherein the test structure comprises: a substrate; the first conducting layer to be tested is positioned on the substrate, and a plurality of first partitions are arranged in the first conducting layer to be tested; the second conducting layers to be tested are arranged on the substrate in parallel, a plurality of second partitions are arranged in each second conducting layer to be tested, and at least one second conducting layer to be tested is electrically connected with the first conducting layer to be tested; the first conducting layers are arranged on the substrate in parallel, and each first conducting layer is electrically connected with the second conducting layer to be tested; the first testing end is electrically connected with the first conducting layer to be tested; a second test terminal electrically connected to one of the first conductive layers. The test structure is used for testing to meet the requirement of testing the electric connection and the electric partition in different conductive layers to be tested and meet the requirement of acceptable testing of wafers.

Description

Test structure and test method
Technical Field
The invention relates to the technical field of semiconductor manufacturing, in particular to a test structure and a test method.
Background
The precise control and evaluation of the production and manufacturing of the wafer runs through the entire process manufacturing process of the wafer production, thereby verifying whether the wafer product meets the product specification. To achieve this, in addition to accurately monitoring the critical dimension or the thickness of the deposited film in each manufacturing step during the manufacturing process, Wafer Acceptance Test (WAT) is performed before the Wafer is shipped to ensure that the electrical parameters of the critical devices meet the electrical design rules.
WAT is a Wafer Level (Wafer Level) die or structure Test, and monitors whether each process is normal and stable through electrical parameters for electrical tests performed on a special Test structure (Test Key) on a silicon Wafer. By WAT data analysis, problems in the semiconductor manufacturing process can be monitored, and the adjustment of the manufacturing process is facilitated. Generally, the test parameters of wafer acceptability tests fall into two categories. One type is device dependent, including turn-on voltage (Vt), saturation current (I)dsat) Closing the current (I)off) Substrate current (I)sub) Breakdown voltage (Bvd), etc. The other being process-dependent, involving the contact resistance (R) of the sheet resistanceC) And surface resistance (R)S) Electrical thickness (T) of gate oxide layerox) Capacitor (C)ox) Isolation, etc.
The existing online defect detection can realize the test of electric connection or electric isolation, but has the defects of long scanning time consumption, incapability of positioning and qualitative detection, low layer-by-layer scanning flux, requirement of additional manual judgment and the like.
Therefore, the performance and testing methods of existing test structures need to be further improved.
Disclosure of Invention
The invention provides a test structure and a test method, which are used for testing electric connection and electric isolation in different conductive layers to be tested so as to meet the requirements of Wafer Acceptance Test (WAT).
In order to solve the above technical problem, a technical solution of the present invention provides a test structure, including: a substrate; the first conducting layer to be tested is positioned on the substrate, and a plurality of first partitions are arranged in the first conducting layer to be tested; the second conducting layers to be tested are arranged on the substrate in parallel, a plurality of second partitions are arranged in each second conducting layer to be tested, and at least one second conducting layer to be tested is electrically connected with the first conducting layer to be tested; the first conducting layers are arranged on the substrate in parallel, and each first conducting layer is electrically connected with the second conducting layer to be tested; the first testing end is electrically connected with the first conducting layer to be tested; a second test terminal electrically connected to one of the first conductive layers.
Optionally, each of the first conductive layers is parallel to the first conductive layer to be tested.
Optionally, the number of the first partitions is more than one.
Optionally, the first conductive layer to be tested is on the upper layer of the second conductive layer to be tested, or the first conductive layer to be tested is on the lower layer of the second conductive layer to be tested; the first conducting layer to be tested is electrically connected with the second conducting layer to be tested through the first plug.
Optionally, the second conductive layer to be tested is on the upper layer of the first conductive layer, or the second conductive layer to be tested is on the lower layer of the first conductive layer; and each second conductive layer to be tested is electrically connected with each first conductive layer through a second plug.
Optionally, the number of the second partitions is more than one.
Optionally, when the number of the second partitions is multiple, two second plugs are spaced between adjacent second partitions in each second conductive layer to be tested.
Optionally, the second partitions in the adjacent second conductive layers to be tested do not coincide with each other along a central line perpendicular to the extending direction of the second conductive layers to be tested.
Optionally, the method further includes: and the second conducting layer is electrically connected with the first conducting layer farthest from the first conducting layer to be tested, and the second testing end is electrically connected with the second conducting layer.
Optionally, the second conductive layer is parallel to the second conductive layer to be tested.
Optionally, the second test terminal is electrically connected to one of the second conductive layers to be tested.
Correspondingly, the invention also provides a test method, which comprises the following steps: providing a test structure, the test structure comprising: a substrate; the first conducting layer to be tested is positioned on the substrate, and a plurality of first partitions are arranged in the first conducting layer to be tested; the second conducting layers to be tested are arranged on the substrate in parallel, a plurality of second partitions are arranged in each second conducting layer to be tested, and at least one second conducting layer to be tested is electrically connected with the first conducting layer to be tested; the first conducting layers are arranged on the substrate in parallel, and each first conducting layer is electrically connected with the second conducting layer to be tested; the first testing end is electrically connected with the first conducting layer to be tested; a second test terminal electrically connected to one of the first conductive layers; a first measurement between the first test terminal and the second test terminal is obtained.
Optionally, the method further includes: and obtaining information of the first partition and the second partition according to the first measurement value.
Optionally, the method for obtaining information of the first partition and the second partition according to the first measurement value includes: providing a preset first measurement value and a preset second measurement value; and comparing the first measurement value with a preset first measurement value or a preset second measurement value to acquire information of the first partition and the second partition.
Optionally, the preset second measurement value is greater than the preset first measurement value.
Optionally, when the first measurement value is within the preset first measurement value range, the first isolation has a defect, and the second partition has a defect.
Optionally, when the first measured value is within the range of the preset second measured value, the first partition has a defect, and the second partition is normal.
Optionally, when the first measured value is infinite, the first partition is normal.
Optionally, the first measurement value includes: a resistance between the first test terminal and the second test terminal.
Optionally, the first conductive layer to be tested and the second conductive layer to be tested are electrically connected through a first plug; the number of the second partitions is multiple, each second conductive layer to be tested is electrically connected with each first conductive layer through a second plug, two second plugs are arranged between adjacent second partitions in each second conductive layer to be tested at intervals, and the second partitions in the adjacent second conductive layers to be tested do not coincide along a central line perpendicular to the extending direction of the second conductive layer to be tested.
Optionally, the test structure further includes: a third test end electrically connected with one of the second conductive layers to be tested; the test method further comprises the following steps: and acquiring a second measurement value between the second test end and the third test end.
Optionally, the method further includes: and obtaining information of a second partition according to the second measurement value.
Optionally, the method further includes: the method for obtaining the information of the second partition according to the second measurement value comprises the following steps: providing a preset third measurement value; and comparing the second measurement value with the preset third measurement value to obtain the information of the second partition.
Optionally, when the second measurement value is within the range of the preset third measurement value, the second partition has a defect.
Optionally, when the second measurement value is infinite, the second partition is normal.
Optionally, the second measurement value includes: a resistance between the second test terminal and the third test terminal.
Compared with the prior art, the technical scheme of the invention has the following beneficial effects:
in the test structure provided by the technical scheme of the invention, the first conducting layer to be tested is electrically connected with the first conducting layer, and the first conducting layer is electrically connected with the second conducting layer to be tested, so that a conducting path can be formed between the first conducting layer to be tested, the second conducting layer to be tested and the first conducting layer. By obtaining the resistance between the first test end and the second test end, the size of the resistance value is positively correlated with the distance between the first conductive layer to be tested, the second conductive layer to be tested and the conductive path between the second conductive layers, so that the first partition in the first conductive layer to be tested is judged to be normal or have a defect, and the second partition in the second conductive layer to be tested is judged to be normal or have a defect.
Further, when the number of the second partitions is multiple, two second plugs are arranged between adjacent second partitions in each second conductive layer to be tested at intervals, and meanwhile, the second partitions in the adjacent second conductive layers to be tested do not coincide along a center line perpendicular to the extending direction of the second conductive layer to be tested, so that when the second partitions in the second conductive layers to be tested are normal, a long-distance S-shaped conductive passage can be formed between the first conductive layer and the second conductive layer to be tested, and when the second partitions in the second conductive layers to be tested have defects, a short-distance conductive passage is formed, and therefore the first partitions in the first conductive layers to be tested and the second partitions in the second conductive layers to be tested are normal or have defects.
In the testing method provided by the technical scheme of the invention, as the first conducting layer to be tested is electrically connected with the first conducting layer and the first conducting layer is electrically connected with the second conducting layer to be tested, a conducting path can be formed between the first conducting layer to be tested, the second conducting layer to be tested and the first conducting layer, and a first measured value between the first testing end and the second testing end can be obtained, wherein the first measured value comprises: and the resistance is adopted, so that the electric connection condition of the first conducting layer to be tested and the second conducting layer to be tested is obtained. The resistance value is in positive correlation with the distance of the conductive path, so that the first partition in the first conductive layer to be detected is judged to be normal or have a defect, and the second partition in the second conductive layer to be detected is judged to be normal or have a defect.
Further, when the value of the first measurement value is not infinite, it is known that no open circuit is formed among the first conductive layer to be measured, the first conductive layer, and the second conductive layer to be measured, so that it is determined that the first partition in the first conductive layer to be measured has a defect. Moreover, two second plugs are arranged between adjacent second partitions in each second conductive layer to be tested at intervals, and meanwhile, the second partitions in the adjacent second conductive layers to be tested do not coincide along a central line perpendicular to the extending direction of the second conductive layer to be tested, so that when the second partitions in the second conductive layers to be tested are normal, an S-shaped conductive path with a longer distance can be formed between the first conductive layer and the second conductive layer to be tested; when the second partition in the second conductive layer to be detected has a defect, a conductive path with a shorter distance is formed, and the resistance of the conductive path with the longer distance and the S shape is greater than that of the conductive path with the shorter distance, so that the second partition in the second conductive layer to be detected is judged to be normal or have a defect according to the comparison between the first measurement value and a preset first measurement value or a preset second measurement value.
Further, when the first measured value is infinite, one second conducting layer to be tested is electrically connected with a third testing end; and testing the resistance between the second test end and the second test end to obtain a second measured value. Two second plugs are arranged between adjacent second partitions in each second conductive layer to be tested at intervals, meanwhile, the second partitions in the adjacent second conductive layers to be tested do not coincide along a center line perpendicular to the extending direction of the second conductive layer to be tested, when the second partitions in the second conductive layers to be tested are normal, a broken circuit is formed between the second testing end and the third testing end, and the resistance of a second measured value is infinite; when the second partition in the second conductive layer to be tested is defective, a linear passage is formed between the second testing end and the third testing end, the resistance of the second measuring value is small, and therefore the second partition in the second conductive layer to be tested is judged to be normal or defective according to comparison between the second measuring value and the preset third measuring value.
Drawings
FIGS. 1-4 are schematic structural diagrams of a test structure according to an embodiment of the invention;
FIG. 5 is a schematic diagram of a test structure according to another embodiment of the present invention;
FIG. 6 is a schematic diagram of a test structure in another embodiment of the present invention;
FIG. 7 is a flowchart illustrating a testing method according to an embodiment of the invention.
Detailed Description
As described in the background, existing test structures fail to meet specific test requirements.
To solve the technical problem, an embodiment of the present invention provides a test structure, including: the first conducting layer to be tested is positioned on the substrate, and a plurality of first partitions are arranged in the first conducting layer to be tested; the second conducting layers to be tested are arranged on the substrate in parallel, a plurality of second partitions are arranged in each second conducting layer to be tested, and at least one second conducting layer to be tested is electrically connected with the first conducting layer to be tested; and the first conducting layers are arranged on the substrate in parallel, and each first conducting layer is electrically connected with the second conducting layer to be tested. The test structure is adopted for testing, so that the electric connection and the electric partition in different conductive layers to be tested can be tested, and the Wafer Acceptance Test (WAT) requirements can be met.
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.
Fig. 1 to 4 are schematic structural diagrams of a test structure in an embodiment of the invention.
Referring to fig. 1 to 4, fig. 2 is a cross-sectional view taken along line a-a of fig. 1, fig. 3 is a cross-sectional view taken along line B-B of fig. 1, fig. 4 is a cross-sectional view taken along line C-C of fig. 1, and a test structure includes: a substrate 200; a first conductive layer 210 to be tested positioned on the substrate 200, wherein a plurality of first partitions 211 are arranged in the first conductive layer 210 to be tested; a plurality of second conductive layers 220 to be tested, which are arranged in parallel on the substrate 200, wherein each second conductive layer 220 to be tested has a plurality of second partitions 221 therein, and at least one second conductive layer 220 to be tested is electrically connected with the first conductive layer 210 to be tested; a plurality of first conductive layers 230 arranged in parallel on the substrate 200, each of the first conductive layers 230 being electrically connected to a second conductive layer 220 to be tested; a first testing terminal 241 electrically connected to the first conductive layer 210 to be tested; a second test end 242 electrically connected to one of the first conductive layers 230.
In this embodiment, the first conductive layer to be tested 210 and the second conductive layer to be tested 220 are adjacent conductive layers.
In other embodiments, the first conductive layer to be tested and the second conductive layer to be tested may also be non-adjacent conductive layers.
FIG. 5 is a schematic structural diagram of a test structure in another embodiment of the present invention.
Specifically, fig. 5 is a schematic sectional view taken along line C-C in fig. 1.
Referring to fig. 5, the first conductive layer 210 to be tested and the second conductive layer 220 to be tested are not adjacent conductive layers, and a conductive layer 270 is disposed between the first conductive layer 210 to be tested and the second conductive layer 220 to be tested. In other embodiments, two or more conductive layers are arranged between the first conductive layer to be tested and the second conductive layer to be tested.
The substrate 200 not only has the test structure thereon, but also has a device (not shown) with a chip function (not shown) on the substrate 200. The test structures are typically designed on the substrate 200 in Scribe lanes (Scribe Lane) between chips (chips).
In the test structure, the first conductive layer 210 to be tested is electrically connected with the first conductive layer 230, and the first conductive layer 230 is electrically connected with the second conductive layer 220 to be tested, so that a conductive path can be formed between the first conductive layer 210 to be tested, the second conductive layer 220 to be tested, and the first conductive layer 230. By obtaining the resistance between the first test end 241 and the second test end 242, the magnitude of the resistance value is in positive correlation with the distances between the first conductive layer 210 to be tested and the second conductive layer 220 to be tested, and the conductive path between the second conductive layer 230, so as to determine whether the first partition 211 in the first conductive layer 210 to be tested is normal or has a defect, and the second partition 221 in the second conductive layer 220 to be tested is normal or has a defect.
It should be noted that, according to the requirements of the process, it is necessary to electrically isolate a certain or certain positions in the same conductive layer.
The first partition 211 refers to: the first conducting layer 210 to be tested is positioned in the first conducting layer 210 to be tested, the first conducting layer 210 to be tested penetrates through along the extending direction perpendicular to the extending direction of the first conducting layer 210 to be tested, and the first conducting layer 210 to be tested is filled with an insulating material to form a structure, so that the first conducting layer 210 to be tested can be electrically isolated through the normal first isolating wall 211, and the first conducting layer 210 to be tested can not be electrically isolated through the first isolating wall 211 with defects.
The second partition 221 refers to: and the second conductive layer 220 to be tested penetrates through the second conductive layer 220 to be tested along the direction perpendicular to the extending direction of the second conductive layer 220 to be tested, and is filled with an insulating material to form a structure, so that the second conductive layer 220 to be tested can be electrically isolated by the normal second isolation 221, and the second conductive layer 220 to be tested can not be electrically isolated by the first isolation 221 with defects.
In this embodiment, the first conductive layer 210 to be tested extends along a first direction X, the second conductive layer 220 to be tested extends along a second direction Y, the first direction X and the second direction Y are perpendicular, and the first direction X and the second direction Y are parallel to the surface of the substrate 200.
In other embodiments, the extending directions of the first conductive layer to be tested and the second conductive layer to be tested are the same.
Each of the first conductive layers 230 is parallel to the first conductive layer 210 to be tested. In this embodiment, each of the first conductive layers 230 extends along the first direction X.
In this embodiment, each of the first conductive layers 230 and the first conductive layer 210 to be tested are in the same layer.
In other embodiments, each of the first conductive layers is located on an upper layer of the first conductive layer to be tested, or each of the first conductive layers is located on a lower layer of the first conductive layer to be tested.
The number of the first partitions 211 is more than one.
In this embodiment, the number of the first partitions 211 is greater than 1, and is multiple.
It should be noted that, when the number of the first partitions 211 is multiple, since the multiple first partitions 211 are formed through the same process, the information states of the multiple first partitions 211 are the same, that is, each first partition 211 is normal, or each first partition 211 has a defect.
The first conductive layer 210 to be tested is arranged on the upper layer of the second conductive layer 220 to be tested, or the first conductive layer 210 to be tested is arranged on the lower layer of the second conductive layer 220 to be tested; the first conductive layer to be tested and 210 the second conductive layer to be tested 230 are electrically connected through a first plug 251.
In this embodiment, the second conductive layer to be tested 220 is on the upper layer of the first conductive layer to be tested 210.
The second conductive layer to be tested 220 is on the first conductive layer 230, or the second conductive layer to be tested 220 is on the first conductive layer 230; each of the second conductive layers 220 to be tested is electrically connected to each of the first conductive layers 230 through a second plug 252.
In this embodiment, the second conductive layer to be tested 220 is on the upper layer of the first conductive layer 230, and the first conductive layer to be tested 210 and the first conductive layer 230 are in the same layer.
The number of the second partitions 221 is more than one.
In this embodiment, the number of the second partitions 221 is greater than 1, and is multiple.
It should be noted that, when the number of the second partitions 221 is multiple, since the second partitions 221 are formed by the same process, the information states of the second partitions 221 are the same, that is, each second partition 221 is normal, or each second partition 221 has a defect.
When the number of the second partitions 221 is multiple, two second plugs 252 are spaced between adjacent second partitions 221 in each second conductive layer 220 to be tested.
The second partitions 221 in the adjacent second conductive layers 220 to be tested do not coincide with each other along a central line perpendicular to the extending direction of the second conductive layers 220 to be tested.
The test structure further comprises: the second conductive layer 260, the second conductive layer 260 is electrically connected to the first conductive layer 230 farthest from the first conductive layer 210 to be tested, and the second testing end 242 is electrically connected to the second conductive layer 260.
In this embodiment, the second conductive layer 260 is parallel to the second conductive layer 220 to be tested. In other embodiments, the second conductive layer 260 and the second conductive layer to be tested may not be parallel.
The test structure further comprises: and a third testing terminal 243 electrically connected to one of the second conductive layers 220 to be tested.
FIG. 6 is a schematic structural diagram of a test structure in yet another embodiment of the present invention.
This embodiment is different from the above-described embodiments in that the test structure does not include: and the third testing end is electrically connected with one second conducting layer to be tested.
Referring to fig. 6, a test structure includes: a substrate 300; a first conductive layer 310 to be tested located on the substrate 300, wherein the first conductive layer 310 to be tested has a plurality of first partitions 311 therein; a plurality of second conductive layers 320 to be tested, which are arranged in parallel on the substrate 300, wherein each of the second conductive layers 320 to be tested has a plurality of second partitions 321 therein, and at least one of the second conductive layers 320 to be tested is electrically connected to the first conductive layer 310 to be tested; a plurality of first conductive layers 230 arranged in parallel on the substrate 200, each of the first conductive layers 330 being electrically connected to a second conductive layer 320 to be tested; a first testing end 341 electrically connected to the first conductive layer 310 to be tested; a second test end 342 electrically connected to one of the first conductive layers 330.
A first measurement value between the first testing end 341 and the second testing end 342 is obtained through the first testing end 341 and the second testing end 342.
When the first measurement value is not infinite, it may be determined that the first partition 311 has a defect, and information of the second partition 321 may be obtained according to the magnitude of the first measurement value.
When the first measurement value is infinite, it may be determined that the first partition 311 is normal.
FIG. 7 is a flowchart illustrating a testing method according to an embodiment of the invention.
Referring to fig. 7, the testing method includes:
step S1: providing a test structure;
step S2: obtaining a first measurement value between the first test end and the second test end;
step S3: and obtaining information of the first partition and the second partition according to the first measurement value.
The following detailed description is made with reference to the accompanying drawings.
Step 1: a test structure is provided.
The test structure includes, with continued reference to fig. 1, a substrate 200; a first conductive layer 210 to be tested positioned on the substrate 200, wherein a plurality of first partitions 211 are arranged in the first conductive layer 210 to be tested; a plurality of second conductive layers 220 to be tested, which are arranged in parallel on the substrate 200, wherein each second conductive layer 220 to be tested has a plurality of second partitions 221 therein, and at least one second conductive layer 220 to be tested is electrically connected with the first conductive layer 210 to be tested; a plurality of first conductive layers 230 arranged in parallel on the substrate 200, each of the first conductive layers 230 being electrically connected to a second conductive layer 220 to be tested; a first testing terminal 241 electrically connected to the first conductive layer 210 to be tested; a second test end 242 electrically connected to one of the first conductive layers 230.
Specifically, in this embodiment, the first conductive layer to be tested 210 and the second conductive layer to be tested 220 are electrically connected through a first plug 251; the number of the second partitions 221 is multiple, each second conductive layer 220 to be tested is electrically connected to each first conductive layer 230 through a second plug 252, two second plugs 252 are spaced between adjacent second partitions 221 in each second conductive layer 220 to be tested, and the second partitions 221 in adjacent second conductive layers 220 to be tested do not overlap along a central line perpendicular to the extending direction of the second conductive layer 220 to be tested.
Step 2, a first measurement value between the first test terminal 241 and the second test terminal 242 is obtained.
The first measurement value includes: a resistance between the first test terminal 241 and the second test terminal 242.
Since the first conductive layer 210 to be tested is electrically connected to the first conductive layer 230, and the first conductive layer 230 is electrically connected to the second conductive layer 220 to be tested, so that a conductive path can be formed between the first conductive layer 210 to be tested and the second conductive layer 220 to be tested, and the first conductive layer 230, by obtaining a first measurement value between the first test terminal 241 and the second test terminal 242, the first measurement value includes: and resistance, thereby obtaining the electrical connection condition of the first conductive layer 210 to be tested and the second conductive layer 230 to be tested.
And 3, acquiring information of the first partition 211 and the second partition 221 according to the first measurement value.
The method for obtaining the information of the first partition 211 and the second partition 221 according to the first measurement value includes: providing a preset first measurement value and a preset second measurement value; and comparing the first measurement value with a preset first measurement value or a preset second measurement value to acquire information of the first partition 211 and the second partition 221.
Since the magnitude of the resistance value is in positive correlation with the distance of the conductive path, it is determined that the first partition 211 in the first conductive layer 210 to be tested is normal or defective, and the second partition 221 in the second conductive layer 220 to be tested is normal or defective.
When the value of the first measurement value is not infinite, it is known that no open circuit is formed among the first conductive layer 210 to be tested, the first conductive layer 230, and the second conductive layer 220 to be tested, so as to determine that the first partition 211 in the first conductive layer 210 to be tested has a defect. Moreover, two second plugs 252 are spaced between adjacent second partitions 221 in each second conductive layer 220 to be tested, and meanwhile, the second partitions 221 in the adjacent second conductive layers 220 to be tested do not coincide along a center line perpendicular to the extending direction of the second conductive layer 220 to be tested, so that when the second partitions 221 in the second conductive layers 220 to be tested are normal, a long-distance "S" -shaped conductive path can be formed between the first conductive layer 230 and the second conductive layer 220 to be tested; when the second partition 221 in the second conductive layer 220 to be tested has a defect, the first conductive layer 230 and the second conductive layer 220 to be tested form a conductive path with a short distance, and the resistance of the S-shaped conductive path with a long distance is greater than that of the conductive path with a short distance, so that the second partition 221 in the second conductive layer 220 to be tested is determined to be normal or defective according to the comparison between the first measurement value and the preset first measurement value or the preset second measurement value.
The preset second measurement value is greater than the preset first measurement value.
In this embodiment, the preset second measurement value ranges from 0.1 ohm to 10 ohms, and the preset first measurement value ranges from 0.01 ohm to 0.1 ohm.
When the first measurement value is within the range of the preset first measurement value, the first isolation 211 has a defect, and the second partition 221 has a defect.
When the first measurement value is within the range of the preset second measurement value, the first isolation 221 has a defect, and the second isolation 221 is normal.
When the first measurement value is infinity, the first partition 211 is normal.
In this embodiment, the first measurement value is 0.02, and the first measurement value is within the range of the first measurement value, so that it is known that the first partition 211 has a defect, and the second partition 211 has a defect.
In another embodiment, the first measurement value is 0.2, and the first measurement value is within the range of the preset second measurement value, so that it is known that the first partition has a defect, and the second partition is normal.
In yet another embodiment, the first measurement is infinite, thereby knowing that the first partition is normal.
It should be noted that when the first measurement value is infinite, it can be known that the first partition is normal, but the information of the second partition needs to be further tested for judgment.
In this embodiment, the test structure further includes: a third testing terminal 243 electrically connected to one of the second conductive layers 220 to be tested; the test method further comprises the following steps: obtaining a second measurement value between the second testing end 242 and the third testing end 243; and obtaining information of the second partition 221 according to the second measurement value.
The second measurement value includes: a resistance between the second test terminal and the third test terminal.
The method for obtaining the information of the second partition 221 according to the second measurement value includes: providing a preset third measurement value; and comparing the second measurement value with the preset third measurement value to acquire the information of the second partition 221.
When the first measurement value is infinity, electrically connecting one of the second conductive layers to be tested 220 to the third testing end 243; the resistance between second test end 242 and second test end 243 is tested to obtain a second measurement. Because two second plugs 252 are spaced between adjacent second partitions 221 in each second conductive layer 229 to be tested, and at the same time, the second partitions 221 in the adjacent second conductive layers 220 to be tested do not coincide along a central line perpendicular to the extending direction of the second conductive layer 220 to be tested, when the second partitions 221 in the second conductive layers 220 to be tested are normal, an open circuit is formed between the second testing end 242 and the third testing end 243, and the resistance of the second measured value is infinite; when the second partition 221 in the second conductive layer 220 to be tested is defective, a linear path is formed between the second testing end 242 and the third testing end 243, and the resistance of the second measured value is small, so that the second partition 221 in the second conductive layer 220 to be tested is judged to be normal or defective according to the comparison between the second measured value and the preset third measured value.
In this embodiment, the preset third measurement value ranges from 0.01 ohm to 0.1 ohm.
When the second measurement value is within the range of the preset third measurement value, the second partition has a 221 defect.
When the second measurement is infinity, the second partition 221 is normal.
Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.

Claims (26)

1. A test structure, comprising:
a substrate;
the first conducting layer to be tested is positioned on the substrate, and a plurality of first partitions are arranged in the first conducting layer to be tested;
the second conducting layers to be tested are arranged on the substrate in parallel, a plurality of second partitions are arranged in each second conducting layer to be tested, and at least one second conducting layer to be tested is electrically connected with the first conducting layer to be tested;
the first conducting layers are arranged on the substrate in parallel, and each first conducting layer is electrically connected with the second conducting layer to be tested;
the first testing end is electrically connected with the first conducting layer to be tested;
a second test terminal electrically connected to one of the first conductive layers.
2. The test structure of claim 1, wherein each of the first conductive layers is parallel to a first conductive layer to be tested.
3. The test structure of claim 1, wherein the number of first partitions is more than one.
4. The test structure of claim 1, wherein the first conductive layer under test is on top of the second conductive layer under test, or the first conductive layer under test is under the second conductive layer under test; the first conducting layer to be tested is electrically connected with the second conducting layer to be tested through the first plug.
5. The test structure of claim 1, wherein the second conductive layer to be tested is on top of the first conductive layer or the second conductive layer to be tested is under the first conductive layer; and each second conductive layer to be tested is electrically connected with each first conductive layer through a second plug.
6. The test structure of claim 5, wherein the number of second partitions is more than one.
7. The test structure as claimed in claim 6, wherein when the number of the second partitions is plural, two second plugs are spaced between adjacent second partitions in each second conductive layer to be tested.
8. The test structure of claim 7, wherein the second partitions in adjacent second conductive layers to be tested do not coincide along a center line perpendicular to an extending direction of the second conductive layers to be tested.
9. The test structure of claim 1, further comprising: and the second conducting layer is electrically connected with the first conducting layer farthest from the first conducting layer to be tested, and the second testing end is electrically connected with the second conducting layer.
10. The test structure of claim 9, wherein the second conductive layer is parallel to the second conductive layer to be tested.
11. The test structure of claim 1, further comprising: and the third testing end is electrically connected with one second conducting layer to be tested.
12. A method of testing, comprising:
providing a test structure, the test structure comprising: a substrate; the first conducting layer to be tested is positioned on the substrate, and a plurality of first partitions are arranged in the first conducting layer to be tested; the second conducting layers to be tested are arranged on the substrate in parallel, a plurality of second partitions are arranged in each second conducting layer to be tested, and at least one second conducting layer to be tested is electrically connected with the first conducting layer to be tested; the first conducting layers are arranged on the substrate in parallel, and each first conducting layer is electrically connected with the second conducting layer to be tested; the first testing end is electrically connected with the first conducting layer to be tested; a second test terminal electrically connected to one of the first conductive layers;
a first measurement between the first test terminal and the second test terminal is obtained.
13. The test method of claim 12, further comprising: and obtaining information of the first partition and the second partition according to the first measurement value.
14. The test method of claim 13, wherein obtaining information for a first partition and a second partition based on the first measurement comprises: providing a preset first measurement value and a preset second measurement value; and comparing the first measurement value with a preset first measurement value or a preset second measurement value to acquire information of the first partition and the second partition.
15. The test method of claim 14, wherein the predetermined second measurement value is greater than the predetermined first measurement value.
16. The test method of claim 15, wherein the first isolation has a defect and the second partition has a defect when the first measurement is within the range of the preset first measurement.
17. The test method of claim 15, wherein the first partition has a defect and the second partition is normal when the first measurement is within the range of the preset second measurement.
18. The test method of claim 15, wherein the first partition is normal when the first measurement is infinite.
19. The test method of claim 12, wherein the first measurement value comprises: a resistance between the first test terminal and the second test terminal.
20. The test method according to claim 12, wherein the first conductive layer to be tested and the second conductive layer to be tested are electrically connected through a first plug; the number of the second partitions is multiple, each second conductive layer to be tested is electrically connected with each first conductive layer through a second plug, two second plugs are arranged between adjacent second partitions in each second conductive layer to be tested at intervals, and the second partitions in the adjacent second conductive layers to be tested do not coincide along a central line perpendicular to the extending direction of the second conductive layer to be tested.
21. The test method of claim 12, wherein the test structure further comprises: a third test end electrically connected with one of the second conductive layers to be tested; the test method further comprises the following steps: and acquiring a second measurement value between the second test end and the third test end.
22. The test method of claim 21, further comprising: and obtaining information of a second partition according to the second measurement value.
23. The test method of claim 22, further comprising: the method for obtaining the information of the second partition according to the second measurement value comprises the following steps: providing a preset third measurement value; and comparing the second measurement value with the preset third measurement value to obtain the information of the second partition.
24. The test method of claim 23, wherein the second partition has a defect when the second measurement is within the range of the preset third measurement.
25. The test method of claim 23, wherein the second partition is normal when the second measurement is infinite.
26. The test method of claim 21, wherein the second measurement value comprises: a resistance between the second test terminal and the third test terminal.
CN202010470615.6A 2020-05-28 2020-05-28 Test structure and test method Pending CN113745124A (en)

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CN205609515U (en) * 2016-05-20 2016-09-28 中芯国际集成电路制造（天津）有限公司 Reliability testing structure
CN107346751A (en) * 2016-05-05 2017-11-14 中芯国际集成电路制造(上海)有限公司 Test structure and forming method thereof and method of testing
CN107346752A (en) * 2016-05-05 2017-11-14 中芯国际集成电路制造(上海)有限公司 Semi-conductor test structure and forming method thereof and method of testing
CN108269746A (en) * 2016-12-15 2018-07-10 台湾积体电路制造股份有限公司 For testing the method for the bridge joint in neighbouring semiconductor devices and test structure

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107346751A (en) * 2016-05-05 2017-11-14 中芯国际集成电路制造(上海)有限公司 Test structure and forming method thereof and method of testing
CN107346752A (en) * 2016-05-05 2017-11-14 中芯国际集成电路制造(上海)有限公司 Semi-conductor test structure and forming method thereof and method of testing
CN205609515U (en) * 2016-05-20 2016-09-28 中芯国际集成电路制造（天津）有限公司 Reliability testing structure
CN108269746A (en) * 2016-12-15 2018-07-10 台湾积体电路制造股份有限公司 For testing the method for the bridge joint in neighbouring semiconductor devices and test structure

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