CN113725149A - Material filling method, semiconductor structure and 3D NAND memory - Google Patents

Material filling method, semiconductor structure and 3D NAND memory Download PDF

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CN113725149A
CN113725149A CN202111006210.8A CN202111006210A CN113725149A CN 113725149 A CN113725149 A CN 113725149A CN 202111006210 A CN202111006210 A CN 202111006210A CN 113725149 A CN113725149 A CN 113725149A
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predetermined structure
time period
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filling
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CN113725149B (en
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付家赫
熊少游
程磊
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Yangtze Memory Technologies Co Ltd
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Yangtze Memory Technologies Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528Geometry or layout of the interconnection structure
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/20Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H10B41/35Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B43/00EEPROM devices comprising charge-trapping gate insulators
    • H10B43/20EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B43/00EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H10B43/35EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/10Applying interconnections to be used for carrying current between separate components within a device
    • H01L2221/1068Formation and after-treatment of conductors

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Abstract

The application provides a filling method of a material, a semiconductor structure and a 3D NAND memory. The filling method comprises the following steps: providing a substrate having a predetermined structure, the predetermined structure being a hole or a groove including a bent portion; processing the predetermined structure to reduce a difference in growth rate of the predetermined material at a top and a bottom of the predetermined structure; filling a predetermined material in the processed predetermined structure to form a residual predetermined structure, wherein the residual predetermined structure is a predetermined structure which is not filled with the predetermined material; processing the surface of the remaining predetermined structure to reduce the roughness of the surface of the remaining predetermined structure; and filling the predetermined material in the remaining predetermined structure after the treatment until the predetermined structure is filled. By processing the surfaces of the residual holes or grooves, the grain size of the preset material during deposition is reduced, the filling defect of the top is reduced or eliminated, and the problem that the filling defect of the hole caused by the bending area of the top in the prior art is large is solved.

Description

Material filling method, semiconductor structure and 3D NAND memory
Technical Field
The application relates to the field of semiconductors, in particular to a filling method of a material, a semiconductor structure and a 3D NAND memory.
Background
In the manufacturing process of 3D NAND FLASH, as the number of layers increases and the aspect ratio increases, the metal filling of deep holes becomes more challenging. The reason is that the growth rate of the metal at the top of the deep hole is greater than that at the bottom, so that defects such as voids are easily formed in the filled metal.
At present, an ICE (inert controlled enhancement) process is applied in a large scale. The mechanism of ICE is to use some gases to process the growth substrate of metal, so that the growth rate difference between the top and the bottom of the deep hole is reduced, the probability of top early sealing (over hang) is reduced, and the defects of cavities and the like in the filled metal are reduced or avoided as much as possible.
However, in the top region of the deep hole, since there is a bending region and the region is close to the top, it is difficult for the ICE process to reduce the difference of the growth rate well in the region, and therefore, the filling defect (defect such as void) of the top is still large.
Therefore, a method for filling a hole by reducing the void caused by the bending area of the top is needed.
The above information disclosed in this background section is only for enhancement of understanding of the background of the technology described herein and, therefore, certain information may be included in the background that does not form the prior art that is already known in this country to a person of ordinary skill in the art.
Disclosure of Invention
The present application mainly aims to provide a material filling method, a semiconductor structure and a 3D NAND memory, so as to solve the problem of large hole filling defects caused by a top bending region in the prior art.
In order to achieve the above object, according to one aspect of the present application, there is provided a filling method of a material, including: providing a substrate having a predetermined structure, the predetermined structure being a hole or a groove, the predetermined structure including a bent portion including a portion having a maximum width in a first direction, the first direction being a depth direction perpendicular to the predetermined structure; processing the predetermined structure to reduce the growth rate of a predetermined material at the top and bottom of the predetermined structure, and to have a reduction in the growth rate at the top greater than a reduction in the growth rate at the bottom; filling a predetermined material in the processed predetermined structure to form a residual predetermined structure, wherein the residual predetermined structure is the predetermined structure which is not filled with the predetermined material; processing the surface of the residual preset structure to reduce the roughness of the surface of the residual preset structure; and filling the residual preset structure after the treatment with the preset material until the residual preset structure is filled.
Optionally, processing the predetermined structure to reduce a growth rate of a predetermined material on a top of the predetermined structure and make the growth rate of the top of the predetermined structure smaller than a growth rate of a bottom of the predetermined structure includes: a passivation layer is formed on a surface of the predetermined structure, and a thickness of the passivation layer gradually increases from the bottom to the top.
Optionally, processing the surface of the remaining predetermined structure to reduce the roughness of the surface of the remaining predetermined structure includes: and annealing the surface of the residual preset structure by using reducing gas.
Optionally, the reducing gas comprises hydrogen.
Optionally, forming a passivation layer on a surface of the predetermined structure, including: and introducing tungsten hexafluoride and ammonia gas into the reaction chamber where the preset structure is located, and forming a nitride passivation layer on the surface of the preset structure.
Optionally, filling a predetermined material in the processed predetermined structure, and/or filling the predetermined material in the remaining predetermined structure after processing, includes: in a first time period, introducing a gas source of a predetermined material with a first flow into a reaction chamber where the predetermined structure is located; in a second time period, introducing the gas source which meets a preset change rule into the reaction chamber, wherein the preset change rule is a change rule for reducing the first flow to a second flow, and the starting time of the second time period is the end time of the first time period; and in a third time period, introducing a second flow of the gas source into the reaction chamber, wherein the starting time of the third time period is the end time of the second time period.
Optionally, in a second time period, the step of introducing the gas source conforming to a predetermined variation law into the reaction chamber includes: in a first sub-time period, introducing the gas source with the flow rate according with a first sub-change rule into the reaction chamber, wherein the first sub-change rule is a change rule for reducing the first flow rate to a third flow rate, and the starting time of the first sub-time period is the starting time of the second time period; in a second sub-period, introducing the gas source with the third flow into the reaction chamber, wherein the starting time of the second sub-period is the end time of the first sub-period; and in a third sub-time period, introducing the gas source with the flow rate according with a second sub-change rule into the reaction chamber, wherein the first sub-change rule is a change rule for reducing the third flow rate to the second flow rate, the starting time of the third sub-time period is the end time of the second sub-time period, and the end time of the third sub-time period is the end time of the second time period.
Optionally, the gas source comprises tungsten hexafluoride.
According to another aspect of the present application, there is provided a semiconductor structure formed using any of the methods.
According to yet another aspect of the present application, there is provided a 3D NAND memory comprising a semiconductor structure formed using any of the methods.
In an embodiment of the present invention, first, a substrate having a hole or a groove of a curved portion is provided; then, processing the hole or the groove to reduce the difference of the growth rate of the predetermined material at the top and the bottom of the hole or the groove, and filling the processed part of the hole or the groove with the predetermined material; secondly, processing the surfaces of the rest holes or grooves to reduce the roughness of the surfaces; finally, the remaining holes or grooves are filled with a predetermined material. According to the method, after the predetermined material is filled in the part of the predetermined structure, the surface of the rest hole or groove is processed to reduce the roughness of the surface, so that the grain size of the predetermined material during deposition is reduced, the difference of the growth rates of the top and the bottom of the rest hole or groove is reduced, the time required for sealing the top is prolonged, the top can be sealed only when the bottom of the rest predetermined structure is deposited more, the filling defect of the top is reduced or eliminated, and the problem that the filling defect of the hole is larger due to the bending area of the top in the prior art is solved.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this application, illustrate embodiments of the application and, together with the description, serve to explain the application and are not intended to limit the application. In the drawings:
FIG. 1 shows a schematic flow diagram of a method of filling a material according to an embodiment of the present application;
fig. 2 to 5 show a schematic structural diagram of a filling process of one material of the present application;
FIGS. 6 to 9 show schematic structural diagrams using segmented growth filling;
FIG. 10 shows a schematic of a structure for growing a fill using low partial pressure;
fig. 11 shows a schematic of the structure of the fill grown with high partial pressure.
Wherein the figures include the following reference numerals:
10. a predetermined configuration; 11. a bending section; 12. a passivation layer; 13. the remaining predetermined structure; 14. leaving a surface of the predetermined structure.
Detailed Description
It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict. The present application will be described in detail below with reference to the embodiments with reference to the attached drawings.
In order to make the technical solutions better understood by those skilled in the art, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only partial embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that the terms "first," "second," and the like in the description and claims of this application and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It should be understood that the data so used may be interchanged under appropriate circumstances such that embodiments of the application described herein may be used. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
It will be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" another element, it can be directly on the other element or intervening elements may also be present. Also, in the specification and claims, when an element is described as being "connected" to another element, the element may be "directly connected" to the other element or "connected" to the other element through a third element.
As described in the background of the invention, in order to solve the above-mentioned problem of filling defects of a hole having a curved region on the top, in an exemplary embodiment of the present application, a method for filling a material, a semiconductor structure and a 3D NAND memory are provided.
According to an embodiment of the present application, a method of filling a material is provided. Fig. 1 is a flow chart of a method of filling a material according to an embodiment of the present application. As shown in fig. 1, the method comprises the steps of:
step S101, providing a substrate having a predetermined structure 10, wherein the predetermined structure is a hole or a groove, the predetermined structure 10 includes a bending portion 11, the bending portion 11 includes a portion with a maximum width in a first direction, and the first direction is a depth direction perpendicular to the predetermined structure 10;
step S102, processing the predetermined structure 10 to form a structure as shown in fig. 2, so as to reduce the growth rates of the predetermined material at the top and the bottom of the predetermined structure 10, and make the reduction amount of the growth rate at the top greater than the reduction amount of the growth rate at the bottom;
step S103, filling a predetermined material into the processed predetermined structure 10 to form a remaining predetermined structure 13 (the structure shown in fig. 3), where the remaining predetermined structure 13 is the predetermined structure 10 not filled with the predetermined material;
step S104, processing the surface 14 of the remaining predetermined structure to form a structure as shown in fig. 4, so as to reduce the roughness of the surface 14 of the remaining predetermined structure;
step S105, the remaining predetermined structure 13 after the processing is filled with the predetermined material until the predetermined material is filled, and the filled structure is as shown in fig. 5.
In the above method, first, a substrate having a hole or a groove with a curved portion is provided; then, processing the hole or the groove to reduce the difference of the growth rate of the predetermined material at the top and the bottom of the hole or the groove, and filling the processed part of the hole or the groove with the predetermined material; secondly, processing the surfaces of the rest holes or grooves to reduce the roughness of the surfaces; finally, the remaining holes or grooves are filled with a predetermined material. According to the method, after the predetermined material is filled in the part of the predetermined structure, the surface of the rest hole or groove is processed to reduce the roughness of the surface, so that the grain size of the predetermined material during deposition is reduced, the difference of the growth rates of the top and the bottom of the rest hole or groove is reduced, the time required for sealing the top is prolonged, the top can be sealed only when the bottom of the rest predetermined structure is deposited more, the filling defect of the top is reduced or eliminated, and the problem that the filling defect of the hole is larger due to the bending area of the top in the prior art is solved.
In an embodiment of the present application, processing the predetermined structure 10 to reduce a growth rate of a predetermined material on a top of the predetermined structure 10 and make the growth rate on the top of the predetermined structure 10 smaller than a growth rate on a bottom of the predetermined structure 10 includes: a passivation layer 12 is formed on the surface of the predetermined structure 10, and the thickness of the passivation layer 12 gradually increases from the bottom to the top. In the method in the embodiment, in the subsequent predetermined material filling process, the growth rates of the predetermined materials are different, the thickness of the passivation layer close to the top is larger, so that the growth rate of the predetermined material at the position is smaller, and the growth rate of the predetermined material at the bottom is larger because the thickness of the passivation layer is smaller, so that more material is filled at the bottom of the predetermined structure, the material filled at the top is smaller, the premature sealing of the top caused by more material grown at the top is avoided, and the problem of larger holes caused by the premature sealing is solved.
In yet another embodiment of the present application, treating the surface 14 of the remaining predetermined structure to reduce the roughness of the surface 14 of the remaining predetermined structure includes annealing the surface 14 of the remaining predetermined structure with a reducing gas. In the embodiment, the surface of the predetermined structure can be annealed by using reducing gas, and the reducing gas can react with dangling bonds in the passivation layer, so that dangling bonds in the passivation layer can be reduced, the roughness of the surface of the remaining predetermined structure is reduced, the grains of the subsequently grown predetermined material are reduced, and the sealing time required by the top is further ensured to be longer.
In yet another embodiment of the present application, the reducing gas includes hydrogen. In the embodiment, hydrogen is used as reducing gas, the effect of eliminating dangling bonds in the passivation layer by the hydrogen is good, and the hydrogen does not remain in the passivation layer and basically does not affect other performances of the device.
Of course, in practical applications, the reducing gas in the present application is not limited to hydrogen, and may be other gases, such as hydrogen sulfide.
In another embodiment of the present application, forming the passivation layer 12 on the surface of the predetermined structure 10 includes introducing tungsten hexafluoride and ammonia gas into the reaction chamber in which the predetermined structure 10 is located, and forming the nitride passivation layer 12 on the surface of the predetermined structure 10. In the embodiment, the method has the advantages of high efficiency of forming the nitride passivation layer, strong process controllability and higher controllable degree of the proportion of the nitride passivation layer.
The method for forming the nitride passivation layer is not limited to this method, and other methods such as a physical vapor deposition method and an atomic layer deposition method may be used. If the physical vapor deposition method is adopted, nitrogen and argon are introduced into the reaction chamber where the preset structure is located, and the nitrogen and argon are used for conducting nitriding treatment on the surface of the preset structure to form the nitride passivation layer. And if the atomic layer deposition method is adopted, introducing ammonia gas, tungsten hexafluoride and diborane into the reaction chamber with the preset structure.
In still another embodiment of the present application, filling the predetermined structure 10 after the processing with the predetermined material, and/or filling the remaining predetermined structure 13 after the processing with the predetermined material includes: in a first time period, introducing a first flow of the gas source of the predetermined material into the reaction chamber in which the predetermined structure 10 is located, where a partial pressure of the predetermined structure 10 is small, a flow threshold of the gas source is large, and a flow of the gas source to be introduced is large; in a second time period, introducing the gas source which meets a preset change rule into the reaction chamber, wherein the preset change rule is a change rule of reducing the first flow to a second flow, the starting time of the second time period is the end time of the first time period, the partial pressure of the residual preset structure 13 is greater than the partial pressure at the bottom in the first time period, and the flow threshold of the gas source is less than the flow threshold in the first time period, so that the flow of the gas source to be introduced is less than the flow of the gas source in the first time period; and in a third time period, introducing the gas source with a second flow into the reaction chamber, wherein the starting time of the third time period is the end time of the second time period, the partial pressure of the remaining preset structure 13 is large, the flow threshold of the gas source is small, and the flow of the gas source needing to be introduced is small. The source gas flow threshold is the flow value at which the rate reaches a maximum and no further increase occurs for a predetermined material growth. In the embodiment, different gas flows are used in different stages by adopting a segmented growth reaction mode according to the preset material growth characteristics in different stages, so that the use amount of reaction gas is reduced.
In another embodiment of the present application, the step of introducing the gas source according to the predetermined variation law into the reaction chamber during the second period of time includes: in a first sub-period, introducing the gas source with a flow rate according with a first sub-variation law into the reaction chamber, wherein the first sub-variation law is a variation law of reducing the first flow rate to a third flow rate, and the starting time of the first sub-period is the starting time of the second period; introducing the gas source with the third flow rate into the reaction chamber in a second sub-period, wherein the starting time of the second sub-period is the end time of the first sub-period; and in a third sub-period, introducing the gas source with the flow rate according with a second sub-variation law into the reaction chamber, wherein the first sub-variation law is a variation law of reducing the third flow rate to the second flow rate, the starting time of the third sub-period is the end time of the second sub-period, and the end time of the third sub-period is the end time of the second sub-period. In this embodiment, the second stage is subdivided into different sub-stages, where different gas flows are used, further reducing the amount of reactant gas used.
In another embodiment of the present application, the gas source comprises tungsten hexafluoride. Of course, in practical applications, the gas source of the present application is not limited to tungsten hexafluoride, but other gases may be used, and those skilled in the art may select other suitable gases according to practical situations.
In another exemplary embodiment of the present application, a semiconductor structure is provided that is formed using any of the above-described methods.
The semiconductor structure described above is formed using any of the methods described above, in which first, a substrate having a hole or a groove of a curved portion is provided; then, processing the hole or the groove to reduce the difference of the growth rate of the predetermined material at the top and the bottom of the hole or the groove, and filling the processed part of the hole or the groove with the predetermined material; secondly, processing the surfaces of the rest holes or grooves to reduce the roughness of the surfaces; finally, the remaining holes or grooves are filled with a predetermined material. According to the method, after the predetermined material is filled in the part of the predetermined structure, the surface of the rest hole or groove is processed to reduce the roughness of the surface, so that the grain size of the predetermined material during deposition is reduced, the difference of the growth rates of the top and the bottom of the rest hole or groove is reduced, the time required for sealing the top is prolonged, the top can be sealed only when the bottom of the rest predetermined structure is deposited more, the filling defect of the top is reduced or eliminated, and the problem that the filling defect of the hole is larger due to the bending area of the top in the prior art is solved. Therefore, the semiconductor structure adopts the filling method, so that the filling defect of the hole with the bending area on the top in the semiconductor structure is small.
In yet another exemplary embodiment of the present application, a 3D NAND memory is provided, the 3D NAND memory including a semiconductor structure formed using any one of the above-described methods.
The 3D NAND memory includes a semiconductor structure formed by any one of the above methods, in which first, a substrate having a hole or a groove with a curved portion is provided; then, processing the hole or the groove to reduce the difference of the growth rate of the predetermined material at the top and the bottom of the hole or the groove, and filling the processed part of the hole or the groove with the predetermined material; secondly, processing the surfaces of the rest holes or grooves to reduce the roughness of the surfaces; finally, the remaining holes or grooves are filled with a predetermined material. According to the method, after the predetermined material is filled in the part of the predetermined structure, the surface of the rest hole or groove is processed to reduce the roughness of the surface, so that the grain size of the predetermined material during deposition is reduced, the difference of the growth rates of the top and the bottom of the rest hole or groove is reduced, the time required for sealing the top is prolonged, the top can be sealed only when the bottom of the rest predetermined structure is deposited more, the filling defect of the top is reduced or eliminated, and the problem that the filling defect of the hole is larger due to the bending area of the top in the prior art is solved. Therefore, since the 3D NAND memory adopts the above semiconductor structure, the filling defect of the hole with the bending region on the top in the 3D NAND memory is small, and thus the electrical performance of the 3D NAND memory is good.
In this device, the predetermined material may be tungsten, and the filled tungsten forms the gate. Other structures in the device are the same as those in the prior art, and are not described in detail here.
In order to make the technical solutions of the present application more clearly understood by those skilled in the art, the technical solutions of the present application will be described below with reference to specific embodiments.
Examples
The manufacturing method of the semiconductor structure comprises the following steps:
providing a substrate having a predetermined structure 10, the predetermined structure 10 comprising a bend 11; introducing tungsten hexafluoride and ammonia gas into the predetermined structure 10 to form a nitride passivation layer 12 on the predetermined structure 10, so as to form a structure as shown in fig. 2, so as to reduce the growth rate of tungsten at the top and bottom of the predetermined structure 10, and make the reduction of the growth rate at the top greater than the reduction of the growth rate at the bottom; filling tungsten in the processed predetermined structure 10 to form a remaining predetermined structure 13, where the remaining predetermined structure 13 is the predetermined structure 10 not filled with tungsten, and the remaining predetermined structure 13 is shown in fig. 3; as shown in fig. 4, the surface 14 of the remaining predetermined structure is subjected to annealing treatment with hydrogen gas to reduce the roughness of the surface 14 of the remaining predetermined structure; tungsten is filled in the remaining predetermined structure 13 after the process until it is filled, resulting in the structure shown in fig. 5.
The semiconductor structure adopts the filling method, so that the filling defects of the hole with the bending area on the top in the semiconductor structure are less.
The process of filling the tungsten into the predetermined structure comprises the following steps:
in a first time period, introducing a first flow of tungsten hexafluoride into the reaction chamber in which the predetermined structure 10 is located, so as to form the structure shown in fig. 6; in a second time period, introducing tungsten hexafluoride meeting a preset change rule into the reaction chamber to form a structure shown in fig. 7, wherein the preset change rule is a change rule for reducing the first flow rate to a second flow rate, and the starting time of the second time period is the end time of the first time period; in a third time period, introducing tungsten hexafluoride with a second flow rate into the reaction chamber to form a structure as shown in fig. 8, wherein the starting time of the third time period is the end time of the second time period; the resulting structure is the structure shown in fig. 9.
By adopting the sectional filling mode, the reaction mode of sectional growth is adopted according to the growth characteristics of the preset materials at different stages, and different gas flow rates are used at different stages, so that the consumption of the reaction gas is reduced.
Comparative example 1
Fig. 10 is a schematic view of a semiconductor structure filled with a low flow growth, which is the flow for the third time period in the example.
Compared with fig. 9, the semiconductor in fig. 10 has larger holes and is less effective in filling.
Comparative example 2
Fig. 11 is a schematic view of a semiconductor structure filled with a high flow growth, the high flow being the flow for the first time period in the example.
Compared with fig. 11, the number of holes of the semiconductor in fig. 10 is similar to that of the holes in fig. 11, but the reaction gas is less in a sectional filling mode.
From the above description, it can be seen that the above-described embodiments of the present application achieve the following technical effects:
1) the filling method of the material comprises the following steps of firstly, providing a substrate with a hole or a groove with a bent part; then, processing the hole or the groove to reduce the difference of the growth rate of the predetermined material at the top and the bottom of the hole or the groove, and filling the processed part of the hole or the groove with the predetermined material; secondly, processing the surfaces of the rest holes or grooves to reduce the roughness of the surfaces; finally, the remaining holes or grooves are filled with a predetermined material. In the method, the surface roughness of the surface of the residual hole or groove is reduced by processing the surface of the residual hole or groove, so that the grain size of the preset material is reduced, the growth rate difference of the top and the bottom of the hole or groove is reduced, the probability of sealing the top in advance is reduced, and the filling defect of the hole with the bending area on the top in the prior art is further reduced.
2) The semiconductor structure of the present application is formed by any method in which, first, a substrate having a hole or a groove of a curved portion is provided; then, processing the hole or the groove to reduce the difference of the growth rate of the predetermined material at the top and the bottom of the hole or the groove, and filling the processed part of the hole or the groove with the predetermined material; secondly, processing the surfaces of the rest holes or grooves to reduce the roughness of the surfaces; finally, the remaining holes or grooves are filled with a predetermined material. In the method, the surface roughness of the surface of the residual hole or groove is reduced by processing the surface of the residual hole or groove, so that the grain size of the preset material is reduced, the growth rate difference of the top and the bottom of the hole or groove is reduced, the probability of sealing the top in advance is reduced, and the filling defect of the hole with the bending area on the top in the prior art is further reduced. Therefore, the semiconductor structure adopts the filling method, so that the filling defect of the hole with the bending area on the top in the semiconductor structure is less.
3) The 3D NAND memory comprises a semiconductor structure, wherein the semiconductor structure is formed by adopting any method, and in the method, firstly, a substrate with a hole or a groove of a bent part is provided; then, processing the hole or the groove to reduce the difference of the growth rate of the predetermined material at the top and the bottom of the hole or the groove, and filling the processed part of the hole or the groove with the predetermined material; secondly, processing the surfaces of the rest holes or grooves to reduce the roughness of the surfaces; finally, the remaining holes or grooves are filled with a predetermined material. In the method, the surface roughness of the surface of the residual hole or groove is reduced by processing the surface of the residual hole or groove, so that the grain size of the preset material is reduced, the growth rate difference of the top and the bottom of the hole or groove is reduced, the probability of sealing the top in advance is reduced, and the filling defect of the hole with the bending area on the top in the prior art is further reduced. Therefore, since the 3D NAND memory adopts the above semiconductor structure, the filling defect of the hole having the bending region on the top in the 3D NAND memory is less.
The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims (10)

1. A method of filling a material, comprising:
providing a substrate having a predetermined structure, the predetermined structure being a hole or a groove, the predetermined structure including a bent portion including a portion having a maximum width in a first direction, the first direction being a depth direction perpendicular to the predetermined structure;
processing the predetermined structure to reduce the growth rate of a predetermined material at the top and bottom of the predetermined structure, and to have a reduction in the growth rate at the top greater than a reduction in the growth rate at the bottom;
filling the predetermined material in the processed predetermined structure to form a residual predetermined structure, wherein the residual predetermined structure is the predetermined structure which is not filled with the predetermined material;
processing the surface of the residual preset structure to reduce the roughness of the surface of the residual preset structure;
and filling the residual preset structure after the treatment with the preset material until the residual preset structure is filled.
2. The method of claim 1, wherein processing the predetermined structure to reduce a growth rate of a predetermined material at a top of the predetermined structure and to make the growth rate at the top of the predetermined structure less than a growth rate at a bottom of the predetermined structure comprises:
a passivation layer is formed on a surface of the predetermined structure, and a thickness of the passivation layer gradually increases from the bottom to the top.
3. The method of claim 2, wherein treating the surface of the remaining predetermined structure to reduce the roughness of the surface of the remaining predetermined structure comprises:
and annealing the surface of the residual preset structure by using reducing gas.
4. The method of claim 3, wherein the reducing gas comprises hydrogen.
5. The method of claim 2, wherein forming a passivation layer on a surface of the predetermined structure comprises:
and introducing tungsten hexafluoride and ammonia gas into the reaction chamber where the preset structure is located, and forming a nitride passivation layer on the surface of the preset structure.
6. Method according to any of claims 1 to 5, wherein filling the predetermined material in the processed predetermined structure and/or filling the predetermined material in the remaining predetermined structure after processing comprises:
in a first time period, introducing a first flow of gas source of the preset material into the reaction chamber where the preset structure is located;
in a second time period, introducing the gas source which meets a preset change rule into the reaction chamber, wherein the preset change rule is a change rule for reducing the first flow to a second flow, and the starting time of the second time period is the end time of the first time period;
and in a third time period, introducing a second flow of the gas source into the reaction chamber, wherein the starting time of the third time period is the end time of the second time period.
7. The method of claim 6, wherein the step of supplying the gas source to the reaction chamber according to a predetermined variation law during the second period of time comprises:
in a first sub-time period, introducing the gas source with the flow rate according with a first sub-change rule into the reaction chamber, wherein the first sub-change rule is a change rule for reducing the first flow rate to a third flow rate, and the starting time of the first sub-time period is the starting time of the second time period;
in a second sub-period, introducing the gas source with the third flow into the reaction chamber, wherein the starting time of the second sub-period is the end time of the first sub-period;
and in a third sub-time period, introducing the gas source with the flow rate according with a second sub-change rule into the reaction chamber, wherein the first sub-change rule is a change rule for reducing the third flow rate to the second flow rate, the starting time of the third sub-time period is the end time of the second sub-time period, and the end time of the third sub-time period is the end time of the second time period.
8. The method of claim 6, wherein the gas source comprises tungsten hexafluoride.
9. A semiconductor structure formed using the method of any of claims 1 to 8.
10. A 3D NAND memory comprising a semiconductor structure, wherein the semiconductor structure is formed using the method of any of claims 1 to 8.
CN202111006210.8A 2021-08-30 2021-08-30 Material filling method, semiconductor structure and 3D NAND memory Active CN113725149B (en)

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