CN113725075A - Preparation method of diamond mixed terminal surface conductance - Google Patents
Preparation method of diamond mixed terminal surface conductance Download PDFInfo
- Publication number
- CN113725075A CN113725075A CN202110789451.8A CN202110789451A CN113725075A CN 113725075 A CN113725075 A CN 113725075A CN 202110789451 A CN202110789451 A CN 202110789451A CN 113725075 A CN113725075 A CN 113725075A
- Authority
- CN
- China
- Prior art keywords
- diamond
- silicon wafer
- substrate
- wafer substrate
- mixed terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 229910003460 diamond Inorganic materials 0.000 title claims abstract description 75
- 239000010432 diamond Substances 0.000 title claims abstract description 75
- 238000002360 preparation method Methods 0.000 title abstract description 9
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 51
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 51
- 239000010703 silicon Substances 0.000 claims abstract description 51
- 238000005530 etching Methods 0.000 claims abstract description 20
- 238000000034 method Methods 0.000 claims abstract description 14
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims abstract description 13
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 13
- 239000001257 hydrogen Substances 0.000 claims abstract description 13
- 239000000758 substrate Substances 0.000 claims description 72
- VNWKTOKETHGBQD-UHFFFAOYSA-N methane Chemical compound C VNWKTOKETHGBQD-UHFFFAOYSA-N 0.000 claims description 16
- 238000005229 chemical vapour deposition Methods 0.000 claims description 14
- 238000001816 cooling Methods 0.000 claims description 11
- 238000006243 chemical reaction Methods 0.000 claims description 8
- 238000004519 manufacturing process Methods 0.000 claims description 6
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims description 4
- 229910052750 molybdenum Inorganic materials 0.000 claims description 4
- 239000011733 molybdenum Substances 0.000 claims description 4
- 229910021419 crystalline silicon Inorganic materials 0.000 abstract description 6
- 238000011065 in-situ storage Methods 0.000 abstract description 3
- 238000001179 sorption measurement Methods 0.000 abstract description 3
- 239000000463 material Substances 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 239000004557 technical material Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/0405—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising semiconducting carbon, e.g. diamond, diamond-like carbon
- H01L21/0425—Making electrodes
- H01L21/043—Ohmic electrodes
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/50—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
- C23C16/505—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using radio frequency discharges
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
- H01L29/456—Ohmic electrodes on silicon
Abstract
The invention provides a preparation method of diamond mixed terminal surface conductance, which utilizes C-Si to replace a hydrogen terminal diamond surface air adsorption layer, adopts an in-situ silicon etching method as a Si source, forms a mixed terminal on the diamond surface, and prepares the C-H/C-Si mixed terminal diamond.
Description
Technical Field
The invention belongs to the technical field of microelectronic technical material growth, and particularly relates to a preparation method of surface conductance of a diamond mixed terminal.
Background
Diamond is a new generation of semiconductor material with ultra-wide forbidden band after the third generation of wide forbidden band semiconductor material GaN, has many unique physical properties, such as high breakdown field strength, high thermal conductivity, high hardness, high carrier mobility and high chemical stability, is an ideal material for manufacturing power electronic devices, and can be used for high-frequency high-power devices, optical windows, high-energy particle detectors and strong radiation severe environments.
Boron (B) and phosphorus (P) are commonly used as doping materials for diamond, and the activation energy of the doping materials is high, and effective ionization is difficult at room temperature. In the prior art, in the process of preparing diamond, the surface of the diamond needs to be treated by hydrogen plasma and exposed in air, a high-concentration two-dimensional cavity gas conductive layer can be formed on the surface of the diamond in the process, and the conductive layer has the problem of instability, so that the surface conductivity of the diamond is easy to have the instability problem.
Disclosure of Invention
In order to solve the problems in the prior art, the invention provides a preparation method of diamond mixed terminal surface conductance. The technical problem to be solved by the invention is realized by the following technical scheme:
the preparation method of the surface conductance of the diamond mixed terminal provided by the invention comprises the following steps:
selecting a monocrystalline diamond subjected to microwave plasma chemical vapor deposition as a diamond substrate and selecting a high-resistance silicon wafer as a silicon wafer substrate;
etching an etching pit with the same size as the diamond substrate on the silicon wafer substrate;
placing the diamond substrate in a square pit of the silicon wafer substrate;
placing a silicon wafer substrate containing a diamond substrate in a cavity of a microwave plasma chemical vapor deposition system, and carrying out mixed terminal treatment on the silicon wafer substrate containing the diamond substrate according to preset treatment conditions;
and cooling the sample obtained after the mixed terminal is processed to obtain the mixed terminal diamond.
The thickness of the diamond substrate is 0.3-1.0mm, the size of the silicon wafer substrate is 2 inches, the thickness of the silicon wafer substrate is 1-3mm, and the resistance of the silicon wafer is not less than 3000 omega. The depth of the etching pits is 0.3-1.0 mm.
Optionally, the placing the diamond substrate in the etching pit of the silicon wafer substrate includes:
placing a silicon wafer substrate on a molybdenum support;
and placing the diamond substrate in the etching pit of the silicon wafer substrate.
Optionally, the performing mixed termination processing on the silicon wafer substrate including the diamond substrate according to the preset processing condition includes:
vacuumizing the cavity of the microwave plasma chemical vapor deposition system until the vacuum degree value is lower than 10-6 mbar;
and performing mixed terminal treatment on the silicon wafer substrate comprising the diamond substrate under the treatment conditions that the hydrogen flow is 200-sccm, the pressure of the reaction chamber is 80-120mbar, the temperature of the reaction chamber is 700-900 ℃, the microwave power is 1500-3000W, the methane concentration is 0.1-1% and the treatment time is 10-60 min.
Optionally, the step of cooling the sample obtained after the mixed terminal is processed to obtain the mixed terminal diamond includes:
and after the mixed terminal is processed, keeping the hydrogen flow in the cavity of the microwave plasma chemical vapor deposition system unchanged, stopping introducing methane and turning off a microwave power supply, and cooling the sample obtained after the mixed terminal is processed for 10-30min to obtain the mixed terminal diamond.
The invention provides a preparation method of diamond mixed terminal surface conductance, which utilizes C-Si to replace a hydrogen terminal diamond surface air adsorption layer, adopts an in-situ silicon etching method as a Si source, forms a mixed terminal on the diamond surface, and prepares the C-H/C-Si mixed terminal diamond. The present invention will be described in further detail with reference to the accompanying drawings and examples.
Drawings
FIG. 1 is a schematic flow chart of a method for preparing diamond mixed terminal surface conductance provided by the invention.
Detailed Description
The present invention will be described in further detail with reference to specific examples, but the embodiments of the present invention are not limited thereto.
Real-time instance one
As shown in fig. 1, the preparation method of the diamond mixed terminal surface conductance provided by the invention comprises the following steps:
s1, selecting the monocrystalline diamond of microwave plasma chemical vapor deposition as a diamond substrate and selecting a high-resistance silicon wafer as a silicon wafer substrate;
s2, etching pits with the size consistent with that of the diamond substrate on the silicon wafer substrate;
s3, placing the diamond substrate in the square pit of the silicon wafer substrate;
s4, placing the silicon wafer substrate containing the diamond substrate in a cavity of a microwave plasma chemical vapor deposition system, and carrying out mixed terminal treatment on the silicon wafer substrate containing the diamond substrate according to preset treatment conditions;
and S5, cooling the sample obtained after the mixed terminal treatment is finished, and obtaining the mixed terminal diamond.
The thickness of the diamond substrate is 0.3-1.0mm, the size of the silicon wafer substrate is 2 inches, the thickness of the silicon wafer substrate is 1-3mm, and the resistance of the silicon wafer is not less than 3000 omega. The depth of the etching pits is 0.3-1.0 mm.
The invention provides a preparation method of diamond mixed terminal surface conductance, which utilizes C-Si to replace a hydrogen terminal diamond surface air adsorption layer, adopts an in-situ silicon etching method as a Si source, forms a mixed terminal on the diamond surface, and prepares the C-H/C-Si mixed terminal diamond.
As an alternative embodiment of the present invention, the placing the diamond substrate in the etching pit of the silicon wafer substrate comprises:
placing a silicon wafer substrate on a molybdenum support;
and placing the diamond substrate in the etching pit of the silicon wafer substrate.
As an optional embodiment of the present invention, the performing, according to the preset processing condition, a hybrid termination process on the silicon wafer substrate including the diamond substrate includes:
vacuumizing the cavity of the microwave plasma chemical vapor deposition system until the vacuum degree value is lower than 10-6 mbar;
and performing mixed terminal treatment on the silicon wafer substrate comprising the diamond substrate under the treatment conditions that the hydrogen flow is 200-sccm, the pressure of the reaction chamber is 80-120mbar, the temperature of the reaction chamber is 700-900 ℃, the microwave power is 1500-3000W, the methane concentration is 0.1-1% and the treatment time is 10-60 min.
As an optional embodiment of the present invention, the cooling treatment of the sample obtained after the hybrid end treatment is completed to obtain the hybrid end diamond includes:
and after the mixed terminal is processed, keeping the hydrogen flow in the cavity of the microwave plasma chemical vapor deposition system unchanged, stopping introducing methane and turning off a microwave power supply, and cooling the sample obtained after the mixed terminal is processed for 10-30min to obtain the mixed terminal diamond.
Example two
In particular embodiments, the present invention may select microwave plasma chemical vapor deposited single crystal diamond as the diamond substrate. The specific process for preparing the ohmic contact structure is as follows:
the method comprises the steps of selecting a monocrystalline diamond subjected to microwave plasma chemical vapor deposition as a substrate, wherein the diamond is 0.3mm in thickness, and simultaneously selecting a 2-inch high-resistance silicon wafer, wherein the silicon wafer is 1.0mm in thickness, and the silicon wafer is 3000 omega in resistance.
And etching square pits with the same size as the diamond substrate on the silicon substrate by adopting a deep silicon etching process according to the side length of the diamond substrate, wherein the etching depth is 0.3 mm. Placing a silicon wafer on a molybdenum support, placing a diamond substrate in a silicon substrate etching pit, then placing a sample in a cavity of a microwave plasma chemical vapor deposition system, and vacuumizing until the vacuum degree value is lower than 10-6 mbar; and performing mixed terminal treatment, wherein in the treatment process, the hydrogen flow is 200sccm, the pressure of the reaction chamber is 80mbar, the temperature of the reaction chamber is 700 ℃, the microwave power is 1500W, the methane concentration is 0.1%, and the treatment time is 10 min. And after the treatment is finished, stopping introducing the methane, keeping the hydrogen flow unchanged, turning off the microwave power supply, cooling for 10min in the hydrogen atmosphere, and taking out the sample after the cooling is finished.
The foregoing is a more detailed description of the invention in connection with specific preferred embodiments and it is not intended that the invention be limited to these specific details. For those skilled in the art to which the invention pertains, several simple deductions or substitutions can be made without departing from the spirit of the invention, and all shall be considered as belonging to the protection scope of the invention.
Claims (6)
1. A method for preparing diamond mixed terminal surface conductance is characterized by comprising the following steps:
selecting a monocrystalline diamond subjected to microwave plasma chemical vapor deposition as a diamond substrate and selecting a high-resistance silicon wafer as a silicon wafer substrate;
etching an etching pit with the same size as the diamond substrate on the silicon wafer substrate;
placing the diamond substrate in a square pit of the silicon wafer substrate;
placing a silicon wafer substrate containing a diamond substrate in a cavity of a microwave plasma chemical vapor deposition system, and carrying out mixed terminal treatment on the silicon wafer substrate containing the diamond substrate according to preset treatment conditions;
and cooling the sample obtained after the mixed terminal is processed to obtain the mixed terminal diamond.
2. The production method according to claim 1, wherein the diamond substrate has a thickness of 0.3 to 1.0mm, the silicon wafer substrate has a size of 2 inches and a thickness of 1 to 3mm, and the silicon wafer resistance is not less than 3000 Ω.
3. The production method according to claim 1, wherein the depth of the etching pit is 0.3 to 1.0 mm.
4. The method of claim 1, wherein the placing the diamond substrate in the etch pits of the silicon wafer substrate comprises:
placing a silicon wafer substrate on a molybdenum support;
and placing the diamond substrate in the etching pit of the silicon wafer substrate.
5. The production method according to claim 1, wherein the hybrid termination processing of the silicon wafer substrate including the diamond substrate according to the preset processing conditions includes:
vacuumizing the cavity of the microwave plasma chemical vapor deposition system until the vacuum degree value is lower than 10-6 mbar;
and performing mixed terminal treatment on the silicon wafer substrate comprising the diamond substrate under the treatment conditions that the hydrogen flow is 200-sccm, the pressure of the reaction chamber is 80-120mbar, the temperature of the reaction chamber is 700-900 ℃, the microwave power is 1500-3000W, the methane concentration is 0.1-1% and the treatment time is 10-60 min.
6. The method of manufacturing according to claim 1, wherein the cooling process is performed on the sample obtained after the hybrid termination process is completed, and obtaining the hybrid termination diamond includes:
and after the mixed terminal is processed, keeping the hydrogen flow in the cavity of the microwave plasma chemical vapor deposition system unchanged, stopping introducing methane and turning off a microwave power supply, and cooling the sample obtained after the mixed terminal is processed for 10-30min to obtain the mixed terminal diamond.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110789451.8A CN113725075B (en) | 2021-07-13 | 2021-07-13 | Preparation method of diamond mixed terminal surface conductance |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110789451.8A CN113725075B (en) | 2021-07-13 | 2021-07-13 | Preparation method of diamond mixed terminal surface conductance |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN113725075A true CN113725075A (en) | 2021-11-30 |
| CN113725075B CN113725075B (en) | 2024-01-09 |
Family
ID=78673220
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110789451.8A Active CN113725075B (en) | 2021-07-13 | 2021-07-13 | Preparation method of diamond mixed terminal surface conductance |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113725075B (en) |
Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2827079A1 (en) * | 2001-07-04 | 2003-01-10 | Alstom | Production of diamond substrate comprises use of silicon slice as support for chemical vapor deposition of diamond and elimination of silicon slice by chemical attack |
| JP2007078373A (en) * | 2005-09-12 | 2007-03-29 | National Institute Of Advanced Industrial & Technology | pH SENSOR COMPRISING ISFET AND METHOD OF MANUFACTURING SAME |
| JP2007253410A (en) * | 2006-03-22 | 2007-10-04 | Toppan Printing Co Ltd | Imprinting mold and its manufacturing method |
| JP2009120929A (en) * | 2007-11-19 | 2009-06-04 | National Institute Of Advanced Industrial & Technology | Seeding treatment method to substrate, diamond fine structure, and method for producing the same |
| US8157914B1 (en) * | 2007-02-07 | 2012-04-17 | Chien-Min Sung | Substrate surface modifications for compositional gradation of crystalline materials and associated products |
| US20170260625A1 (en) * | 2016-03-08 | 2017-09-14 | Ii-Vi Incorporated | Substrate Comprising a Layer of Silicon and a Layer of Diamond having an Optically Finished (or a Dense) Silicon-Diamond Interface |
| CN107275192A (en) * | 2017-07-10 | 2017-10-20 | 北京科技大学 | High-performance diamond method for semiconductor is prepared based on inexpensive single-crystal diamond |
| US20180327927A1 (en) * | 2016-09-30 | 2018-11-15 | Zhejiang University Of Technology | ULTRA SMALL GRAIN-SIZE NANOCRYSTALLINE DIAMOND FILM HAVING A SiV PHOTOLUMINESCENCE AND MANUFACTURING METHOD THEREOF |
| JP2020047665A (en) * | 2018-09-14 | 2020-03-26 | 株式会社東芝 | Semiconductor device, manufacturing method thereof, inverter circuit, drive device, vehicle, and elevator |
| US20200325574A1 (en) * | 2019-04-11 | 2020-10-15 | California Institute Of Technology | Single-step direct growth of large-area graphene and graphene-based nanostructures on silicon by plasma-enhanced chemical vapor deposition |
-
2021
- 2021-07-13 CN CN202110789451.8A patent/CN113725075B/en active Active
Patent Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2827079A1 (en) * | 2001-07-04 | 2003-01-10 | Alstom | Production of diamond substrate comprises use of silicon slice as support for chemical vapor deposition of diamond and elimination of silicon slice by chemical attack |
| JP2007078373A (en) * | 2005-09-12 | 2007-03-29 | National Institute Of Advanced Industrial & Technology | pH SENSOR COMPRISING ISFET AND METHOD OF MANUFACTURING SAME |
| JP2007253410A (en) * | 2006-03-22 | 2007-10-04 | Toppan Printing Co Ltd | Imprinting mold and its manufacturing method |
| US8157914B1 (en) * | 2007-02-07 | 2012-04-17 | Chien-Min Sung | Substrate surface modifications for compositional gradation of crystalline materials and associated products |
| JP2009120929A (en) * | 2007-11-19 | 2009-06-04 | National Institute Of Advanced Industrial & Technology | Seeding treatment method to substrate, diamond fine structure, and method for producing the same |
| US20170260625A1 (en) * | 2016-03-08 | 2017-09-14 | Ii-Vi Incorporated | Substrate Comprising a Layer of Silicon and a Layer of Diamond having an Optically Finished (or a Dense) Silicon-Diamond Interface |
| US20180327927A1 (en) * | 2016-09-30 | 2018-11-15 | Zhejiang University Of Technology | ULTRA SMALL GRAIN-SIZE NANOCRYSTALLINE DIAMOND FILM HAVING A SiV PHOTOLUMINESCENCE AND MANUFACTURING METHOD THEREOF |
| CN107275192A (en) * | 2017-07-10 | 2017-10-20 | 北京科技大学 | High-performance diamond method for semiconductor is prepared based on inexpensive single-crystal diamond |
| JP2020047665A (en) * | 2018-09-14 | 2020-03-26 | 株式会社東芝 | Semiconductor device, manufacturing method thereof, inverter circuit, drive device, vehicle, and elevator |
| US20200325574A1 (en) * | 2019-04-11 | 2020-10-15 | California Institute Of Technology | Single-step direct growth of large-area graphene and graphene-based nanostructures on silicon by plasma-enhanced chemical vapor deposition |
Non-Patent Citations (1)
| Title |
|---|
| 刘学杰;乔海懋;: "硅掺杂金刚石薄膜形成过程的研究", 内蒙古科技大学学报, no. 02 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN113725075B (en) | 2024-01-09 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP4387355B2 (en) | Impurity introduction method | |
| CN109671612B (en) | Gallium oxide semiconductor structure and preparation method thereof | |
| EP0445754B1 (en) | Method for growing a diamond or c-BN thin film | |
| CN106711022B (en) | A kind of preparation method of growth doped interface clearly silicon carbide epitaxial film | |
| CN104867818B (en) | A kind of method for reducing silicon carbide epitaxy material defect | |
| CN104862663B (en) | A kind of method for improving boron dopen Nano diamond thin p-type conductivity energy | |
| CN100483626C (en) | P type doping method for cubic boron nitride thin film | |
| CN215560802U (en) | Substrate table bearing device for preparing single crystal diamond through MPCVD | |
| CN104947184A (en) | Method for growing grapheme on epitaxy of large-diameter 4H/6H-SiC silicon surface substrate based on in-situ Si atmosphere action | |
| JP5269414B2 (en) | Membrane manufacturing method, purified membrane manufacturing method and apparatus using atmospheric pressure hydrogen plasma | |
| CN110565066B (en) | Co-doped diamond, preparation method thereof, semiconductor material and device | |
| CN113725075B (en) | Preparation method of diamond mixed terminal surface conductance | |
| CN112201568A (en) | Method and equipment for epitaxial growth of silicon wafer | |
| CN107731915B (en) | Semiconductor device and method for forming diamond p-type conductive channel by utilizing abrupt heterojunction | |
| CN109534328B (en) | Two-dimensional nitrogen-doped graphene and preparation method thereof | |
| TWI404129B (en) | Method for manufacturing carbon film with semiconductor properties | |
| KR100253115B1 (en) | Fabrication method of n type semiconductor | |
| KR100885690B1 (en) | A method of producing a diamond film and a diamond film produced thereby | |
| CN114188362A (en) | SOI (silicon on insulator) with special structure and preparation method thereof | |
| CN109378312B (en) | Body-doped diamond-based normally-off field effect transistor and preparation method thereof | |
| CN109881248B (en) | Nitrogen and sulfur co-doped n-type semiconductor diamond material and preparation method thereof | |
| CN111146146B (en) | Preparation method of high-efficiency heat-dissipation semiconductor substrate with reusable base | |
| JP2021082765A (en) | Silicon carbide polycrystalline film, and manufacturing method and deposition apparatus therefor | |
| CN113394090B (en) | Manufacturing method of n-type 4H-SiC ohmic contact with low resistivity | |
| JP6472016B2 (en) | Method for manufacturing silicon carbide semiconductor device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |