CN104867818B - A kind of method for reducing silicon carbide epitaxy material defect - Google Patents

A kind of method for reducing silicon carbide epitaxy material defect Download PDF

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CN104867818B
CN104867818B CN201510153852.9A CN201510153852A CN104867818B CN 104867818 B CN104867818 B CN 104867818B CN 201510153852 A CN201510153852 A CN 201510153852A CN 104867818 B CN104867818 B CN 104867818B
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silicon carbide
epitaxial growth
epitaxy material
material defect
carbide epitaxy
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CN104867818A (en
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芦伟立
冯志红
李佳
刘庆彬
蔚翠
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CETC 13 Research Institute
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/0445Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering

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Abstract

The invention discloses a kind of method for reducing silicon carbide epitaxy material defect, it is related to technical field of semiconductor device;Comprise the following steps:(1)Substrate prepares:Silicon carbide substrates are chosen, standard cleaning are carried out to it stand-by;(2)Preliminary epitaxial growth:Preliminary epitaxial growth is carried out compared with thin epitaxial layer with chemical vapour deposition technique on silicon carbide substrates;(3)In-situ annealing:Epitaxial growth source is cut off, equipment reaction chamber is vacuumized, under the conditions of 1650 DEG C~2000 DEG C, to step(2)The sample delayed outside is made annealing treatment;(4)Epitaxial growth again:To step(3)Sample after annealing, carries out epitaxial growth again, to required thickness.The present invention can be substantially reduced the residual stress in epitaxial layer, effectively reduce substrate and propagate defect in epitaxial layer, obtain the small high-quality silicon carbide epitaxy material of defect concentration.

Description

A kind of method for reducing silicon carbide epitaxy material defect
Technical field
The present invention relates to technical field of semiconductor device.
Background technology
Compared with the conventional semiconductor material of silicon and GaAs for representative, carborundum(SiC)Partly led as a kind of broad stopband Body material, with outstanding advantages such as high heat conductance, high breakdown electric field, high saturated electrons drift speed and high bonding energies, its is excellent Performance disclosure satisfy that modern electronic technology to the requirement in terms of high temperature, high frequency, high power and radioresistance.
The quality of silicon carbide body material and surface can't meet the requirement of directly manufacture device, and in SiC wafer tables The silicon carbide epitaxial layers of face epitaxial growth have higher quality, its electric property be better than SiC wafers, and its concentration controllability and It is repeatable more preferable.The method of epitaxial growth carborundum has many kinds, wherein chemical vapour deposition technique(CVD)Growing technology due to Its favorable repeatability, film quality is good and the relatively high advantage of production efficiency, produces SiC epitaxial films in enormous quantities as current The widely used method of institute.In epitaxial process, the partial dislocation defect in SiC substrate can be extended in epitaxial layer, therefore outside SiC Prolong and several dislocation defects are still had in material.Crystal defect in material bodies also results in SiC epitaxial layer Surface Creation surface Pattern defect, such as " triangle " defect, " carrot " defect.
The content of the invention
The technical problems to be solved by the invention are to provide a kind of method for reducing silicon carbide epitaxy material defect, Neng Gouxian The residual stress reduced in epitaxial layer is write, substrate is effectively reduced and propagates defect in epitaxial layer, obtain small high-quality of defect concentration Silicon carbide epitaxy material.
In order to solve the above technical problems, the technical solution used in the present invention is:
A kind of method for reducing silicon carbide epitaxy material defect, comprises the following steps:
(1)Substrate prepares:Silicon carbide substrates are chosen, standard cleaning are carried out to it stand-by;
(2)Preliminary epitaxial growth:Preliminary epitaxial growth is carried out with chemical vapour deposition technique on silicon carbide substrates relatively thin outer Prolong layer;
(3)In-situ annealing:Epitaxial growth source is cut off, equipment reaction chamber is vacuumized, it is right under the conditions of 1650~2000 DEG C Step(2)The sample delayed outside is made annealing treatment;
(4)Epitaxial growth again:To step(3)Sample after annealing, carries out epitaxial growth again, to required thickness.
Further technical scheme, step(2)In the thickness of relatively thin epitaxial layer of preliminary epitaxial growth be 1 μm~10 μm.
Further technical scheme, the step(2)Or step(4)In epitaxial growth temperature be 1300 DEG C~1650 DEG C, epitaxial growth pressure is 100mbar~900mbar, and carrier gas hydrogen flowing quantity is 5 slm~60slm.
Further technical scheme, the step(3)In annealing time be 0.5h~5h.
Further technical scheme, the step(2)Middle epitaxial growth time 1min~60min.
Further technical scheme, the step(4)The middle HCl gases for adding different flow, to reduce impurity to extension Piece stain.
Further technical scheme, the step(2)Or step(4)Middle carbon growth source is propane, ethene, monochloro methane A kind of or combination.
Further technical scheme, the step(2)Or step(4)Middle silicon growth source is silane, dichlorosilane, trichlorine silicon One kind of alkane or combination.
Further technical scheme, the step(2)Or step(4)Middle n-type doping source is nitrogen, and p-type doped source is three Aluminium methyl.
Further technical scheme, the step(2)Or step(4)Middle p-type doped source is trimethyl aluminium.
It is using the beneficial effect produced by above-mentioned technical proposal:The present invention carries out preliminary epitaxial growth first, grows Epitaxial film is heated to high temperature compared with thin epitaxial layer, then under vacuum, is annealed, its interior atom can be diffused and again New arrangement, thus triggers the movement of dislocation, so as to reduce the residual stress in SiC material, effectively reduces substrate and propagates epitaxial layer Middle defect;After growth is compared with thin epitaxial layer and annealing, then carry out epitaxial growth again to required thickness, it is to avoid in substrate defect to Epitaxial layer extends, so as to obtain the small high-quality silicon carbide epitaxy material of defect concentration.
Brief description of the drawings
Fig. 1 is heating temperature curve schematic diagram of the present invention.
Embodiment
The present invention is further detailed explanation with reference to the accompanying drawings and detailed description.
Embodiment 1:
(1)Substrate prepares, and chooses 4 cun partially<11-20>(0001) silicon face silicon carbide substrates in 4 ° of direction, rower is entered to it Quasi- cleaning is stand-by.
(2)Put silicon carbide substrates into CVD equipment reative cell and be evacuated to<5×10-6 mbar。
(3)Preliminary epitaxial growth:1600 are warming up under conditions of carrier gas hydrogen flowing quantity 60slm and pressure 100mbar DEG C, it is passed through the silane growth sccm of source flux 15, propane the growth sccm of source flux 5, the min of epitaxial growth time 10, nitrogen doped Flow 50sccm.
(4)In-situ annealing:Epitaxial growth source is cut off, CVD equipment cavity is vacuumized, temperature is warming up to 1700 DEG C and protected Warm 1h, to step(2)The sample delayed outside is made annealing treatment.
(5)Epitaxial growth again:To step(3)Sample after annealing, is naturally cooling to epitaxial growth temperature, carries out again outer Epitaxial growth.1600 DEG C of epitaxial growth temperature, epitaxial growth pressure 100mbar, carrier gas hydrogen flowing quantity 60slm, silane flow rate 30 Sccm, the sccm of propane flow 10, the min of epitaxial growth time 120, obtain thickness SiC epitaxial materials.
Embodiment 2:
(1)Substrate prepares, and chooses 4 cun partially<11-20>(000-1) the carbon face silicon carbide substrates in 8 ° of direction, rower is entered to it Quasi- cleaning is stand-by.
(2)Put silicon carbide substrates into CVD equipment reative cell and be evacuated to<5×10-6 mbar。
(3)Preliminary epitaxial growth:1600 DEG C are warming up under conditions of carrier gas hydrogen flowing quantity 60slm and pressure 100mbar, It is passed through the silane growth sccm of source flux 30, propane growth source flux 10sccm, the min of epitaxial growth time 20, nitrogen doped stream Measure 200 sccm.
(4)In-situ annealing:Epitaxial growth source is cut off, CVD equipment cavity is vacuumized, temperature is warming up to 1800 DEG C and is incubated 0.5h, to step(2)The sample delayed outside is made annealing treatment.
(5)Epitaxial growth again:To step(3)Sample after annealing, is naturally cooling to epitaxial growth temperature, carries out extension again Growth.1600 DEG C of epitaxial growth temperature, epitaxial growth pressure 100mbar, carrier gas hydrogen flowing quantity 60slm, silane flow rate 90 Sccm, propane flow 30 sccm, HCl flow 300sccm, the min of epitaxial growth time 180, obtain thickness SiC epitaxial materials.
Embodiment 3:
(1)Substrate prepares, and chooses 4 cun partially<11-20>(0001) silicon face silicon carbide substrates in 4 ° of direction, rower is entered to it Quasi- cleaning is stand-by.
(2)Put silicon carbide substrates into CVD equipment reative cell and be evacuated to<5×10-6 mbar。
(3)Preliminary epitaxial growth:1300 DEG C are warming up under conditions of carrier gas hydrogen flowing quantity 5slm and pressure 100mbar, It is passed through the silane growth sccm of source flux 15, propane the growth sccm of source flux 5, the min of epitaxial growth time 60, nitrogen doped stream Measure 50sccm.
(4)In-situ annealing:Epitaxial growth source is cut off, CVD equipment cavity is vacuumized, temperature is warming up to 1650 DEG C and protected Warm 0.5h, to step(2)The sample delayed outside is made annealing treatment.
(5)Epitaxial growth again:To step(3)Sample after annealing, is naturally cooling to epitaxial growth temperature, carries out again outer Epitaxial growth.1300 DEG C of epitaxial growth temperature, epitaxial growth pressure 100mbar, carrier gas hydrogen flowing quantity 5slm, silane flow rate 30 Sccm, the sccm of propane flow 10, the min of epitaxial growth time 120, obtain thickness SiC epitaxial materials.
Embodiment 4:
(1)Substrate prepares, and chooses 4 cun partially<11-20>(0001) silicon face silicon carbide substrates in 4 ° of direction, rower is entered to it Quasi- cleaning is stand-by.
(2)Put silicon carbide substrates into CVD equipment reative cell and be evacuated to<5×10-6 mbar。
(3)Preliminary epitaxial growth:1650 are warming up under conditions of carrier gas hydrogen flowing quantity 60slm and pressure 100mbar DEG C, it is passed through the silane growth sccm of source flux 15, propane the growth sccm of source flux 5, the min of epitaxial growth time 60, nitrogen doped Flow 50sccm.
(4)In-situ annealing:Epitaxial growth source is cut off, CVD equipment cavity is vacuumized, temperature is warming up to 2000 DEG C and protected Warm 5h, to step(2)The sample delayed outside is made annealing treatment.
(5)Epitaxial growth again:To step(3)Sample after annealing, is naturally cooling to epitaxial growth temperature, carries out again outer Epitaxial growth.1650 DEG C of epitaxial growth temperature, epitaxial growth pressure 100mbar, carrier gas hydrogen flowing quantity 60slm, silane flow rate 30 Sccm, the sccm of propane flow 10, the min of epitaxial growth time 120, obtain thickness SiC epitaxial materials.
As shown in figure 1, a kind of heating temperature curve schematic diagram for the method for reducing silicon carbide epitaxy material defect, epitaxial growth When, growth temperature is 1300 DEG C~1650 DEG C, and temperature is warming up to 1650 DEG C~2000 DEG C progress in-situ annealings after epitaxial growth, makes Epitaxial layer atom is diffused and rearranged, and triggers the movement of dislocation, reduces the residual stress in SiC material, then carries out Epitaxial growth again.The present invention can effectively reduce substrate and propagate defect in epitaxial layer, obtain the small high-quality carbonization of defect concentration Silicon epitaxial material.

Claims (10)

1. a kind of method for reducing silicon carbide epitaxy material defect, it is characterised in that comprise the following steps:
(1)Substrate prepares:Silicon carbide substrates are chosen, standard cleaning are carried out to it stand-by;
(2)Preliminary epitaxial growth:Preliminary epitaxial growth is carried out compared with thin epitaxy with chemical vapour deposition technique on silicon carbide substrates Layer;
(3)In-situ annealing:Epitaxial growth source is cut off, equipment reaction chamber is vacuumized, it is right under the conditions of 1650 DEG C~2000 DEG C Step(2)The sample delayed outside is made annealing treatment;
(4)Epitaxial growth again:To step(3)Sample after annealing, carries out epitaxial growth again, to required thickness.
2. a kind of method for reducing silicon carbide epitaxy material defect according to claim 1, it is characterised in that step(2)In The thickness of the relatively thin epitaxial layer of preliminary epitaxial growth is 1 μm~10 μm.
3. a kind of method for reducing silicon carbide epitaxy material defect according to claim 1, it is characterised in that the step (2)Or step(4)In epitaxial growth temperature be 1300 DEG C~1650 DEG C, epitaxial growth pressure be 100 mbar~900mbar, Carrier gas hydrogen flowing quantity is 5 slm~60slm.
4. a kind of method for reducing silicon carbide epitaxy material defect according to claim 1, it is characterised in that the step (3)In annealing time be 0.5h~5h.
5. a kind of method for reducing silicon carbide epitaxy material defect according to claim 1, it is characterised in that the step (2)Middle epitaxial growth time 1min~60min.
6. a kind of method for reducing silicon carbide epitaxy material defect according to claim 1, it is characterised in that the step (4)The middle HCl gases for adding different flow.
7. a kind of method for reducing silicon carbide epitaxy material defect according to claim 1, it is characterised in that the step (2)Or step(4)Middle carbon growth source is propane, ethene, one kind of monochloro methane or combination.
8. a kind of method for reducing silicon carbide epitaxy material defect according to claim 1, it is characterised in that the step (2)Or step(4)Middle silicon growth source is silane, dichlorosilane, one kind of trichlorosilane or combination.
9. a kind of method for reducing silicon carbide epitaxy material defect according to claim 1, it is characterised in that the step (2)Or step(4)Middle n-type doping source is nitrogen.
10. a kind of method for reducing silicon carbide epitaxy material defect according to claim 1, it is characterised in that the step (2)Or step(4)Middle p-type doped source is trimethyl aluminium.
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CN105869996A (en) * 2016-04-25 2016-08-17 全球能源互联网研究院 Silicon carbide epitaxial growth system and growth method thereof
CN106803479B (en) * 2016-12-26 2019-06-14 中国电子科技集团公司第五十五研究所 A kind of preparation method for the silicon carbide epitaxial wafer improving effective area
CN110117814A (en) * 2018-02-05 2019-08-13 西安电子科技大学 The preparation method of silicon carbide epitaxy with low-density C vacancy defect
CN110079996B (en) * 2019-05-24 2021-08-13 中国人民解放军国防科技大学 Method for repairing surface defects of silicon carbide fibers and silicon carbide fibers repaired by same
CN114892273A (en) * 2022-04-29 2022-08-12 希科半导体科技(苏州)有限公司 Silicon carbide epitaxial layer growth method
CN116411252A (en) * 2023-04-13 2023-07-11 重庆臻宝科技股份有限公司 Method for solving SiC edge ring interface and stress in regeneration process of CVD method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1938820A (en) * 2004-03-26 2007-03-28 关西电力株式会社 Bipolar semiconductor device and process for producing the same
CN101246899A (en) * 2008-03-20 2008-08-20 中国电子科技集团公司第十三研究所 Secondary extension structure of silicon carbide

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4777676B2 (en) * 2005-03-23 2011-09-21 本田技研工業株式会社 Junction type semiconductor device and method of manufacturing junction type semiconductor device
JP4946264B2 (en) * 2006-08-23 2012-06-06 日立金属株式会社 Method for manufacturing silicon carbide semiconductor epitaxial substrate
WO2008120469A1 (en) * 2007-03-29 2008-10-09 Panasonic Corporation Method for manufacturing silicon carbide semiconductor element

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1938820A (en) * 2004-03-26 2007-03-28 关西电力株式会社 Bipolar semiconductor device and process for producing the same
CN101246899A (en) * 2008-03-20 2008-08-20 中国电子科技集团公司第十三研究所 Secondary extension structure of silicon carbide

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