CN113707630A - MCM encapsulation structure and manufacturing method thereof - Google Patents

MCM encapsulation structure and manufacturing method thereof Download PDF

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Publication number
CN113707630A
CN113707630A CN202110991105.8A CN202110991105A CN113707630A CN 113707630 A CN113707630 A CN 113707630A CN 202110991105 A CN202110991105 A CN 202110991105A CN 113707630 A CN113707630 A CN 113707630A
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layer
type
sub
die
mth
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杨磊
王鑫璐
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SIPLP Microelectronics Chongqing Ltd
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SIPLP Microelectronics Chongqing Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/4824Pads with extended contours, e.g. grid structure, branch structure, finger structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568Temporary substrate used as encapsulation process aid
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/03Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/023Redistribution layers [RDL] for bonding areas
    • H01L2224/0231Manufacturing methods of the redistribution layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/023Redistribution layers [RDL] for bonding areas
    • H01L2224/0233Structure of the redistribution layers
    • H01L2224/02331Multilayer structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/023Redistribution layers [RDL] for bonding areas
    • H01L2224/0237Disposition of the redistribution layers
    • H01L2224/02371Disposition of the redistribution layers connecting the bonding area on a surface of the semiconductor or solid-state body with another surface of the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/023Redistribution layers [RDL] for bonding areas
    • H01L2224/0237Disposition of the redistribution layers
    • H01L2224/02381Side view

Abstract

The invention provides an MCM encapsulation structure and a manufacturing method thereof, wherein the MCM encapsulation structure comprises: the semiconductor device comprises a first type bare chip, a second type bare chip, a plastic package layer, a first rewiring layer and a second rewiring layer; the first type die includes a number of first pads; the second type die includes a number of second pads; the plastic packaging layer wraps the first type bare chip and the second type bare chip, and the front surface of the plastic packaging layer exposes the first bonding pad and the second bonding pad; the first rewiring layer comprises a first sub-rewiring layer and a second sub-rewiring layer, the first sub-rewiring layer is offset along with the actual position of the first type of bare chip, and the second sub-rewiring layer is offset along with the actual position of the second type of bare chip; the second redistribution layer electrically connects the first sub-redistribution layer and the second sub-redistribution layer and is determined based on a theoretical position of the first type of die and a theoretical position of the second type of die. The maximum offset of the first type die and the second type die can be increased, and reliable electric connection between the bonding pads of the various types of dies is guaranteed.

Description

MCM encapsulation structure and manufacturing method thereof
Technical Field
The invention relates to the technical field of semiconductors, in particular to an MCM (Multi-chip Module) packaging structure and a manufacturing method thereof.
Background
In the packaging process, dies with different functions are often packaged in a packaging structure to form a specific function, which is called a Multi-Chip Module (MCM), and has the advantages of small size, high reliability, high performance, and multiple functions.
In recent years, with the continuous development of circuit integration technology, electronic products are increasingly developed toward miniaturization, intellectualization, high integration, high performance and high reliability. The packaging technique not only affects the performance of the product, but also restricts the miniaturization of the product.
In the MCM package structure, the integration level of the product is generally improved by further wiring layers. However, in the reliability test of the MCM package structure, the yield of the packaged product is found to be low.
Disclosure of Invention
The invention aims to provide an MCM (Multi-chip Module) packaging structure and a manufacturing method thereof, so as to improve the yield of products.
To achieve the above object, a first aspect of the present invention provides an MCM package structure, including:
a first type die including a number of first bonding pads, the first bonding pads located on an active side of the first type die; the first type die has a first actual position and a first theoretical position, the first actual position having an offset relative to the first theoretical position;
a second type die comprising a number of second bonding pads, the second bonding pads being located on an active side of the second type die; the second type die has a second actual position and a second theoretical position, the second actual position having an offset relative to the second theoretical position;
a molding compound layer which covers the first type bare chip and the second type bare chip; the plastic packaging layer comprises a front surface and a back surface which are opposite, and the first bonding pad and the second bonding pad are exposed on the front surface of the plastic packaging layer;
the first rewiring layer is positioned on one side of the front surface of the plastic packaging layer; the first redistribution layer comprises a first sub-redistribution layer and a second sub-redistribution layer, the first sub-redistribution layer is electrically connected with the first bonding pad and is deviated along with the first actual position, and the second sub-redistribution layer is electrically connected with the second bonding pad and is deviated along with the second actual position;
a first dielectric layer embedding the first rewiring layer;
a second rewiring layer on the first dielectric layer; the second redistribution layer electrically connects the first sub-redistribution layer and the second sub-redistribution layer, and the second redistribution layer is determined based on the first theoretical position of the first type of die and the second theoretical position of the second type of die.
Optionally, in the first redistribution layer, the first sub-redistribution layer is electrically insulated from the second sub-redistribution layer.
Optionally, the first sub redistribution layer and the second sub redistribution layer respectively include one metal pattern layer, or the first sub redistribution layer and the second sub redistribution layer respectively include two or more metal pattern layers.
Optionally, each metal pattern layer of the first sub-redistribution layer includes first type metal pattern blocks, the first type metal pattern blocks are arranged in one-to-one correspondence with the first pads and are equal in number, and the area of at least one first type metal pattern block is larger than the area of the corresponding first pad; each metal pattern layer of the second sub-rewiring layer comprises second type metal pattern blocks, the second type metal pattern blocks and the second bonding pads are arranged in a one-to-one correspondence mode, the number of the second type metal pattern blocks is equal to that of the second bonding pads, and the area of at least one second type metal pattern block is larger than that of the corresponding second bonding pad.
Optionally, the MCM package structure further includes: an M type bare chip, wherein M is any positive integer greater than or equal to 3 and less than or equal to N; the Mth type die comprises a plurality of Mth bonding pads, and the Mth bonding pads are positioned on the active surface of the Mth type die;
the molding compound layer covers the M type bare chip, and the front surface of the molding compound layer exposes the N bonding pad; the Mth type die has an Mth actual position and an Mth theoretical position, the Mth actual position having an offset relative to the Mth theoretical position;
the first redistribution layer further comprises an Mth sub-redistribution layer, and the Mth sub-redistribution layer is electrically connected with the Mth bonding pad and is deviated along with the Mth actual position;
the second redistribution layer is also electrically connected to the Mth sub-redistribution layer, and the second redistribution layer is determined based on the first theoretical position of the first type of die, the second theoretical position of the second type of die, … …, and an Nth theoretical position of the Nth type of die.
Optionally, the first type of die is the same as or different from the second type of die.
Optionally, the MCM package structure further includes:
a second dielectric layer embedding the second rewiring layer;
a conductive bump on the second dielectric layer; the conductive bump is electrically connected with the second rewiring layer, and the conductive bump is an external connection end of the MCM package structure.
Optionally, the conductive bump is coated with an oxidation resistant layer.
A second aspect of the present invention provides a method for manufacturing an MCM package structure, including:
providing a carrier plate and bearing in at least one group of to-be-molded parts of the carrier plate, wherein each group of to-be-molded parts at least comprises: a first type die and a second type die; the first type die comprises a plurality of first bonding pads, and the first bonding pads are positioned on the active surface of the first type die; the second type die comprises a plurality of second bonding pads, and the second bonding pads are positioned on the active surface of the second type die; an active face of the first type die and an active face of the second type die face the carrier plate;
forming a plastic package layer for embedding each group of the parts to be plastic-packaged on the surface of the carrier plate; removing the carrier plate to expose the active surface of each of the first type bare chips, the active surface of each of the second type bare chips and the front surface of the plastic packaging layer; each of the first type dies has a respective first actual position and a respective first theoretical position, the first actual position having an offset relative to the first theoretical position; each die of the second type having a respective second actual position and a respective second theoretical position, the second actual position having an offset relative to the second theoretical position;
forming a first redistribution layer on a front side of the molding compound layer based on the first actual position of each of the first type dies and the second actual position of each of the second type dies; forming a first dielectric layer embedding the first rewiring layer;
forming a second re-routing layer on the first dielectric layer based on the first theoretical location of each of the first type dies and the second theoretical location of each of the second type dies.
Optionally, after the step of forming the second redistribution layer, the method further includes: and cutting to form MCM packaging structures, wherein each MCM packaging structure comprises a group of the parts to be molded.
Optionally, the step of forming a first redistribution layer on the front side of the molding compound layer based on the first actual position of each of the first type dies and the second actual position of each of the second type dies includes:
forming a first sub-rewiring layer on one side of the front surface of the plastic packaging layer based on the first actual position of each first type bare chip; forming a second sub-redistribution layer on the front side of the molding compound layer, electrically insulated from the first sub-redistribution layer in this step, based on the second actual position of each of the second type of die; the first sub-rewiring layer and the second sub-rewiring layer together constitute the first rewiring layer;
the step of forming a second re-routing layer on the first dielectric layer based on the first theoretical location of each of the first type of die and the second theoretical location of each of the second type of die comprises:
forming a second re-routing layer on the first dielectric layer that electrically connects the first sub-re-routing layer corresponding to the first type of die within a group with the second sub-re-routing layer corresponding to the second type of die based on the first theoretical position of each of the first type of die and the second theoretical position of each of the second type of die.
Optionally, the first sub redistribution layer and the second sub redistribution layer are manufactured in the same process or sequentially manufactured in different processes.
Optionally, the formed first sub-redistribution layer and the formed second sub-redistribution layer respectively include one metal pattern layer, or the formed first sub-redistribution layer and the formed second sub-redistribution layer respectively include two or more metal pattern layers.
Optionally, each metal pattern layer of the first sub-redistribution layer includes first type metal pattern blocks, the first type metal pattern blocks are arranged in one-to-one correspondence with the first pads and are equal in number, and the area of at least one first type metal pattern block is larger than the area of the corresponding first pad; each metal pattern layer of the second sub-rewiring layer comprises second type metal pattern blocks, the second type metal pattern blocks and the second bonding pads are arranged in a one-to-one correspondence mode, the number of the second type metal pattern blocks is equal to that of the second bonding pads, and the area of at least one second type metal pattern block is larger than that of the corresponding second bonding pad.
Optionally, each group of the to-be-molded parts further includes: an M type bare chip, wherein M is any positive integer greater than or equal to 3 and less than or equal to N; the Mth type die comprises a plurality of Mth bonding pads, and the Mth bonding pads are positioned on the active surface of the Mth type die;
the molding compound layer covers the M type bare chip, and the front surface of the molding compound layer exposes the M bonding pad; the Mth type die has an Mth actual position and an Mth theoretical position, the Mth actual position having an offset relative to the Mth theoretical position;
forming a first redistribution layer on a front side of the molding compound layer based on the first actual position of each of the first type dies, the second actual position of each of the second type dies, … …, and the Nth actual position of each of the Nth type dies;
forming a second re-routing layer on the first dielectric layer based on the first theoretical location of each of the first type die, the second theoretical location of each of the second type die, … …, and the nth theoretical location of each of the nth type die.
Optionally, the step of forming a first redistribution layer on the front side of the molding compound layer based on the first actual position of each of the first type dies, the second actual position of each of the second type dies, … …, and the nth actual position of each of the nth type dies includes:
forming a first sub-rewiring layer on one side of the front surface of the plastic packaging layer based on the first actual position of each first type bare chip; forming a second sub-redistribution layer on the front side of the molding compound layer, electrically insulated from the first sub-redistribution layer in this step, based on the second actual position of each of the second type of die; … … forming an Mth sub-redistribution layer on the front side of the molding layer electrically insulated from the first sub-redistribution layer, the second sub-redistribution layer, … … the M-1 st sub-redistribution layer at this step based on the Mth actual position of each of the Mth type dies; the first sub-redistribution layer, the second sub-redistribution layer, … …, and the nth sub-redistribution layer collectively form the first redistribution layer;
the step of forming a second re-routing layer on the first dielectric layer based on the first theoretical location of each of the first type die, the second theoretical location of each of the second type die, … …, and the nth theoretical location of each of the nth type die comprises:
forming a second re-routing layer on the first dielectric layer that electrically connects the first sub-re-routing layer corresponding to the first type die, the second sub-re-routing layer corresponding to the second type die, … …, and the nth sub-re-routing layer corresponding to the nth type die within a group based on the first theoretical position of each of the first type die, the second theoretical position of each of the second type die, … …, and the mth theoretical position of each of the mth type die.
Optionally, after the step of forming the second redistribution layer, the method further includes:
forming a second dielectric layer embedding the second rewiring layer;
and forming a conductive bump on the second dielectric layer, wherein the conductive bump is electrically connected with the second rewiring layer and is an external connecting end of the MCM package structure.
The inventor analyzes that one reason for the low yield of the MCM package structure is that: in the process of transferring each type bare chip to the carrier plate, because the active surface of each type bare chip faces the carrier plate, only the center point of each bare chip can be estimated for pasting, plastic package expansion and contraction, and other reasons, so that offset exists between the actual position and the theoretical position of each type bare chip after plastic package, for example, the first type bare chip is offset to the left by a certain amount, and the second type bare chip is offset to the right by a certain amount; the design pattern of the redistribution layer electrically connected with each type of bare chip is fixed and is determined according to the theoretical position of each type of bare chip, namely the size and the position of each section of metal pattern are fixed, so that after the redistribution layer is manufactured, a certain section of metal pattern can be electrically connected with a bonding pad of one bare chip, but can be in short circuit or open circuit with a bonding pad of another bare chip, and the like. The above problem is more pronounced especially when the critical dimension of the design pattern of the redistribution layer is small.
Based on the above analysis, after each type of bare chip is plastically packaged, before the second redistribution layer electrically connected to each type of bare chip is manufactured, the first redistribution layer is manufactured on the plastic packaging layer, the first redistribution layer includes the first sub-redistribution layer and the second sub-redistribution layer, the first sub-redistribution layer is electrically connected to the first bonding pad and is shifted along with the actual position of the first type of bare chip, and the second sub-redistribution layer is electrically connected to the second bonding pad and is shifted along with the actual position of the second type of bare chip. In other words, the first redistribution layer is fabricated based on the first actual position of each first type die and the second actual position of each second type die; the second redistribution layer is fabricated based on the first theoretical location of each of the first type dies and the second theoretical location of each of the second type dies.
Compared with the prior art, the invention has the beneficial effects that: although the pattern position of the first sub-rewiring layer is shifted together with the actual position of the first type die, and the pattern position of the second sub-rewiring layer is shifted together with the actual position of the second type die, the pattern area of the first sub-rewiring layer may be designed to be larger than the area of the first pad, the pattern area of the second sub-rewiring layer may be designed to be larger than the area of the second pad, and when the second rewiring layer is determined based on the theoretical position of the first type die and the theoretical position of the second type die, the maximum shift amount of the actual position of the first type die with respect to the theoretical position thereof may be increased, and the maximum shift amount of the actual position of the second type die with respect to the theoretical position thereof may be increased. Within the maximum offset range, reliable electric connection between the bonding pads of the various types of bare chips can be ensured.
Drawings
Fig. 1 is a schematic cross-sectional structure diagram of an MCM package structure of a first embodiment of the invention;
FIG. 2 is a flow chart of a method of fabricating the MCM package structure of FIG. 1;
3-8, 10 are intermediate schematic diagrams corresponding to the flow in FIG. 2;
FIG. 9 is a schematic view of a comparative structure;
FIG. 11 is a schematic cross-sectional structure view of a MCM package structure of a second embodiment of the invention;
fig. 12 is a schematic cross-sectional structure of an MCM package structure of a third embodiment of the invention.
To facilitate an understanding of the invention, all reference numerals appearing in the invention are listed below:
MCM package structure 1, 2, 3 first type die 11
First bonding pad 111 backside 11b of first type die
Active surface 11a of a first type die a second type die 12
Second pads 121 the back side 12b of the second type die
Active side 12a of the second type die a first protective layer 112
Second protective layer 122 plastic packaging layer 13
Front surface 13a of the plastic encapsulation layer and back surface 13b of the plastic encapsulation layer
First rewiring layer 14 first sub-rewiring layer 141
Second sub-rewiring layer 142 first dielectric layer 15
Second rewiring layer 16 second dielectric layer 17
Conductive bump 18 oxidation resistant layer 19
Carrier plate 30 to-be-molded part 40
Support plate 31 third type die 21
Third bonding pad 211 backside 21b of third type die
Active side 21a of the third type die third protective layer 212
Third sub-rewiring layer 143
Detailed Description
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.
Fig. 1 is a schematic cross-sectional structure diagram of an MCM package structure of a first embodiment of the invention.
Referring to fig. 1, MCM package structure 1 includes:
a first type die 11 including a plurality of first bonding pads 111, the first bonding pads 111 being located on an active surface 11a of the first type die 11;
a second type die 12 including a plurality of second bonding pads 121, the second bonding pads 121 being located on an active side 12a of the second type die 12;
a molding compound layer 13 for coating the first type bare chip 11 and the second type bare chip 12; the molding layer 13 includes a front surface 13a and a back surface 13b opposite to each other, and the front surface 13a of the molding layer 13 exposes the first pads 111 and the second pads 121;
a first rewiring layer 14 located on the front surface 13a side of the molding layer 13; the first rewiring layer 14 includes a first sub-rewiring layer 141 and a second sub-rewiring layer 142, the first sub-rewiring layer 141 is electrically connected to the first pad 111, and the second sub-rewiring layer 142 is electrically connected to the second pad 121;
a first dielectric layer 15 embedding the first redistribution layer 14;
a second rewiring layer 16 on the first dielectric layer 15; the second re-wiring layer 16 electrically connects the first sub-re-wiring layer 141 and the second sub-re-wiring layer 142;
a second rewiring layer 16 embedding the second rewiring layer 16;
a conductive bump 18 on the second dielectric layer 17; the conductive bumps 18 are electrically connected to the second redistribution layer 16, and the conductive bumps 18 are external connection terminals of the MCM package structure 1.
The first type die 11 and the second type die 12 may be the same or different. The first type DIE 11 and the second type DIE 12 may be a POWER DIE (POWER DIE), a MEMORY DIE (MEMORY DIE), a sensing DIE (SENSOR DIE), or a RADIO frequency DIE (RADIO frequency DIE), or corresponding control chips. The present embodiment does not limit the functions of the first type die 11 and the second type die 12.
The first type die 11 includes an active side 11a and a back side 11b opposite. The first pad 111 is located on the active surface 11 a. The first type die 11 may include a variety of devices formed on a semiconductor substrate, and electrical interconnect structures electrically connected to the various devices. The first pads 111 are connected to the electrical interconnection structure for inputting/outputting electrical signals of the respective devices.
The second type die 12 includes opposing active and backside surfaces 12a and 12 b. The second pad 121 is located on the active surface 12 a. The second type die 12 may include a variety of devices formed on a semiconductor substrate, as well as electrical interconnect structures electrically connected to the various devices. The second pads 121 are connected to the electrical interconnection structure for inputting/outputting electrical signals of the respective devices.
In this embodiment, referring to fig. 1, the active surface 11a of the first type die 11 is covered with a first protective layer 112. The active side 12a of the second type die 12 is covered with a second protective layer 122. The first protective layer 112 and the second protective layer 122 are made of insulating materials, specifically, may be made of insulating resin materials, and may also be made of inorganic materials. The insulating resin material is, for example, polyimide, epoxy resin, abf (ajinomoto build file), pbo (polybenzoxazole), an organic polymer film, an organic polymer composite material, or other organic materials having similar insulating properties. The inorganic material is, for example, at least one of silicon dioxide and silicon nitride.
The first protective layer 112 has a first opening exposing the first pad 111. The second protective layer 122 has a second opening exposing the second pad 121.
In other embodiments, the first protective layer 112 and/or the second protective layer 122 may be omitted.
The material of the molding layer 13 may be epoxy resin, polyimide resin, benzocyclobutene resin, polybenzoxazole resin, polybutylene terephthalate, polycarbonate, polyethylene terephthalate, polyethylene, polypropylene, polyolefin, polyurethane, polyolefin, polyethersulfone, polyamide, polyurethane, ethylene-vinyl acetate copolymer, polyvinyl alcohol, or the like. The material of the molding layer 13 may also be various polymers or a composite material of resin and polymer.
The molding layer 13 includes a front surface 13a and a back surface 13b opposite to each other. In this embodiment, the front surface 13a of the molding layer 13 exposes the first protection layer 112 and the second protection layer 122.
In this embodiment, the first sub-redistribution layer 141 and the second sub-redistribution layer 142 respectively include a metal pattern layer. The first sub-redistribution layer 141 is designed according to: the actual position of the first type die 11, in particular the actual position of the first pads 111 of the first type die 11 within the molding layer 13. The second sub-redistribution layer 142 is designed according to: the actual position of the second type die 12, in particular the second pads 121 of the second type die 12 within the molding layer 13.
More specifically, the metal pattern layer of the first sub-redistribution layer 141 includes first type metal pattern blocks, the first type metal pattern blocks may be disposed in one-to-one correspondence with the first pads 111 and have the same number, and an area of at least one of the first type metal pattern blocks is larger than an area of the corresponding first pad 111. The metal pattern layer of the second sub-redistribution layer 142 includes second-type metal pattern blocks, the second-type metal pattern blocks may be disposed in one-to-one correspondence with the second pads 121 and have the same number, and an area of at least one of the second-type metal pattern blocks is larger than an area of the corresponding second pad 121.
In the present embodiment, the first sub-redistribution layer 141 in the first redistribution layer 14 is electrically insulated from the second sub-redistribution layer 142, in other words, the first sub-redistribution layer 141 is designed without considering the offset of the actual position of the second type die 12 from the theoretical position, and the second sub-redistribution layer 142 is designed without considering the offset of the actual position of the first type die 11 from the theoretical position.
Although the pattern position of the first sub-rewiring layer 141 is shifted together with the actual position of the first type die 11, and the pattern position of the second sub-rewiring layer 142 is shifted together with the actual position of the second type die 12, the pattern area of the first sub-rewiring layer 141 may be designed to be larger than the area of the first pad 111, the pattern area of the second sub-rewiring layer 142 may be designed to be larger than the area of the second pad 121, and when the second rewiring layer 16 is determined based on the theoretical position of the first type die 11 and the theoretical position of the second type die 12, the maximum shift amount of the actual position of the first type die 11 from the theoretical position thereof may be increased, and the maximum shift amount of the actual position of the second type die 12 from the theoretical position thereof may be increased. Within the maximum offset range, reliable electrical connection between the bonding pads of the various types of dies is guaranteed equally.
The material of the first dielectric layer 15 and the second dielectric layer 17 may be an insulating resin material or an inorganic material. The insulating resin material is, for example, polyimide, epoxy resin, abf (ajinomoto build file), pbo (polybenzoxazole), an organic polymer film, an organic polymer composite material, or other organic materials having similar insulating properties. The inorganic material is, for example, at least one of silicon dioxide and silicon nitride. The insulating resin material has a smaller tensile stress than the inorganic material, and can prevent the surface of the MCM package structure 1 from warping.
In the present embodiment, the second re-wiring layer 16 includes one metal pattern layer, and in other embodiments, the second re-wiring layer 16 may include two or more metal pattern layers.
In this embodiment, the conductive bumps 18 are external connection terminals of the MCM package 1.
An oxidation resistant layer 19 may be disposed on the conductive bump 18.
The oxidation resistant layer 19 may include: a1) a tin layer, or a2) a nickel layer and a gold layer stacked from bottom to top, or a3) a nickel layer, a palladium layer and a gold layer stacked from bottom to top. The oxidation resistant layer 19 may be formed using an electroplating process. The material of the conductive bump 18 may be copper, and the oxidation resistant layer may prevent oxidation of copper, thereby preventing deterioration of electrical connection performance due to oxidation of copper.
In other embodiments, the oxidation resistant layer 19 may be omitted. In addition, the MCM package 1 may also be provided with external connection terminals in other configurations and locations.
An embodiment of the present invention provides a method for fabricating the MCM package structure 1 in fig. 1. Fig. 2 is a flow chart of a method of fabrication. Fig. 3 to 8 and 10 are intermediate schematic diagrams corresponding to the flow in fig. 2.
First, referring to step S1 in fig. 2 and fig. 3, a carrier 30 and a plurality of sets of to-be-molded parts 40 carried on the carrier 30 are provided, where each set of to-be-molded parts 40 includes: a first type die 11 and a second type die 12, the first type die 11 including a plurality of first bonding pads 111, the first bonding pads 111 being located on an active surface 11a of the first type die 11; the second type die 12 includes a number of second bonding pads 121, the second bonding pads 121 being located on the active side 12a of the second type die 12; the active surface 11a of the first type die 11 and the active surface 12a of the second type die 12 face the carrier 30. Wherein, fig. 3 is a top view of the carrier plate and a plurality of groups of members to be molded; fig. 4 is a sectional view taken along the AA line in fig. 3.
In this embodiment, referring to fig. 4, the active surface 11a of the first type die 11 is covered with a first protective layer 112. The active side 12a of the second type die 12 is covered with a second protective layer 122. The first protective layer 112 and the second protective layer 122 are made of insulating materials, specifically, may be made of insulating resin materials, and may also be made of inorganic materials. The insulating resin material is, for example, polyimide, epoxy resin, abf (ajinomoto build file), pbo (polybenzoxazole), an organic polymer film, an organic polymer composite material, or other organic materials having similar insulating properties. The inorganic material is, for example, at least one of silicon dioxide and silicon nitride.
The first protective layer 112 has a first opening exposing the first pad 111. The second protective layer 122 has a second opening exposing the second pad 121.
In other embodiments, the first protective layer 112 and/or the second protective layer 122 may be omitted.
The carrier plate 30 is a rigid plate and may include a plastic plate, a glass plate, a ceramic plate, a metal plate, or the like.
When the plurality of sets of to-be-molded parts 40 are disposed on the surface of the carrier plate 30, a whole bonding layer may be coated on the surface of the carrier plate 30, and the plurality of sets of to-be-molded parts 40 are disposed on the bonding layer.
The adhesive layer may be made of a material that is easily peeled off so as to peel off the carrier sheet 30, and for example, a thermal release material that can be made to lose adhesiveness by heating or a UV release material that can be made to lose adhesiveness by ultraviolet irradiation may be used.
A group of parts to be molded 40 is located on an area of the surface of the carrier plate 30 for facilitating subsequent cutting. A plurality of sets of to-be-molded parts 40 are fixed on the surface of the carrier plate 30 to simultaneously manufacture a plurality of MCM package structures 1, which is beneficial to batch production and cost reduction. In some embodiments, a set of members to be molded 40 can be fixed on the surface of the carrier 30.
Next, referring to step S2 in fig. 2 and fig. 5, a molding layer 13 embedding each set of to-be-molded parts 40 is formed on the surface of the carrier plate 30; referring to fig. 6, the carrier plate 30 is removed to expose the active surface 11a of each first type die 11, the active surface 12a of each second type die 12, and the front surface 13a of the molding layer.
The material of the molding layer 13 may be epoxy resin, polyimide resin, benzocyclobutene resin, polybenzoxazole resin, polybutylene terephthalate, polycarbonate, polyethylene terephthalate, polyethylene, polypropylene, polyolefin, polyurethane, polyolefin, polyethersulfone, polyamide, polyurethane, ethylene-vinyl acetate copolymer, polyvinyl alcohol, or the like. The material of the molding layer 13 may also be various polymers or a composite material of resin and polymer. Correspondingly, the plastic package can include filling the liquid plastic package material and then performing high-temperature curing through a plastic package mold. In some embodiments, the molding layer 13 may also be formed by plastic material molding such as hot press molding and transfer molding.
The molding layer 13 may include a front surface 13a and a back surface 13b opposite to each other.
During the formation of the molding compound layer 13, the first protective layer 112 and the second protective layer 122 can prevent the first bonding pad 111, the first type die 11, the second bonding pad 121, and the electrical interconnection structure and devices in the second type die 12 from being damaged.
Referring to fig. 7, after removing the carrier plate 30, a support plate 31 may be disposed on the back surface 13b of the molding layer 13.
The support plate 31 is a hard plate member and may include a glass plate, a ceramic plate, a metal plate, and the like.
Thereafter, referring to step S3 in fig. 2 and fig. 7, a first redistribution layer 14 is formed on the front surface 13a side of the molding layer 13 based on the first actual position of each first type die 11 and the second actual position of each second type die 12; a first dielectric layer 15 is formed embedding the first rewiring layer 14.
Specifically, step S3 may include: forming a first sub-rewiring layer 141 on the front surface 13a side of the molding layer 13 based on the first actual position of each of the first type dies 11; forming a second sub-rewiring layer 142 electrically insulated from the first sub-rewiring layer 141 in this step S3 on the front surface 13a side of the molding layer 13 based on the second actual position of each of the second type dies 12; the first sub-rewiring layer 141 and the second sub-rewiring layer 142 together constitute the first rewiring layer 14.
The first sub-redistribution layer 141 and the second sub-redistribution layer 142 may include a plurality of groups, the first sub-redistribution layer 141 electrically connects the first pads 111 of the first type dies 11 within the group, and the second sub-redistribution layer 142 electrically connects the second pads 121 of the second type dies 12 within the group.
The actual positions of the first pads 111 are obtained before the first sub-rewiring layer 141 is formed, and the actual positions of the second pads 121 are obtained before the second sub-rewiring layer 142 is formed, for example, by an optical inspection method.
In this embodiment, the first protective layer 112 of the first type die 11 has a first opening exposing the first pad 111. The second protective layer 122 of the second type die 12 has a second opening exposing the second pad 121, so that the first pad 111 and the second pad 121 are exposed after the carrier board 30 is removed. In other embodiments, the first protective layer 112 of the first type die 11 may cover the first bonding pad 111, the second protective layer 122 of the second type die 12 may cover the second bonding pad 121, and a first opening exposing the first bonding pad 111 and a second opening exposing the second bonding pad 121 are formed before the first redistribution layer 14 is formed.
The first sub-redistribution layer 141 and the second sub-redistribution layer 142 may be formed in sequence in steps, or may be formed in the same step. The first sub-redistribution layer 141 and the second sub-redistribution layer 142 may be formed by an electroplating process. The process of electroplating copper or aluminum is mature. The first sub re-wiring layer 141 and the second sub re-wiring layer 142 may also be formed by sputtering a metal layer on the entire surface and then patterning the metal layer.
The first dielectric layer 15 is an insulating material, and may be an organic polymer insulating material or an inorganic insulating material. The organic polymer insulating material is, for example, polyimide, epoxy resin, abf (ajinomoto build film), pbo (polybenzoxazole), an organic polymer film, an organic polymer composite material, or other organic materials having similar insulating properties.
The organic high molecular polymer insulating material may be a) laminated on the first rewiring layer 14 by a lamination process, or b) coated on the first rewiring layer 14 first and then cured, or c) cured on the first rewiring layer 14 by an injection molding process.
When the material of the first dielectric layer 15 is an inorganic insulating material such as silicon dioxide or silicon nitride, the first dielectric layer may be formed on the first redistribution layer 14 by a deposition process.
Compared with inorganic insulating materials, the organic polymer insulating materials have smaller tensile stress, and can prevent the plastic package body from warping caused by the large-area formation of the first dielectric layer 15.
The first dielectric layer 15 may include one or more layers.
Next, referring to step S4 in fig. 2 and fig. 8, forming a second re-wiring layer 16 on the first dielectric layer 15 based on the first theoretical position of each first-type die 11 and the second theoretical position of each second-type die 12; a second dielectric layer 17 is formed embedding the second rewiring layer 16.
The second redistribution layer 16 electrically connects the first sub-redistribution layer 141 corresponding to the first type die 11 within the group with the second sub-redistribution layer 142 corresponding to the second type die 12.
FIG. 9 is a schematic view of a comparative structure.
Referring to fig. 9, if the first redistribution layer 14 is not provided, and the second redistribution layer 16 is directly provided on the active surface 11a of the first type die 11 and the active surface 12a of the second type die 12, since the first theoretical position of the first type die 11 has a certain offset to the left with respect to the first actual position, and the second theoretical position of the second type die 12 has a certain offset to the right with respect to the second actual position, when the second redistribution layer 16 is electrically connected to the first bonding pad 111 of the first type die 11, a break may occur with the second bonding pad 121 of the second type die 12 (as shown in the dashed circle).
The second re-wiring layer 16 may be completed using an electroplating process. The process of electroplating copper or aluminum is mature. The second rewiring layer 16 may be formed by sputtering a metal layer over the entire surface and then patterning the metal layer.
The method of forming the second dielectric layer 17 may refer to the method of forming the first dielectric layer 15.
Next, referring to step S5 in fig. 2 and fig. 8, a conductive bump 18 is formed on the second dielectric layer 17, and the conductive bump 18 is electrically connected to the second redistribution layer 16.
The method of forming the conductive bump 18 may refer to the method of forming the second re-wiring layer 16.
In this embodiment, the conductive bumps 18 are external connection terminals of the MCM package 1.
In this embodiment, an oxidation resistant layer 19 may also be formed on the conductive bump 18.
The oxidation resistant layer 19 may include: a1) a tin layer, or a2) a nickel layer and a gold layer stacked from bottom to top, or a3) a nickel layer, a palladium layer and a gold layer stacked from bottom to top. The oxidation resistant layer 19 may be formed using an electroplating process.
After the conductive bump 18 is formed, the support plate 31 may be removed. The removing method of the support plate 31 may be a conventional removing method such as laser lift-off, UV irradiation, or the like.
Next, referring to step S6 in fig. 2, fig. 10 and fig. 1, a plurality of MCM package structures 1 are formed by cutting, and each MCM package structure 1 includes a set of to-be-molded components 40.
Fig. 11 is a schematic cross-sectional structure diagram of an MCM package structure of the second embodiment of the invention.
Referring to fig. 11 and 1, MCM package structure 2 and its fabrication method in the present embodiment are different from MCM package structure 1 and its fabrication method in the first embodiment only in that: the first sub re-wiring layer 141 and the second sub re-wiring layer 142 include two metal pattern layers, respectively.
For the first sub-rewiring layer 141, two metal pattern layers have benefits over one metal pattern layer: 1) some circuit layouts of the first pad 111 may be implemented so that the upper metal pattern layer meets the theoretical position alignment requirement of the second re-wiring layer 16; 2) by the fact that the area of at least one first-type metal pattern block of the upper metal pattern layer is larger than that of the corresponding first-type metal pattern block of the lower metal pattern layer, the problem that the theoretical position alignment requirement of the second rewiring layer 16 is met due to the fact that the first bonding pad 111 is dense in layout and the area amplification degree of each first-type metal pattern block cannot be achieved through one metal pattern layer is solved.
Similarly, for the second sub-rewiring layer 142, two metal pattern layers have benefits over one metal pattern layer: 1) some circuit layouts of the second pad 121 may be implemented so that the upper metal pattern layer meets the theoretical position alignment requirement of the second re-wiring layer 16; 2) by the fact that the area of at least one second-type metal pattern block of the upper metal pattern layer is larger than that of the corresponding second-type metal pattern block of the lower metal pattern layer, the problem that the theoretical position alignment requirement of the second rewiring layer 16 is met due to the fact that the second bonding pad 121 is dense in layout and the area amplification degree of each second-type metal pattern block cannot be achieved through one metal pattern layer is overcome.
In other embodiments, the first sub-redistribution layer 141 and the second sub-redistribution layer 142 may include more than two metal pattern layers, respectively.
Fig. 12 is a schematic cross-sectional structure of an MCM package structure of a third embodiment of the invention.
Referring to fig. 12, 1 and 11, MCM package structure 3 and the manufacturing method thereof in the present embodiment are different from MCM package structures 1 and 2 and the manufacturing method thereof in the first and second embodiments only in that: MCM package structure 3 further includes: a third type die 21, the third type die 21 comprising a number of third bonding pads 211, the third bonding pads 211 being located on an active side 21a of the third type die 21; the plastic package layer 13 also covers the third type die 21, and the front surface 13a of the plastic package layer 13 exposes the third pad 211; the third type die 21 has a third actual position and a third theoretical position, the third actual position having an offset with respect to the third theoretical position; the first redistribution layer 14 further includes a third sub-redistribution layer 143, and the third sub-redistribution layer 143 is electrically connected to the third pad 211 and is shifted together with the third actual position; the second redistribution layer 16 is also electrically connected to the third sub-redistribution layer 143, and the second redistribution layer 16 is determined based on a first theoretical position of the first type die 11, a second theoretical position of the second type die 12, and a third theoretical position of the third type die 21.
The third type die 21, the first type die 11 and the second type die 12 may be the same or different. The third type DIE 21 may be a POWER DIE (POWER DIE), a MEMORY DIE (MEMORY DIE), a sensing DIE (SENSOR DIE), or a RADIO frequency DIE (RADIO frequency DIE), or a corresponding control chip. The present embodiment does not limit the function of the third type die 21.
The third type die 21 includes an active side 21a and a back side 21b opposite. The third pad 211 is located on the active surface 21 a. The third type die 21 may include a variety of devices formed on a semiconductor substrate, and electrical interconnect structures electrically connected to the respective devices. The third pads 211 are connected to the electrical interconnection structure for inputting/outputting electrical signals of the respective devices.
In this embodiment, referring to fig. 12, the active surface 21a of the third type die 21 is covered with a third protective layer 212. The third protective layer 212 is an insulating material, and may specifically be an insulating resin material, or may also be an inorganic material. The insulating resin material is, for example, polyimide, epoxy resin, abf (ajinomoto build file), pbo (polybenzoxazole), an organic polymer film, an organic polymer composite material, or other organic materials having similar insulating properties. The inorganic material is, for example, at least one of silicon dioxide and silicon nitride.
The third protective layer 212 has a third opening exposing the third pad 211.
In other embodiments, the third protective layer 212 may be omitted.
In other embodiments, the MCM package structure may further include: and N is a positive integer greater than or equal to 4. In other words, the pattern position of the first sub-redistribution layer 141 is shifted with the actual position of the first type die 11, the pattern position of the second sub-redistribution layer 142 is shifted with the actual position of the second type die 12, and the pattern position of the M-th sub-redistribution layer … … is shifted with the actual position of the M-th die, where M is a positive integer of 4 or more and N or less; however, the pattern area of the first sub-redistribution layer 141 may be designed to be larger than the area of the first pad 111, the pattern area of the second sub-redistribution layer 142 may be designed to be larger than the area of the second pad 121, and the pattern area of the … … mth sub-redistribution layer may be designed to be larger than the area of the mth pad, and when the second redistribution layer 16 is determined based on the first theoretical position of the first type die 11, the second theoretical position of the second type die 12, … …, and the mth theoretical position of the mth type die, the maximum deviation amount of the actual position of the first type die 11 from the own theoretical position may be increased, the maximum deviation amount of the actual position of the second type die 12 from the own theoretical position may be increased, … …, and the maximum deviation amount of the actual position of the mth type die from the own theoretical position may be increased. Within the maximum offset range, reliable electrical connection between the bonding pads of the various types of dies is guaranteed equally.
Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.

Claims (12)

1. An MCM package structure, comprising:
a first type die including a number of first bonding pads, the first bonding pads located on an active side of the first type die; the first type die has a first actual position and a first theoretical position, the first actual position having an offset relative to the first theoretical position;
a second type die comprising a number of second bonding pads, the second bonding pads being located on an active side of the second type die; the second type die has a second actual position and a second theoretical position, the second actual position having an offset relative to the second theoretical position;
a molding compound layer which covers the first type bare chip and the second type bare chip; the plastic packaging layer comprises a front surface and a back surface which are opposite, and the first bonding pad and the second bonding pad are exposed on the front surface of the plastic packaging layer;
the first rewiring layer is positioned on one side of the front surface of the plastic packaging layer; the first redistribution layer comprises a first sub-redistribution layer and a second sub-redistribution layer, the first sub-redistribution layer is electrically connected with the first bonding pad and is deviated along with the first actual position, and the second sub-redistribution layer is electrically connected with the second bonding pad and is deviated along with the second actual position;
a first dielectric layer embedding the first rewiring layer;
a second rewiring layer on the first dielectric layer; the second redistribution layer electrically connects the first sub-redistribution layer and the second sub-redistribution layer, and the second redistribution layer is determined based on the first theoretical position of the first type of die and the second theoretical position of the second type of die.
2. The MCM package structure of claim 1, wherein in the first rewiring layer, the first sub-rewiring layer is electrically insulated from the second sub-rewiring layer.
3. The MCM package structure of claim 1 or 2, wherein the first sub-rewiring layer and the second sub-rewiring layer include one metal pattern layer, respectively, or the first sub-rewiring layer and the second sub-rewiring layer include two or more metal pattern layers, respectively.
4. The MCM package structure of claim 3, wherein each of the metal pattern layers of the first sub-rewiring layer includes first-type metal pattern blocks arranged in one-to-one correspondence with the first pads in equal numbers, an area of at least one of the first-type metal pattern blocks being larger than an area of the corresponding first pad; each metal pattern layer of the second sub-rewiring layer comprises second type metal pattern blocks, the second type metal pattern blocks and the second bonding pads are arranged in a one-to-one correspondence mode, the number of the second type metal pattern blocks is equal to that of the second bonding pads, and the area of at least one second type metal pattern block is larger than that of the corresponding second bonding pad.
5. An MCM package structure according to claim 1 or 2, further comprising: an M type bare chip, wherein M is any positive integer greater than or equal to 3 and less than or equal to N; the Mth type die comprises a plurality of Mth bonding pads, and the Mth bonding pads are positioned on the active surface of the Mth type die;
the molding compound layer covers the M type bare chip, and the front surface of the molding compound layer exposes the M bonding pad; the Mth type die has an Mth actual position and an Mth theoretical position, the Mth actual position having an offset relative to the Mth theoretical position;
the first redistribution layer further comprises an Mth sub-redistribution layer, and the Mth sub-redistribution layer is electrically connected with the Mth bonding pad and is deviated along with the Mth actual position;
the second redistribution layer is also electrically connected to the Mth sub-redistribution layer, and the second redistribution layer is determined based on the first theoretical position of the first type of die, the second theoretical position of the second type of die, … …, and an Nth theoretical position of an Nth type of die.
6. A method for manufacturing an MCM package structure is characterized by comprising the following steps:
providing a carrier plate and bearing in at least one group of to-be-molded parts of the carrier plate, wherein each group of to-be-molded parts at least comprises: a first type die and a second type die; the first type die comprises a plurality of first bonding pads, and the first bonding pads are positioned on the active surface of the first type die; the second type die comprises a plurality of second bonding pads, and the second bonding pads are positioned on the active surface of the second type die; an active face of the first type die and an active face of the second type die face the carrier plate;
forming a plastic package layer for embedding each group of the parts to be plastic-packaged on the surface of the carrier plate; removing the carrier plate to expose the active surface of each of the first type bare chips, the active surface of each of the second type bare chips and the front surface of the plastic packaging layer; each of the first type dies has a respective first actual position and a respective first theoretical position, the first actual position having an offset relative to the first theoretical position; each die of the second type having a respective second actual position and a respective second theoretical position, the second actual position having an offset relative to the second theoretical position;
forming a first redistribution layer on a front side of the molding compound layer based on the first actual position of each of the first type dies and the second actual position of each of the second type dies; forming a first dielectric layer embedding the first rewiring layer;
forming a second re-routing layer on the first dielectric layer based on the first theoretical location of each of the first type dies and the second theoretical location of each of the second type dies.
7. The method for fabricating an MCM package structure according to claim 6, further comprising, after the step of forming a second rewiring layer: and cutting to form MCM packaging structures, wherein each MCM packaging structure comprises a group of the parts to be molded.
8. A method of fabricating an MCM package structure according to claim 6, wherein the step of forming a first redistribution layer on a front side of the molding layer based on the first actual position of each of the first type dies and the second actual position of each of the second type dies includes:
forming a first sub-rewiring layer on one side of the front surface of the plastic packaging layer based on the first actual position of each first type bare chip; forming a second sub-redistribution layer on the front side of the molding compound layer, electrically insulated from the first sub-redistribution layer in this step, based on the second actual position of each of the second type of die; the first sub-rewiring layer and the second sub-rewiring layer together constitute the first rewiring layer;
the step of forming a second re-routing layer on the first dielectric layer based on the first theoretical location of each of the first type of die and the second theoretical location of each of the second type of die comprises:
forming a second re-routing layer on the first dielectric layer that electrically connects the first sub-re-routing layer corresponding to the first type of die within a group with the second sub-re-routing layer corresponding to the second type of die based on the first theoretical position of each of the first type of die and the second theoretical position of each of the second type of die.
9. The method for manufacturing an MCM package structure according to claim 6 or 8, wherein the formed first sub-rewiring layer and the formed second sub-rewiring layer each include one metal pattern layer, or the formed first sub-rewiring layer and the formed second sub-rewiring layer each include two or more metal pattern layers.
10. The MCM package structure fabrication method of claim 9, wherein each of the metal pattern layers of the first sub-rewiring layer includes first-type metal pattern blocks, the first-type metal pattern blocks are arranged in one-to-one correspondence with the first pads and are equal in number, and an area of at least one of the first-type metal pattern blocks is larger than an area of the corresponding first pad; each metal pattern layer of the second sub-rewiring layer comprises second type metal pattern blocks, the second type metal pattern blocks and the second bonding pads are arranged in a one-to-one correspondence mode, the number of the second type metal pattern blocks is equal to that of the second bonding pads, and the area of at least one second type metal pattern block is larger than that of the corresponding second bonding pad.
11. A method for fabricating an MCM package structure according to claim 6 or 8, wherein each group of the members to be molded further includes: an M type bare chip, wherein M is any positive integer greater than or equal to 3 and less than or equal to N; the Mth type die comprises a plurality of Mth bonding pads, and the Mth bonding pads are positioned on the active surface of the Mth type die;
the molding compound layer covers the M type bare chip, and the front surface of the molding compound layer exposes the M bonding pad; the Mth type die has an Mth actual position and an Mth theoretical position, the Mth actual position having an offset relative to the Mth theoretical position;
forming a first redistribution layer on a front side of the molding compound layer based on the first actual position of each of the first type dies, the second actual position of each of the second type dies, … …, and the Nth actual position of each of the Nth type dies;
forming a second re-routing layer on the first dielectric layer based on the first theoretical location of each of the first type die, the second theoretical location of each of the second type die, … …, and the nth theoretical location of each of the nth type die.
12. A method of fabricating an MCM package structure according to claim 11, wherein the step of forming a first rewiring layer on a front side of the molding layer based on the first actual position of each of the first type dies, the second actual position of each of the second type dies, … …, and the nth actual position of each of the nth type dies includes:
forming a first sub-rewiring layer on one side of the front surface of the plastic packaging layer based on the first actual position of each first type bare chip; forming a second sub-redistribution layer on the front side of the molding compound layer, electrically insulated from the first sub-redistribution layer in this step, based on the second actual position of each of the second type of die; … … forming an Mth sub-redistribution layer on the front side of the molding layer electrically insulated from the first sub-redistribution layer, the second sub-redistribution layer, … … the M-1 st sub-redistribution layer at this step based on the Mth actual position of each of the Mth type dies; the first sub-redistribution layer, the second sub-redistribution layer, … …, and the nth sub-redistribution layer collectively form the first redistribution layer;
the step of forming a second re-routing layer on the first dielectric layer based on the first theoretical location of each of the first type die, the second theoretical location of each of the second type die, … …, and the nth theoretical location of each of the nth type die comprises:
forming a second re-routing layer on the first dielectric layer that electrically connects the first sub-re-routing layer corresponding to the first type die, the second sub-re-routing layer corresponding to the second type die, … …, and the nth sub-re-routing layer corresponding to the nth type die within a group based on the first theoretical position of each of the first type die, the second theoretical position of each of the second type die, … …, and the mth theoretical position of each of the mth type die.
CN202110991105.8A 2021-08-26 2021-08-26 MCM encapsulation structure and manufacturing method thereof Pending CN113707630A (en)

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