CN113704163A - Testing device and method for verifying integrity of SRIO protocol - Google Patents
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- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
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Abstract
The invention belongs to the technical field of high-speed data transmission, and particularly relates to a testing device and method for verifying the integrity of an SRIO protocol. The testing device comprises a main program module and an integrated testing case; the main program module is built based on a Xilinx high-end development platform UltraScaleZCU106 and is connected with the integrated test case through an optical fiber; the test device can realize effective conversion of protocol data and load data; all common protocols in the SRIO protocol can be sent out, so that the protocol support of the tested board card can be tested conveniently; the SRIO can be flexibly expanded from 1X to 4X, and the transmission frequency can be expanded to 3.125Gbps and 6.25 Gbps; the development of the Xilinx high-end series UltraScale development platform is adopted, so that the requirements of most of the current tests are met.
Description
Technical Field
The invention belongs to the technical field of high-speed data transmission, and particularly relates to a testing device and method for verifying the integrity of an SRIO protocol.
Background
SRIO (Serial Rapid Input Output) is a type based on high-speed data Input/Output interface, and is mainly used to solve the interconnection between high-performance systems, and because it has many advantages such as fast transmission rate, few pins, high transmission reliability, long transmission distance, it is widely used in the working environment of tightly coupling multiple devices such as various data transmission, dump, and various data interface exchanges. .
At present, various board cards designed based on SRIO interfaces on the market are full of numbers, but the support degree of the SRIO protocols is only known, as is well known, for SRIO transmission, the included transmission protocols mainly include NWRITE, NREAD, NWRITE _ R, DOORBELL, switch, maintennce, MESSAGE and the like, and how the SRIO interface cards of various products support the protocols does not have a universal test system for verification at present. Therefore, it is desirable to provide a testing method and device for verifying the integrity of SRIO protocol
Disclosure of Invention
Technical problem to be solved
The technical problem to be solved by the invention is as follows: how to provide a testing device and a method for verifying the integrity of an SRIO protocol is used for solving the problem of the integrity test of the SRIO protocol support by the existing SRIO board card.
(II) technical scheme
In order to solve the technical problem, the invention provides a testing device for verifying the integrity of an SRIO protocol, which comprises a main program module and an integrated testing case;
the main program module is built based on a Xilinx high-end development platform UltraScale ZCU106 and is connected with the integrated test case through optical fibers;
the integrated test machine box comprises a bottom plate, an optical interface plate and an SRIO exchange plate; therefore, the condition that the tested board card supports the SRIO protocol is tested by relying on the verification device built by the UltraScale ZCU106 development platform, so that the tested board cards from different sources are distinguished and identified rapidly; the bottom plate is provided with a tested board card;
the integrated test case of the verification device is a test environment for realizing the SRIO switching function, and in the integrated test case, a bottom plate is used for supplying power to each daughter board card and providing a physical connection relationship for each daughter board card and the SRIO switching board card; the optical interface board is used for carrying out optical interface communication with an external component and is connected with the SRIO exchange board card through the bottom board; the SRIO switch board card is a core board card of the integrated test case, the daughter boards are interconnected and intercommunicated through the SRIO switch board card, and different daughter boards are distinguished through ID numbers; the tested board card is any functional board card of an SRIO interface;
for the main program module, which is a hardware system built under the embedded development platform UltraScale ZCU106, in order to realize communication and control of SRIO, the main program module comprises a Cortex-A53 processor core module, an AXI bus, an SRIO _ GEN core, a BRAM _ CTRL module, a DMA module and a Bridge module; the core module comprises an SRIO _ GEN core and a Bridge module;
the SRIO _ GEN core is in a 1X mode, the transmission frequency is 2.5Gbps, and the reference clock is 125 MHz;
the Bridge module is used for realizing packet packing of SRIO data, extraction and unloading of loads and the like, and meanwhile, the Bridge module is also used for receiving parameter configuration and state information reading of the BRAM _ CTRL module;
the DMA module is used for realizing the access and storage of the DDR memory space.
The DDR module is a data storage module and is used for storing test data, and the access and storage of the Cortex-A53 processor core module are facilitated.
The Cortex-A53 processor core module is a processor module and is used for realizing the control of an AXI bus and the access control of a DDR, and meanwhile, the scheduling work of the whole testing device is borne.
The AXI module is a bus module and is used for connecting the processor module and part of the functional unit modules; the functional unit module in the testing device comprises: the device comprises an SRIO _ GEN module, a BRAM _ CTRL module, a DMA module and a Bridge module.
The SRIO _ GEN module is an SRIO protocol IP core module, on one hand, control information from a Cortex-A53 processor core module is received through an AXI module, on the other hand, data packaged and processed by the Bridge module are converted into serial data and sent to a board card to be tested through differential data signal lines tx _ p and tx _ n, or board card data to be tested received by the differential data signal lines rx _ p and rx _ n are sent to the Bridge module as packet data conforming to an SRIO protocol packet format.
The BRAM _ CTRL module is used for customizing an IP for a user, receiving read-write control information from the Cortex-A53 processor core module through the AXI module, and transmitting the read-write control information to the downstream Bridge module.
The DMA module is a direct memory access module, is used for providing a rapid data transmission mode, and is used for realizing rapid interaction between Bridge module data and DDR module memory data.
The Bridge module is used for customizing an IP for a user, and plays a role of a bridging link between the SRIO _ GEN module and the DMA module to realize bidirectional transmission of data.
According to the transaction types of NWRITE, NWRITE _ R, MAINTENANCE and MESSAGE in the SRIO protocol, valid data are sent out from an internal storage structure DDR module through an AXI module, sent out by a DMA module, packaged and processed by a Bridge module, transmitted to an SRIO _ GEN module and finally sent to a tested board card through tx _ p and tx _ n signal lines;
aiming at NREAD transaction types in an SRIO protocol, packet data of a tested board card is received by rx _ p and rx _ n signal lines, is transmitted to a Bridge module through an SRIO _ GEN module, is unpacked by the Bridge module, and is transmitted to a DDR module through a DMA module, so that the transfer of effective data is realized.
In addition, the invention also provides a test method for verifying the integrity of the SRIO protocol based on the test device, and based on the test device, the test method comprises the following steps:
step 1: firstly, the testing device selects a transaction Type according to a Type number of an SRIO transaction Type to be verified; the Type number of the NWRITE transaction is 54, the Type number of the NWRITE _ R transaction is 55, the Type number of the SWRITE transaction is 60, the Type number of the MESSAGE transaction is b0, the Type number of the NREAD transaction is 24, and the Type number of the DOORBELL transaction is a 0;
step 2: according to the selected transaction type, the verification device sends a corresponding transaction command to the tested board card;
and step 3: aiming at NWRITE transaction, NWRITE _ R transaction, SWRITE transaction, MESSAGE transaction and NREAD transaction, the test device starts a DMA module to prepare for sending or receiving data;
aiming at the DOORBELL transaction, the testing device needs to receive the response of the DOORBELL transaction at the moment, and then verification is completed;
and 4, step 4: for NWRITE transaction, NWRITE _ R transaction, SWRITE transaction and MESSAGE transaction, the test device sends data information to the tested board card, and for NREAD transaction, the test device needs to receive the data information from the tested board card;
and 5: for the NWRITE _ R transaction, after the test device sends data information to the tested board card, the test device waits for response information from the tested board card;
step 6: after the data transmission or reception is finished, closing the DMA module;
and 7: and after the testing device completes one-time testing on all the transactions supported by the SRIO protocol, the verification is finished.
(III) advantageous effects
Compared with the prior art, the invention has the following beneficial effects:
(1) the testing device supports any functional board card with standard size of 4U of the SRIO interface.
(2) The test device only needs two board cards of an optical interface board and an SRIO exchange board card except the tested board card, and the structure is simple.
(3) The testing device is connected with the hardware system through the optical fiber interface, and the performance is stable and reliable.
The advantages of the test device over other systems are:
(1) the effective conversion of protocol data and load data can be realized;
(2) all common protocols in the SRIO protocol can be sent out, so that the protocol support of the tested board card can be tested conveniently;
(3) the SRIO can be flexibly expanded from 1X to 4X, and the transmission frequency can be expanded to 3.125Gbps and 6.25 Gbps;
(4) the development of the Xilinx high-end series UltraScale development platform is adopted, so that the requirements of most of the current tests are met.
Drawings
Fig. 1 is a structural diagram of a testing apparatus according to an embodiment of the present invention.
Fig. 2 is a schematic diagram of the platform principle of the UltraScale ZCU106 in the technical solution of the present invention.
FIG. 3 is a flow chart of the testing method of the present invention.
Detailed Description
In order to make the objects, contents, and advantages of the present invention clearer, the following detailed description of the embodiments of the present invention will be made in conjunction with the accompanying drawings and examples.
In order to solve the above technical problem, the present invention provides a testing device for verifying the integrity of SRIO protocol, as shown in fig. 1, which mainly embodies the structural components and related accessories of the verifying device; the testing device comprises a main program module and an integrated testing case;
the main program module is built based on a Xilinx high-end development platform UltraScale ZCU106 and is connected with the integrated test case through optical fibers;
the integrated test machine box comprises a bottom plate, an optical interface plate and an SRIO exchange plate; therefore, the condition that the tested board card supports the SRIO protocol is tested by relying on the verification device built by the UltraScale ZCU106 development platform, so that the tested board cards from different sources are distinguished and identified rapidly; the bottom plate is provided with a tested board card;
the integrated test case of the verification device is a test environment for realizing the SRIO switching function, and in the integrated test case, a bottom plate is used for supplying power to each daughter board card and providing a physical connection relationship for each daughter board card and the SRIO switching board card; the optical interface board is used for carrying out optical interface communication with an external component and is connected with the SRIO exchange board card through the bottom board; the SRIO switch board card is a core board card of the integrated test case, the daughter boards are interconnected and intercommunicated through the SRIO switch board card, and different daughter boards are distinguished through ID numbers; the tested board card is any functional board card of an SRIO interface;
for the main program module, which is a hardware system built under the embedded development platform UltraScale ZCU106 as shown in fig. 2, in order to implement communication and control of SRIO, the main program module includes a Cortex-a53 processor core module, an AXI bus, an SRIO _ GEN core, a BRAM _ CTRL module, a DMA module, and a Bridge module; the core module comprises an SRIO _ GEN core and a Bridge module;
the SRIO _ GEN core is in a 1X mode, the transmission frequency is 2.5Gbps, and the reference clock is 125 MHz;
the Bridge module is used for realizing packet packing of SRIO data, extraction and unloading of loads and the like, and meanwhile, the Bridge module is also used for receiving parameter configuration and state information reading of the BRAM _ CTRL module;
the DMA module is used for realizing the access and storage of the DDR memory space.
The DDR module is a data storage module and is used for storing test data, and the access and storage of the Cortex-A53 processor core module are facilitated.
The Cortex-A53 processor core module is a processor module and is used for realizing the control of an AXI bus and the access control of a DDR, and meanwhile, the scheduling work of the whole testing device is borne.
The AXI module is a bus module and is used for connecting the processor module and part of the functional unit modules; the functional unit module in the testing device comprises: the device comprises an SRIO _ GEN module, a BRAM _ CTRL module, a DMA module and a Bridge module.
The SRIO _ GEN module is an SRIO protocol IP core module, on one hand, control information from a Cortex-A53 processor core module is received through an AXI module, on the other hand, data packaged and processed by the Bridge module are converted into serial data and sent to a board card to be tested through differential data signal lines tx _ p and tx _ n, or board card data to be tested received by the differential data signal lines rx _ p and rx _ n are sent to the Bridge module as packet data conforming to an SRIO protocol packet format.
The BRAM _ CTRL module is used for customizing an IP for a user, receiving read-write control information from the Cortex-A53 processor core module through the AXI module, and transmitting the read-write control information to the downstream Bridge module.
The DMA module is a direct memory access module, is used for providing a rapid data transmission mode, and is used for realizing rapid interaction between Bridge module data and DDR module memory data.
The Bridge module is used for customizing an IP for a user, and plays a role of a bridging link between the SRIO _ GEN module and the DMA module to realize bidirectional transmission of data.
According to the transaction types of NWRITE, NWRITE _ R, MAINTENANCE and MESSAGE in the SRIO protocol, valid data are sent out from an internal storage structure DDR module through an AXI module, sent out by a DMA module, packaged and processed by a Bridge module, transmitted to an SRIO _ GEN module and finally sent to a tested board card through tx _ p and tx _ n signal lines;
aiming at NREAD transaction types in an SRIO protocol, packet data of a tested board card is received by rx _ p and rx _ n signal lines, is transmitted to a Bridge module through an SRIO _ GEN module, is unpacked by the Bridge module, and is transmitted to a DDR module through a DMA module, so that the transfer of effective data is realized.
In addition, the present invention further provides a testing method for verifying the integrity of the SRIO protocol based on the testing apparatus, as shown in fig. 3, based on the testing apparatus, the testing method includes the following steps:
step 1: firstly, the testing device selects a transaction Type according to a Type number of an SRIO transaction Type to be verified; the Type number of the NWRITE transaction is 54, the Type number of the NWRITE _ R transaction is 55, the Type number of the SWRITE transaction is 60, the Type number of the MESSAGE transaction is b0, the Type number of the NREAD transaction is 24, and the Type number of the DOORBELL transaction is a 0;
step 2: according to the selected transaction type, the verification device sends a corresponding transaction command to the tested board card;
and step 3: aiming at NWRITE transaction, NWRITE _ R transaction, SWRITE transaction, MESSAGE transaction and NREAD transaction, the test device starts a DMA module to prepare for sending or receiving data;
aiming at the DOORBELL transaction, the testing device needs to receive the response of the DOORBELL transaction at the moment, and then verification is completed;
and 4, step 4: for NWRITE transaction, NWRITE _ R transaction, SWRITE transaction and MESSAGE transaction, the test device sends data information to the tested board card, and for NREAD transaction, the test device needs to receive the data information from the tested board card;
and 5: for the NWRITE _ R transaction, after the test device sends data information to the tested board card, the test device waits for response information from the tested board card;
step 6: after the data transmission or reception is finished, closing the DMA module;
and 7: and after the testing device completes one-time testing on all the transactions supported by the SRIO protocol, the verification is finished.
The above description is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, several modifications and variations can be made without departing from the technical principle of the present invention, and these modifications and variations should also be regarded as the protection scope of the present invention.
Claims (10)
1. A testing device for verifying the integrity of an SRIO protocol is characterized by comprising a main program module and an integrated testing case;
the main program module is built based on a Xilinx high-end development platform UltraScale ZCU106 and is connected with the integrated test case through optical fibers;
the integrated test machine box comprises a bottom plate, an optical interface plate and an SRIO exchange plate; therefore, the condition that the tested board card supports the SRIO protocol is tested by relying on the verification device built by the UltraScale ZCU106 development platform, so that the tested board cards from different sources are distinguished and identified rapidly; the bottom plate is provided with a tested board card;
the integrated test case of the verification device is a test environment for realizing the SRIO switching function, and in the integrated test case, a bottom plate is used for supplying power to each daughter board card and providing a physical connection relationship for each daughter board card and the SRIO switching board card; the optical interface board is used for carrying out optical interface communication with an external component and is connected with the SRIO exchange board card through the bottom board; the SRIO switch board card is a core board card of the integrated test case, the daughter boards are interconnected and intercommunicated through the SRIO switch board card, and different daughter boards are distinguished through ID numbers; the tested board card is any functional board card of an SRIO interface;
for the main program module, which is a hardware system built under the embedded development platform UltraScale ZCU106, in order to realize communication and control of SRIO, the main program module comprises a Cortex-A53 processor core module, an AXI bus, an SRIO _ GEN core, a BRAM _ CTRL module, a DMA module and a Bridge module; the core module comprises an SRIO _ GEN core and a Bridge module;
the SRIO _ GEN core is in a 1X mode, the transmission frequency is 2.5Gbps, and the reference clock is 125 MHz;
the Bridge module is used for realizing packet packing of SRIO data, extraction and unloading of loads and the like, and meanwhile, the Bridge module is also used for receiving parameter configuration and state information reading of the BRAM _ CTRL module;
the DMA module is used for realizing the access and storage of the DDR memory space.
2. The device for verifying the integrity of an SRIO protocol as claimed in claim 1, wherein the DDR module is a data storage module for storing test data for facilitating access by a Cortex-a53 processor core module.
3. The test apparatus for verifying SRIO protocol integrity as claimed in claim 2, wherein said Cortex-a53 processor core module is a processor module for implementing control of AXI bus and access control of DDR, and at the same time, overriding the scheduling of the whole test apparatus.
4. The test apparatus for verifying SRIO protocol integrity as claimed in claim 3, wherein said AXI module is a bus module for connecting a processor module and a part of functional unit modules; the functional unit module in the testing device comprises: the device comprises an SRIO _ GEN module, a BRAM _ CTRL module, a DMA module and a Bridge module.
5. The SRIO protocol integrity verification test apparatus as claimed in claim 4, wherein the SRIO _ GEN module is an SRIO protocol IP core module, on one hand, receives control information from the Cortex-a53 processor core module through the AXI module, on the other hand, converts data processed by the Bridge module package into serial data, and sends the serial data to the board under test through the differential data signal lines tx _ p and tx _ n, or sends the board under test data received by the differential data signal lines rx _ p and rx _ n to the Bridge module as packet data conforming to the SRIO protocol package format.
6. The test equipment for verifying the integrity of the SRIO protocol as claimed in claim 5, wherein the BRAM _ CTRL block is configured to define an IP for a user, receive the read-write control information from the Cortex-a53 processor core block through the AXI block, and transmit the read-write control information to the Bridge block downstream.
7. The device for testing the integrity of SRIO protocols according to claim 1, wherein the DMA module is a direct memory access module, and is configured to provide a fast data transmission manner and to implement fast interaction between Bridge module data and DDR module memory data.
8. The device for testing the integrity of SRIO protocols according to claim 7, wherein the Bridge module is configured to define an IP for a user, and to perform a bridging link between the SRIO _ GEN module and the DMA module, thereby implementing bidirectional data transmission.
9. The device for testing the integrity of SRIO protocol according to claim 8, wherein for NWRITE, NWRITE _ R, mainteenance, MESSAGE transaction types in SRIO protocol, valid data is sent from the internal storage structure DDR module, through the AXI module, by the DMA module, after being packed by the Bridge module, is transmitted to the SRIO _ GEN module, and finally is sent to the board card under test through tx _ p and tx _ n signal lines;
aiming at NREAD transaction types in an SRIO protocol, packet data of a tested board card is received by rx _ p and rx _ n signal lines, is transmitted to a Bridge module through an SRIO _ GEN module, is unpacked by the Bridge module, and is transmitted to a DDR module through a DMA module, so that the transfer of effective data is realized.
10. A test method for verifying SRIO protocol integrity based on a test apparatus according to any one of claims 1 to 9, wherein the test method comprises the following steps based on the test apparatus:
step 1: firstly, the testing device selects a transaction Type according to a Type number of an SRIO transaction Type to be verified; the Type number of the NWRITE transaction is 54, the Type number of the NWRITE _ R transaction is 55, the Type number of the SWRITE transaction is 60, the Type number of the MESSAGE transaction is b0, the Type number of the NREAD transaction is 24, and the Type number of the DOORBELL transaction is a 0;
step 2: according to the selected transaction type, the verification device sends a corresponding transaction command to the tested board card;
and step 3: aiming at NWRITE transaction, NWRITE _ R transaction, SWRITE transaction, MESSAGE transaction and NREAD transaction, the test device starts a DMA module to prepare for sending or receiving data;
aiming at the DOORBELL transaction, the testing device needs to receive the response of the DOORBELL transaction at the moment, and then verification is completed;
and 4, step 4: for NWRITE transaction, NWRITE _ R transaction, SWRITE transaction and MESSAGE transaction, the test device sends data information to the tested board card, and for NREAD transaction, the test device needs to receive the data information from the tested board card;
and 5: for the NWRITE _ R transaction, after the test device sends data information to the tested board card, the test device waits for response information from the tested board card;
step 6: after the data transmission or reception is finished, closing the DMA module;
and 7: and after the testing device completes one-time testing on all the transactions supported by the SRIO protocol, the verification is finished.
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| CN113704163B (en) | 2024-04-19 |
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