CN113704162A - Special high-speed data transmission bus for measuring instrument - Google Patents
Special high-speed data transmission bus for measuring instrument Download PDFInfo
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- CN113704162A CN113704162A CN202111022335.XA CN202111022335A CN113704162A CN 113704162 A CN113704162 A CN 113704162A CN 202111022335 A CN202111022335 A CN 202111022335A CN 113704162 A CN113704162 A CN 113704162A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4265—Bus transfer protocol, e.g. handshake; Synchronisation on a point to point bus
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
- G06F13/387—Information transfer, e.g. on bus using universal interface adapter for adaptation of different data processing systems to different peripheral devices, e.g. protocol converters for incompatible systems, open system
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
Abstract
The invention discloses a special high-speed data transmission bus for a measuring instrument, namely PVIB 2.0.a data transmission channel adopts a serial transceiver, a zero slot and a functional module slot are in a point-to-point mode, and the independent transmission of each slot is not interfered with each other, so that the independent transmission bandwidth of each slot can be ensured, the mutual interference among modules can be avoided, and the problems caused by design factors are reduced; the command transmission channel adopts a low-speed universal serial port for saving IO resources; the synchronous control channel adopts a function groove independent feedback state, and a zero groove unified control idea so as to ensure synchronous acquisition control. The data transmission bus can realize the measurement function of the all-channel; the multifunctional module can be inserted, the application of various sensors such as voltage, ICP, strain, charge, constant voltage, current and thermocouple is supported, the multi-channel real-time acquisition and storage is supported, the storage speed is 150-200 MB/S, and the high-speed synchronous measurement among the multi-module channels can be realized based on the high-speed synchronous clock signal and the high-speed synchronous trigger signal.
Description
Technical Field
The invention relates to a data transmission bus, in particular to a data transmission bus special for a measuring instrument.
Background
The data transmission bus is a channel for communication and data exchange among functional components in a system. All the functional components are connected with each other based on a data transmission bus, and data information is transmitted through corresponding protocol standards, so that a complete system is formed, and corresponding functions are realized. The performance of a data transmission bus is usually considered from the point of view of transmission rate, delay time, carrying capacity, security, and reliability of the connector.
The invention patent CN105045748 discloses a PVIB professional virtual instrument bus-PVIB 1.0, the main idea of which is to provide a bus standard integrating analog signal conditioning, transmission, acquisition and digital signal transmission and storage, the technical scheme is as follows: the system comprises a PVIB motherboard, a signal conditioning plug-in module and a data acquisition plug-in module; the PVIB motherboard is provided with slot positions, and the slot positions comprise 16 analog signal slot positions, 16 digital signal slot positions and 3 function expansion slot positions; the signal conditioning plug-in module and the data acquisition plug-in module are butted between the slot positions on the PVIB wood board. The application integrates an analog signal and a digital signal into an integral open standard instrument bus; the channel integration level is high, and 112 parallel acquisition channels and thousands of serial acquisition channels are supported; high-speed synchronous measurement among multiple module channels can be realized based on the high-speed synchronous clock signal and the high-speed synchronous trigger signal.
However, the PVIB dedicated virtual instrument bus adopts a parallel differential mode, a large amount of IO resources need to be occupied in product design, multiple slots are used in parallel, a back plate and a module, and the module all affect and interfere with each other during design, wiring is very complex, and problems such as timing sequence matching and interference are prone to occur during design.
In view of this, the present application is specifically made.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: the PVIB special virtual instrument bus adopts a parallel differential mode, a large amount of IO resources need to be occupied in product design, multiple grooves are used in a combined mode, a back plate and a module and the module can influence and interfere with each other in design, wiring is very complex, the problems of time sequence matching, interference and the like easily occur in design, the purpose is to provide the special data transmission bus for the measuring instrument, independent transmission bandwidth of each groove can be achieved, the mutual interference among the modules is avoided, the problems caused by design factors are reduced, and the IO resources are saved at the same time.
The invention is realized by the following technical scheme:
a high-speed data transmission bus special for a measuring instrument comprises a data transmission module, a zero slot module, a plurality of functional modules and a back plate; the data transmission module is bridged between the zero slot module and the back plate; the data transmission module comprises a plurality of groups of data transmission channels, the backboard comprises a plurality of slot positions, the data transmission channels correspond to the slot positions one by one, and the slot positions correspond to the functional modules one by one; and the functional modules are inserted into the slot positions and form point-to-point communication connection with the zero slot module. The data transmission module comprises a printed circuit board, and a plurality of groups of data transmission channels are integrated on the printed circuit board; each set of the data transmission channels comprises a high-speed data transmission line, a command transmission line, a synchronization signal transmission line and a module state signal transmission line.
Compared with a PVIB professional virtual instrument bus, the special high-speed data transmission bus for the measuring instrument provided by the invention provides a concept of data, command and synchronous control partition, namely: the data transmission channel adopts a serial transceiver, and a mode of 1-to-1 of a zero groove and a functional module groove is adopted, so that a high-speed data transmission channel is constructed, high-speed data transmission among modules is realized, and independent transmission of all grooves is not interfered with each other, so that independent transmission bandwidths of all grooves can be ensured, mutual interference among modules can be avoided, and the problems caused by design factors are reduced; the command transmission channel adopts a low-speed universal serial port for saving IO resources; the synchronous control channel adopts a function groove independent feedback state, and a zero groove unified control idea so as to ensure synchronous acquisition control. The command transmission channel, the synchronous control channel and the state feedback channel form the application function of the instrument bus.
As a further description of the invention, the printed circuit board is a Standard FR4 board.
As a further description of the present invention, the slot includes: the system comprises an SRIO interface, a low-speed serial interface, an FPGA parallel interface, a common serial interface and a common parallel interface; the SRIO interface corresponds to the high-speed data transmission line, the low-speed serial interface corresponds to the command transmission line, the FPGA parallel interface corresponds to the synchronous signal transmission line, and the common serial interface and the common parallel interface correspond to the module state signal transmission line.
As a further description of the invention, the number of the slots is 4-12.
Further description of the invention, the zero slot module includes a 3.5 inch embedded industrial control board and a zero slot board; an SATA solid-state disk is hung on the 3.5-inch embedded industrial control board, and the 3.5-inch embedded industrial control board comprises a gigabit network interface, a USB2.0 interface and a WIFI interface; the zero-slot board comprises an FPGA main chip and an FPGA auxiliary chip, wherein the FPGA main chip and the FPGA auxiliary chip are respectively connected with 1 DDR memory chip.
Further description of the invention, the functional modules include a conditioning module, an ADC acquisition module and an acquisition board.
Further described, the conditioning module includes an internal interface including a dual row connector and an external interface including a standard 4-core shielded connector; the acquisition module includes analog input interface, digital interface, LVDS interface and SPI interface, analog input interface includes MMCX shielded connector, digital interface welds on the acquisition board.
Further description of the invention, the standard pitch of the dual row connector is 2.54 mm.
Compared with the prior art, the invention has the following advantages and beneficial effects:
1. the special high-speed data transmission bus for the measuring instrument provided by the embodiment of the invention realizes the inter-module high-speed data transmission in a point-to-point mode, and the transmission speed reaches 400-500 MB/S;
2. the embodiment of the invention provides a special high-speed data transmission bus for a measuring instrument, which can realize the measuring function of a multi-channel;
3. the high-speed data transmission bus special for the measuring instrument, provided by the embodiment of the invention, can be inserted into various functional modules and supports the application of various sensors such as voltage, ICP, strain, charge, constant voltage, current, thermocouples and the like;
4. the high-speed data transmission bus special for the measuring instrument provided by the embodiment of the invention supports multi-channel real-time acquisition and storage, and the storage speed is 150-200 MB/S;
5. the high-speed data transmission bus special for the measuring instrument provided by the embodiment of the invention can realize high-speed synchronous measurement among multiple module channels based on the high-speed synchronous clock signal and the high-speed synchronous trigger signal.
Drawings
In order to more clearly illustrate the technical solutions of the exemplary embodiments of the present invention, the drawings that are required to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and that for those skilled in the art, other related drawings can be obtained from these drawings without inventive effort.
Fig. 1 is a schematic structural diagram of a measuring instrument according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a zero-slot module according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a functional module according to an embodiment of the present invention.
Reference numbers and corresponding part names in the drawings:
the system comprises a data transmission module 1, a zero slot module 2, a plurality of functional modules 3, a backplane 4, a data transmission channel 11 and a slot position 41.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail below with reference to examples and accompanying drawings, and the exemplary embodiments and descriptions thereof are only used for explaining the present invention and are not meant to limit the present invention.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be apparent to one of ordinary skill in the art that: it is not necessary to employ these specific details to practice the present invention. In other instances, well-known structures, circuits, materials, or methods have not been described in detail so as not to obscure the present invention.
Throughout the specification, reference to "one embodiment," "an embodiment," "one example," or "an example" means: the particular features, structures, or characteristics described in connection with the embodiment or example are included in at least one embodiment of the invention. Thus, the appearances of the phrases "one embodiment," "an embodiment," "one example" or "an example" in various places throughout this specification are not necessarily all referring to the same embodiment or example. Furthermore, the particular features, structures, or characteristics may be combined in any suitable combination and/or sub-combination in one or more embodiments or examples. Further, those of ordinary skill in the art will appreciate that the illustrations provided herein are for illustrative purposes and are not necessarily drawn to scale. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
In the description of the present invention, the terms "front", "rear", "left", "right", "upper", "lower", "vertical", "horizontal", "upper", "lower", "inner", "outer", etc. indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience of description and simplicity of description, but do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed in a particular orientation, and be operated, and therefore, should not be construed as limiting the scope of the present invention.
Examples
Aiming at the fact that a parallel differential mode is adopted by a PVIB special virtual instrument bus, a large amount of IO resources are occupied in product design, in addition, the multiple slots are used in combination, the back plate and the module, the module and the module can mutually influence and interfere in design, wiring is very complex, and problems of time sequence matching, interference and the like easily occur in design, the embodiment provides the high-speed data transmission bus special for the measuring instrument, which is a bus standard integrating analog signal conditioning, transmission, acquisition and digital signal transmission and storage, namely PVIB2.0, defined on the basis of a PVIB special virtual instrument bus-PVIB 1.0, the open bus standard for the measurement field defines a data transmission channel, a synchronous control channel and a state feedback channel of each functional module slot position, and the measuring instrument built based on the standard is very suitable for realizing various requirements in the measurement field.
The special high-speed data transmission bus-PVIB 2.0 for the measuring instrument comprises a data transmission module 1, a zero slot module 2, a plurality of functional modules 3 and a back plate 4; the data transmission module 1 is bridged between the zero slot module 2 and the backboard 4; the data transmission module 1 comprises a plurality of groups of data transmission channels 11, the backplane 4 comprises a plurality of slot positions 41, the data transmission channels 11 correspond to the slot positions 41 one by one, and the slot positions 41 correspond to the functional modules one by one; the plurality of functional modules are inserted into the plurality of slot positions 41, and form point-to-point communication connection with the zero slot module 2 through the plurality of groups of data transmission channels 11, so as to form a high-speed data transmission bus-PVIB 2.0 special for the measuring instrument. The data transmission module 1 comprises a printed circuit board, and a plurality of groups of data transmission channels 11 are integrated on the printed circuit board; each set of the data transmission channels 11 includes a high-speed data transmission line, a command transmission line, a synchronization signal transmission line, and a module status signal transmission line. The physical structure of PVIB2.0 is shown in FIG. 1.
Compared with the PVIB professional virtual instrument bus, the high-speed data transmission bus special for the measuring instrument, PVIB2.0, provides a data, command and synchronous control partition concept, namely: the data transmission channel 11 adopts a serial transceiver, and a mode of zero slot to 1 functional module slot is adopted, so that the high-speed data transmission channel 11 is constructed, the high-speed data transmission between modules is realized, and the independent transmission of each slot is not interfered with each other, thereby ensuring that each slot has independent transmission bandwidth, avoiding the mutual interference between the modules and reducing the problems caused by design factors; the command transmission channel adopts a low-speed universal serial port for saving IO resources; the synchronous control channel adopts a function groove independent feedback state, and a zero groove unified control idea so as to ensure synchronous acquisition control. The command transmission channel, the synchronous control channel and the state feedback channel form the application function of the instrument bus.
The printed circuit board is made of a Standard FR4 board. The control of Printed Circuit Board (PCB) insulation directly determines the intensity of noise and crosstalk generated by the fast switching of I/O signals. The dielectric constant of the PCB dielectric material directly affects the impedance of the transmission line. The lower the dielectric constant of the dielectric material, the faster the signal propagates. Choosing the appropriate dielectric material reduces the dielectric losses of the PCB, since the dielectric losses dominate over the conductor losses at signal frequencies above 1 GHz. For a given dielectric material, the dielectric loss is determined by the loss ratio and dissipation factor, and a smaller variation in loss ratio will result in lower attenuation of high frequencies for high speed signals. Thus, the present example selects a Standard FR4 board material as the printed circuit board based on the dielectric constant and dissipation factor information for the various dielectric materials in the PCB design as shown in the table below.
In order to ensure high-speed data transmission and avoid the data transmission bandwidth overhead occupied by a protocol control command, the protocol separates high-speed data transmission from a command transmission line and a synchronous signal transmission line. For a plurality of slots 41 on the backplane 4, each slot 41 includes: the system comprises an SRIO interface, a low-speed serial interface, an FPGA parallel interface, a common serial interface and a common parallel interface; the SRIO interface corresponds to the high-speed data transmission line, the low-speed serial interface corresponds to the command transmission line, the FPGA parallel interface corresponds to the synchronous signal transmission line so as to meet the requirement of signal instantaneity, the wiring is equal in length, and the logic delay is smaller than 100ps so as to ensure the synchronism among the modules; the common serial interface and the common parallel interface correspond to the module state signal transmission line. The module state feedback is to the collection state and the work state of each module to indicate, adopt the parallel port serial ports to use the way of using in mixture, to synchronous relevant state sign with parallel port IO feedback to the zero groove, and with synchronous irrelevant state then with serial ports feedback, if: module slot number 41, additional conditioning function type and status, etc.
It should be noted that, the number of the slot 41 is 4 to 12, and a measurement function of hundreds of channels can be realized.
In addition, the zero slot module 2 includes a 3.5 inch embedded industrial control board and a zero slot board, and the structural schematic diagram thereof refers to fig. 2. An SATA solid-state disk is hung on the 3.5-inch embedded industrial control board, so that the storage speed is increased; the 3.5-inch embedded industrial control board comprises a gigabit network interface, a USB2.0 interface and a WIFI interface and is responsible for the communication of an upper computer and the analysis and storage of the acquired data. The zero-slot board comprises an FPGA main chip and an FPGA auxiliary chip and is responsible for synchronous control of all the functional modules and data acquisition and receiving work. The FPGA main chip is responsible for data receiving and acquisition synchronous control of the slot position 41 and command communication between the zero slot and the functional module; the FPGA auxiliary chip is responsible for receiving data of the slot position 41, and the FPGA main chip and the FPGA auxiliary chip are respectively connected with 1 DDR storage chip. And data received by each FPGA is transferred to the industrial control board through a respective USB3.0 interface, and then the industrial control board stores the acquired data to the upper computer and stores the acquired data into the solid-state disk respectively.
Furthermore, the functional module comprises a conditioning module, an ADC acquisition module and an acquisition board. The analog signal conditioning module is responsible for conditioning four paths of analog signals, can realize the excitation of sensors such as ICP (inductively coupled plasma), strain, thermocouple and the like, and can filter, amplify and condition voltage signals (single-ended/differential), charge signals and current signals; the conditioned analog signals are directly connected to the acquisition modules through shielded cables, each acquisition module is responsible for acquiring analog signals of four channels, functional pins of the acquisition modules in the same series are mutually compatible (200K-65 Msps), the conditioning modules with different functions can be mutually combined on the same acquisition bottom plate to realize signal conditioning with different functions, for example, an 8-channel acquisition card can be composed of a 4-channel strain conditioning and a 4-channel charge conditioning, and can simultaneously acquire the strain signals, the charge signals and the voltage signals on one acquisition card. The structural schematic diagram of the functional module refers to fig. 3.
It should be further explained that the conditioning module comprises an internal interface and an external interface, the internal interface comprises a double-row connector with a standard distance of 2.54mm, the double-row connector is used for supplying power to the module and controlling amplification, filtering and the like by using a UART (universal asynchronous receiver/transmitter), and an MMCX (millimeter-wavelength X) shielding connector is adopted to output an analog signal to the acquisition module. The external interface includes a standard 4-core shielded connector for analog signal input. The acquisition module comprises an analog input interface and a digital interface, wherein the analog input interface comprises an MMCX shielded connector and is used for inputting the conditioned analog signal into the module; the digital interface is welded on the acquisition board by adopting a stamp hole technology so as to reduce interference and save the material cost of adopting other connectors. It should be noted that, in order to maximize the utilization of the acquisition board and ensure that both the high-speed and low-speed acquisition chips can be used, the LVDS interface and the SPI interface are simultaneously reserved for the interfaces.
The above-mentioned embodiments are intended to illustrate the objects, technical solutions and advantages of the present invention in further detail, and it should be understood that the above-mentioned embodiments are merely exemplary embodiments of the present invention, and are not intended to limit the scope of the present invention, and any modifications, equivalent substitutions, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (9)
1. A high-speed data transmission bus special for a measuring instrument is characterized in that,
the system comprises a data transmission module (1), a zero slot module (2), a plurality of functional modules (3) and a back plate (4);
the data transmission module (1) is bridged between the zero slot module (2) and the back plate (4);
the data transmission module (1) comprises a plurality of groups of data transmission channels (11), the backboard (4) comprises a plurality of slot positions, the data transmission channels (11) are in one-to-one correspondence with the slot positions, and the slot positions are in one-to-one correspondence with the functional modules (3);
the functional modules (3) are plugged into the slots (41) and form point-to-point communication connection with the zero slot module (2).
2. The high-speed data transmission bus for measuring instruments according to claim 1,
the data transmission module (1) comprises a printed circuit board, and a plurality of groups of data transmission channels (11) are integrated on the printed circuit board;
each set of the data transmission channels (11) comprises a high-speed data transmission line, a command transmission line, a synchronization signal transmission line and a module state signal transmission line.
3. The high-speed data transmission bus special for measuring instruments according to claim 2, wherein the printed circuit board is a Standard FR4 board.
4. The high-speed data transmission bus for measuring instruments according to claim 2 or 3,
the slot (41) includes: the system comprises an SRIO interface, a low-speed serial interface, an FPGA parallel interface, a common serial interface and a common parallel interface;
the SRIO interface corresponds to the high-speed data transmission line, the low-speed serial interface corresponds to the command transmission line, the FPGA parallel interface corresponds to the synchronous signal transmission line, and the common serial interface and the common parallel interface correspond to the module state signal transmission line.
5. The high-speed data transmission bus special for the measuring instrument is characterized in that the number of the slots (41) is 4-12.
6. The high-speed data transmission bus for measuring instruments according to claim 1,
the zero slot module (2) comprises a 3.5-inch embedded industrial control board and a zero slot board;
an SATA solid-state disk is hung on the 3.5-inch embedded industrial control board, and the 3.5-inch embedded industrial control board comprises a gigabit network interface, a USB2.0 interface and a WIFI interface;
the zero-slot board comprises an FPGA main chip and an FPGA auxiliary chip, wherein the FPGA main chip and the FPGA auxiliary chip are respectively connected with 1 DDR memory chip.
7. The high-speed data transmission bus special for the measuring instrument according to claim 1, wherein the functional module (3) comprises a conditioning module, an ADC acquisition module and an acquisition board.
8. The high-speed data transmission bus for measuring instruments according to claim 7,
the conditioning module comprises an internal interface and an external interface, the internal interface comprises a double-row connector, and the external interface comprises a standard 4-core shielding connector;
the acquisition module includes analog input interface, digital interface, LVDS interface and SPI interface, analog input interface includes MMCX shielded connector, digital interface welds on the acquisition board.
9. The high-speed data transmission bus special for measuring instruments according to claim 8, wherein the standard pitch of the double row connectors is 2.54 mm.
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| CN114967838A (en) * | 2022-05-23 | 2022-08-30 | 中国工程物理研究院激光聚变研究中心 | Wide-space ultra-low jitter synchronous signal generation system and method |
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