CN113687530B - Silicon-based electro-optic modulator and preparation method thereof - Google Patents

Abstract

The invention provides a silicon-based electro-optic modulator and a preparation method thereof. The method comprises selecting SOI wafer with multilayer structure, which comprises silicon substrate, first silicon dioxide buried layer and top silicon layer from bottom to top; preparing a second silicon dioxide buried layer in the top silicon layer, dividing the top silicon layer into an upper layer and a lower layer, wherein the upper layer is a first silicon layer, the lower layer is a waveguide layer, a part of the second silicon dioxide buried layer is upwards protruded to enable the lower waveguide layer to form a ridge structure, the upwards protruded part of the ridge structure is a silicon waveguide, the second silicon dioxide buried layer is internally provided with compressive stress, the first silicon layer and the waveguide layer are outwards extruded, so that the left upper corner and the right upper corner of the silicon waveguide are changed in atomic arrangement due to extrusion, and second-order nonlinear polarization rate is induced in the silicon waveguide; and the GSG single-drive coplanar waveguide traveling wave electrode is arranged on the first silicon layer, so that an applied electric field can reach the silicon waveguide. The invention solves the problems that the bandwidth of the conventional silicon electro-optic modulator is limited by the carrier transportation time and is difficult to improve, and has small insertion loss and 3D photon integration.

Description

Silicon-based electro-optical modulator and preparation method thereof

Technical field

The invention relates to a silicon-based electro-optical modulator and a preparation method thereof.

Background technique

Silicon base has the advantages of small size, low energy consumption, CMOS process compatibility, and ease of monolithic and micro-nano integration with existing electronic devices and photonic devices. Silicon base is used to achieve light generation, modulation, transmission, control, and detection. Functional silicon photonics has been recognized as one of the ideal technologies to break through the bottleneck of ultra-large capacity and ultra-high-speed information transmission and processing in computers and communications. Silicon photonics has attracted great attention from researchers and has become a hot spot in the field of optoelectronics research in recent years. At present, key devices based on silicon, such as Raman lasers, electro-optical modulators, photodetectors, wavelength conversion, optical logic gates, code conversion, optical filtering, etc., have been proposed, promoting the development of silicon-based photonics. Research results have been widely used in fields such as optical communications and optical sensing, and also present attractive prospects in photonic integration, optical interconnection, and optical computing.

Silicon electro-optical modulator is the most critical device among silicon-based devices, playing an important role in converting electrical signals into optical signals. However, silicon has a central inversion symmetry crystal structure and does not have a second-order nonlinear polarizability χ ⁽²⁾ . Therefore, silicon does not have electro-optical modulation properties (Pockels effect). Silicon electro-optical modulators are generally based on the plasma dispersion effect, which causes the injection, accumulation or depletion of free carriers through doping, changing the free carrier concentration to change the refractive index of silicon, thus playing a modulation role. The bandwidth of silicon electro-optical modulators based on the plasmon dispersion effect is limited by the carrier transport time and is difficult to increase, and doping causes the modulation speed and nonlinearity to decrease and causes insertion loss.

Contents of the invention

To address the above problems, the present invention provides a silicon-based electro-optical modulator and a preparation method thereof.

One aspect of the present invention provides a silicon-based electro-optical modulator, including: an SOI wafer. The SOI wafer has a multi-layer structure, and from bottom to top is a silicon substrate, a first silicon dioxide buried layer, and a top silicon layer. ; The second buried silicon dioxide layer is buried in the top silicon layer. The top silicon layer is divided into upper and lower layers. The upper layer is the first silicon layer and the lower layer is the waveguide layer. Part of the second buried silicon dioxide layer protrudes upward. rise, causing the waveguide layer below to form a ridge structure. The upward convex part of the ridge structure is the silicon waveguide. There is compressive stress inside the second buried silicon dioxide layer, which squeezes the first silicon layer and the waveguide layer outward; GSG single drive The coplanar waveguide traveling wave electrode is disposed on the first silicon layer so that the electric field applied by the GSG single-driven coplanar waveguide traveling wave electrode can reach the silicon waveguide.

Another aspect of the present invention provides a method for preparing a silicon-based electro-optical modulator, which includes: selecting an SOI wafer. The SOI wafer has a multi-layer structure, and from bottom to top is a silicon substrate and a first buried silicon dioxide layer. , top silicon layer; prepare a second buried silicon dioxide layer in the top silicon layer, divide the top silicon layer into upper and lower layers, the upper layer is the first silicon layer, and the lower layer is the waveguide layer, wherein the second buried silicon dioxide layer A part of it bulges upward, causing the waveguide layer below to form a ridge structure. The upward bulge part of the ridge structure is a silicon waveguide. There is compressive stress inside the second buried silicon dioxide layer, which squeezes the first silicon layer and the waveguide layer outward; A GSG single-driven coplanar waveguide traveling wave electrode is arranged on the first silicon layer, so that the electric field applied by the GSG single-driven coplanar waveguide traveling wave electrode can reach the silicon waveguide.

Further, in the silicon-based electro-optical modulator preparation method of the present invention, preparing the second buried silicon dioxide layer includes: performing a thermal oxidation reaction on the upper surface of the top silicon layer, so that a first silicon dioxide layer is formed on the upper part of the top silicon layer; Transfer the mask pattern to the first silicon dioxide layer, and etch the first silicon dioxide layer according to the mask pattern to obtain a silicon dioxide waveguide; on the surface of the silicon dioxide waveguide and the top silicon layer exposed by etching Deposit silicon dioxide to form a second silicon dioxide layer with a certain thickness; inject oxygen ions from top to bottom through the second silicon dioxide layer and the silicon dioxide waveguide into the top silicon layer to form an oxygen ion-rich layer, where , the part of the oxygen-rich ion layer below the silicon dioxide waveguide bulges upward; high-temperature annealing causes the oxygen ions in the oxygen-rich ion layer to react with the silicon atoms in the oxygen-rich ion layer to generate a second buried silicon dioxide layer.

Further, the method for preparing a silicon-based electro-optical modulator of the present invention, before high-temperature annealing, includes: etching the second silicon dioxide layer and the silicon dioxide waveguide to expose the top silicon layer; depositing on the top silicon layer High-density silicon dioxide protective layer to prevent the top silicon layer from being oxidized.

Furthermore, according to a method for preparing a silicon-based electro-optical modulator of the present invention, after high-temperature annealing, the high-density silicon dioxide protective layer is etched to expose the first silicon layer.

Further, according to the silicon-based electro-optical modulator preparation method of the present invention, the thickness of the top silicon layer is 600nm.

Further, according to the silicon-based electro-optical modulator preparation method of the present invention, the thickness of the first silicon dioxide layer is 100 nm.

Further, according to the silicon-based electro-optical modulator preparation method of the present invention, the thickness of the second silicon dioxide layer is 50 nm.

Furthermore, according to the silicon-based electro-optical modulator preparation method of the present invention, the total dose of oxygen ion implantation ranges from 2×10 ¹⁷ to 7×10 ¹⁷ /cm ² , and the energy range of oxygen ion injection ranges from 150 to 200KeV.

Furthermore, according to the silicon-based electro-optical modulator preparation method of the present invention, the high-temperature annealing temperature is 1200°C and the time is 2 to 3 hours.

The invention has the following beneficial effects:

(1) Through oxygen ion implantation and high-temperature annealing, the waveguide pattern is transferred to the buried layer to form a buried-layer ridge silicon waveguide structure. By controlling the high-temperature annealing temperature and time, the stress level in the ridge silicon waveguide is adjusted to break the silicon The central inversion symmetry structure induces a second-order nonlinear polarizability χ ⁽²⁾ in the ridge silicon waveguide, thereby giving the ridge silicon waveguide electro-optical modulation characteristics and realizing a high-speed electro-optic modulator, overcoming the conventional silicon electro-optic modulator. The bandwidth is limited by the problem that the carrier transport time is difficult to improve.

(2) Electro-optical modulation is achieved by utilizing the second-order nonlinear polarizability in the buried-layer ridge silicon waveguide structure. The buried-layer ridge silicon waveguide structure is formed by transferring the waveguide pattern to the buried layer, avoiding the problems encountered in conventional silicon electro-optical modulators. The problem of high sidewall roughness caused by etching and high insertion loss caused by ion implantation in preparing silicon waveguides, so the insertion loss is small.

(3) The silicon electro-optical modulator is in the buried layer, and the first silicon layer can be used to prepare other optoelectronic devices, thereby enabling 3D photonic integration.

Description of the drawings

Figure 1 is a schematic structural diagram of the silicon-based electro-optical modulator of the present invention;

Figure 2 is a schematic flow chart of the silicon-based electro-optical modulator preparation method of the present invention;

Figure 3 is a schematic flow chart of the preparation method of the silicon-based electro-optical modulator in preparing the second silicon dioxide buried layer according to some embodiments of the present invention;

Figure 4 is a schematic diagram of the steps of a silicon-based electro-optical modulator preparation method according to one embodiment of the present invention;

Figure 5 is a light field and electric field distribution diagram of a silicon-based electro-optical modulator according to an embodiment of the present invention.

In the picture:

1-Silicon substrate; 2-First buried silicon dioxide layer; 3-Top silicon layer; 4-Second buried silicon dioxide layer; 5-First silicon layer; 6-Waveguide layer; 7-Silicon waveguide; 8 -GSG single-driven coplanar waveguide traveling wave electrode; 9- first silicon dioxide layer; 10- silicon dioxide waveguide; 11- second silicon dioxide layer; 12- oxygen-rich ion layer; 13- high-density silicon dioxide The protective layer.

Detailed ways

In order to make the purpose, technical solutions and advantages of the present invention more clear, the present invention will be further described in detail below with reference to specific embodiments and the accompanying drawings.

Figure 1 shows a schematic structural diagram of the silicon-based electro-optical modulator of the present invention.

The silicon-based electro-optical modulator of the present invention includes an SOI (Silicon-On-Insulator, silicon on an insulating substrate) wafer. The SOI wafer has a multi-layer structure. From bottom to top, there are silicon substrate 1, first and second Silicon oxide buried layer 2 and top silicon layer 3. A second buried silicon dioxide layer 4 is buried in the top silicon layer 3, so that the second buried silicon dioxide layer 4 divides the top silicon layer 3 into two upper and lower layers. The upper layer is the first silicon layer 5, and the lower layer is the waveguide layer 6. . Among them, a part of the second silicon dioxide buried layer 4 is convex upward, so that the lower waveguide layer 6 forms a ridge structure, and the upward convex part of the ridge structure is the silicon waveguide 7 .

There is compressive stress inside the second silicon dioxide buried layer 4, which squeezes the first silicon layer 5 and the waveguide layer 6 outward, so that the upper left corner and the upper right corner of the silicon waveguide 7 are squeezed, causing the atomic arrangement structure to change. In the silicon waveguide 7, the second-order nonlinear polarizability is induced.

The GSG single-driven coplanar waveguide traveling wave electrode 8 is disposed on the first silicon layer 5 so that the electric field applied by the GSG single-driven coplanar waveguide traveling wave electrode 8 can reach the silicon waveguide 7 .

The preparation method of the silicon-based electro-optical modulator of the present invention is introduced below. Figure 2 is a schematic flow chart of the silicon-based electro-optical modulator preparation method of the present invention, which includes:

S201, select an SOI wafer. The SOI wafer has a multi-layer structure, consisting of silicon substrate 1, first silicon dioxide buried layer 2, and top silicon layer 3 from bottom to top. The thickness of the top silicon layer 3 is preferably 600 nm.

S202, prepare a second buried silicon dioxide layer 4 in the top silicon layer 3, and divide the top silicon layer 3 into upper and lower layers. The upper layer is the first silicon layer 5, and the lower layer is the waveguide layer 6.

In step S202, a portion of the prepared second silicon dioxide buried layer 4 is convex upward, so that the lower waveguide layer 6 forms a ridge structure, and the upward convex part of the ridge structure is the silicon waveguide 7.

There is compressive stress inside the second silicon dioxide buried layer 4, which squeezes the first silicon layer 5 and the waveguide layer 6 outward, so that the upper left corner and the upper right corner of the silicon waveguide 7 are squeezed, causing the atomic arrangement structure to change. In the silicon waveguide 7, the second-order nonlinear polarizability is induced.

S203, set the GSG single-driven coplanar waveguide traveling wave electrode 8 on the first silicon layer 5, so that the electric field applied by the GSG single-driven coplanar waveguide traveling wave electrode 8 can reach the silicon waveguide 7. In some embodiments, the present invention uses evaporation or electroplating to connect the GSG single-driven coplanar waveguide traveling wave electrode 8 to the first silicon layer 5 .

Figure 3 is a schematic flowchart of the preparation method of the silicon-based electro-optical modulator in preparing the second buried silicon dioxide layer according to some embodiments of the present invention. In some embodiments of the present invention, preparing the second buried silicon dioxide layer 4 also includes:

S2021, perform a thermal oxidation reaction on the upper surface of the top silicon layer 3, so that the first silicon dioxide layer 9 is formed on the top of the top silicon layer 3. The thickness of the first silicon dioxide layer 9 is preferably 100 nm.

S2022, transfer the mask pattern to the first silicon dioxide layer 9, and etch the first silicon dioxide layer 9 according to the mask pattern to obtain the silicon dioxide waveguide 10. Etching can use dry etching such as plasma etching, reactive ion etching, or wet etching.

S2023, deposit silicon dioxide on the surface of the silicon dioxide waveguide 10 and the top silicon layer 3 exposed by etching to form a second silicon dioxide layer 11 with a certain thickness. Silicon dioxide can be deposited using plasma enhanced chemical vapor deposition (PECVD) with a deposition thickness of 50nm.

S2024, inject oxygen ions from top to bottom through the second silicon dioxide layer 11 and the silicon dioxide waveguide 10 into the top silicon layer 3 to form an oxygen ion-rich layer 12, wherein the oxygen ion-rich layer 12 is in the silicon dioxide layer. The lower part of the waveguide 10 is raised upward.

In step S2024, when oxygen ions are implanted, since the thickness of the silicon dioxide barrier layer formed by the second silicon dioxide layer 11 and the silicon dioxide waveguide 10 above the top silicon layer 3 is different, the thickness of the silicon dioxide barrier layer is different when the oxygen ions are implanted. The portion below the waveguide 10 is implanted more shallowly than other locations, so the formed oxygen ion-rich layer 12 bulges upward in the portion below the silicon dioxide waveguide 10 .

In some embodiments, the total dose of oxygen ion implantation ranges from 2×10 ¹⁷ to 7×10 ¹⁷ /cm ² , and the oxygen ion implantation energy ranges from 150-200KeV.

In some embodiments, in order to make the distribution of oxygen ions in the oxygen-rich layer 12 uniform, 1/4 of the total dose is injected each time, and then the SOI wafer is rotated 90° in a certain direction around the center of the wafer, and oxygen is injected repeatedly. ions and rotate the SOI wafer 90° around the center of the wafer in the same direction until all oxygen ions are evenly implanted into the top silicon layer 3.

S2025 , high-temperature annealing causes oxygen ions in the oxygen-ion-rich layer 12 to react with silicon atoms in the oxygen-ion-rich layer 12 to generate the second silicon dioxide buried layer 4 .

In step S2025, high-temperature annealing causes the oxygen ions located in the gaps between silicon atoms in the oxygen ion-rich layer 12 to react with the original silicon atoms at the positions to form a uniform second silicon dioxide buried layer 4. Since the oxygen ion-rich layer 12 has a portion that bulges upward, a corresponding portion of the second silicon dioxide buried layer 4 generated by the reaction also bulges upward. At this time, the lower waveguide layer 6 forms a ridge structure, and the upward convex part of the ridge structure is the silicon waveguide 7 .

Since silicon and silicon dioxide have different molar volumes, the molar volume of silicon is 12.17cm ³ /mol and the molar volume of silicon dioxide is 27.27cm ³ /mol, so when the molar volume in the oxygen-rich layer 12 When oxygen ions react with silicon atoms to form a uniform second silicon dioxide buried layer 4, the volume there will expand 2.2 times. Volume expansion will generate compressive stress inside the second silicon dioxide buried layer 4 and compress surrounding materials, such as compressing the first silicon layer 5 and the waveguide layer 6 . Since the waveguide layer 6 has a ridge structure, the volume expansion of the second silicon dioxide buried layer 4 can compress the upper left corner and the upper right corner of the silicon waveguide 7, causing the internal atomic arrangement structure of the silicon waveguide 7 to change, breaking the central inversion symmetry structure of silicon. Second-order nonlinear polarizability is induced in silicon.

In addition, during the high-temperature annealing stage, the high-temperature environment can catalyze the formation of SiO ₂ , thereby accelerating the generation of stress. As the high-temperature annealing temperature increases and the time increases, silicon and silicon dioxide are in a state between solid and liquid, and their viscosity decreases, stress It is gradually released, so by controlling the high-temperature annealing temperature and time, the stress level in the silicon waveguide 7 can be adjusted.

In order to make the stress in the silicon waveguide 7 as high as possible and reduce the stress in the first silicon layer 5 at the same time, in some embodiments, the annealing temperature is 1200°C and the annealing time is 2 to 3 hours.

The damage caused by oxygen ion implantation in the first silicon layer 5 is repaired during high-temperature annealing, and can be used to prepare other optoelectronic devices, thereby vertically integrating with the formed ultra-low loss silicon waveguide 7 to achieve 3D integration. Adapt to future large-scale optoelectronics integration.

In some embodiments, the high-temperature annealing also includes: etching the second silicon dioxide layer 11 and the silicon dioxide waveguide 10 to expose the top silicon layer 3. The etching may use a plasma etching method; A high-density silicon dioxide protective layer 13 is deposited on 3 to prevent the top silicon layer 3 from being oxidized during the high-temperature annealing process.

In some embodiments, inductively coupled plasma enhanced chemical vapor deposition (ICPECVD) is used to deposit the high-density silicon dioxide protective layer 13, and the thickness of the deposited high-density silicon dioxide protective layer 13 is 350 nm. After completing the high-temperature annealing, the high-density silicon dioxide protective layer 13 is removed, for example, directly by etching. At this time, the upper surface of the first silicon layer 5 is exposed.

The preparation method of the silicon-based electro-optical modulator of the present invention will be described in detail below with a specific embodiment. Figure 4 is a schematic diagram of the steps of a method for preparing a silicon-based electro-optical modulator according to one embodiment of the present invention.

(1) Select an SOI wafer. The SOI wafer includes a three-layer structure, from bottom to top, silicon substrate 1, first buried silicon dioxide layer 2, and top silicon layer 3. The thickness of top silicon layer 3 is 600nm. .

(2) A thermal oxidation reaction is performed on the upper surface of the top silicon layer 3 to form a first silicon dioxide layer 9 on the top surface of the top silicon layer 3, where the thickness of the first silicon dioxide layer 9 is 100 nm.

(3) Transfer the mask pattern to the first silicon dioxide layer 9, and use the plasma etching method to etch the first silicon dioxide layer 9 according to the mask pattern to obtain the silicon dioxide waveguide 10.

(4) Use a plasma-enhanced chemical vapor deposition method to deposit silicon dioxide on the surface of the silicon dioxide waveguide 10 and the top silicon layer 3 exposed by etching to form a second silicon dioxide layer 11 with a thickness of 50 nm.

(5) Inject oxygen ions from top to bottom through the second silicon dioxide layer 11 and the silicon dioxide waveguide 10 into the top silicon layer 3 to form an oxygen ion-rich layer 12, wherein the oxygen ion-rich layer 12 is formed in the silicon dioxide layer 12. The lower part of the silicon waveguide 10 is raised upward. The total dose of oxygen ion implantation is 2×10 ¹⁷ /cm ² , and the oxygen ion implantation energy is 150KeV.

(6) Use a plasma etching method to etch the second silicon dioxide layer 11 and the silicon dioxide waveguide 10 to expose the top silicon layer 3 .

(7) Use the inductively coupled plasma enhanced chemical vapor deposition method to deposit a high-density silicon dioxide protective layer 13 on the top silicon layer 3 to prevent the top silicon layer 3 from being oxidized during the high-temperature annealing process.

(8) High-temperature annealing causes the oxygen ions in the oxygen ion-rich layer 12 to react with the silicon atoms in the oxygen ion-rich layer 12 to form the second silicon dioxide buried layer 4 .

(9) Use plasma etching to remove the high-density silicon dioxide protective layer 13 to expose the upper surface of the first silicon layer 5 .

(10) Connect the GSG single-driven coplanar waveguide traveling wave electrode 8 to the first silicon layer 5 by electroplating.

So far, this embodiment has produced the silicon-based electro-optical modulator as described in the technical solution of the present invention. Its light field and electric field distribution diagram is shown in Figure 5.

The above-mentioned specific embodiments further describe the purpose, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above-mentioned are only specific embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention shall be included in the protection scope of the present invention.

Claims (10)

1. A silicon-based electro-optic modulator comprising:

the SOI wafer is of a multi-layer structure and sequentially comprises a silicon substrate, a first silicon dioxide buried layer and a top silicon layer from bottom to top;

a second silicon dioxide buried layer buried in the top silicon layer to divide the top silicon layer into an upper layer and a lower layer, the upper layer being a first silicon layer and the lower layer being a waveguide layer, wherein,

a part of the second silicon dioxide buried layer is upwards protruded, so that the lower square waveguide layer forms a ridge structure, the upwards protruded part of the ridge structure is a silicon waveguide,

the second silicon dioxide buried layer has compressive stress inside and presses the first silicon layer and the waveguide layer outwards;

and the GSG single-drive coplanar waveguide traveling wave electrode is arranged on the first silicon layer, so that an electric field applied by the GSG single-drive coplanar waveguide traveling wave electrode can reach the silicon waveguide.

2. A method for preparing a silicon-based electro-optic modulator, comprising:

selecting an SOI wafer which is of a multi-layer structure and sequentially comprises a silicon substrate, a first silicon dioxide buried layer and a top silicon layer from bottom to top;

preparing a second silicon dioxide buried layer in the top silicon layer, dividing the top silicon layer into an upper layer and a lower layer, wherein the upper layer is a first silicon layer, the lower layer is a waveguide layer,

a part of the second silicon dioxide buried layer is upwards protruded, so that the lower square waveguide layer forms a ridge structure, the upwards protruded part of the ridge structure is a silicon waveguide,

the second silicon dioxide buried layer has compressive stress inside and presses the first silicon layer and the waveguide layer outwards;

and setting a GSG single-drive coplanar waveguide traveling wave electrode on the first silicon layer, so that an electric field applied by the GSG single-drive coplanar waveguide traveling wave electrode can reach the silicon waveguide.

3. The method of fabricating a silicon-based electro-optic modulator of claim 2, wherein the fabricating a second buried silicon oxide layer comprises:

performing thermal oxidation reaction on the upper surface of the top silicon layer to form a first silicon dioxide layer on the upper part of the top silicon layer;

transferring a mask pattern to the first silicon dioxide layer, and etching the first silicon dioxide layer according to the mask pattern to obtain a silicon dioxide waveguide;

depositing silicon dioxide on the silicon dioxide waveguide and the surface of the top silicon layer exposed by etching to form a second silicon dioxide layer with a certain thickness;

oxygen ions are injected into the top silicon layer from top to bottom through the second silicon dioxide layer and the silicon dioxide waveguide to form an oxygen-enriched ion layer, wherein the part of the oxygen-enriched ion layer below the silicon dioxide waveguide protrudes upwards;

and (3) high-temperature annealing is carried out to enable oxygen ions in the oxygen-enriched ion layer to react with silicon atoms in the oxygen-enriched ion layer, so as to generate a second silicon dioxide buried layer.

4. A method of fabricating a silicon-based electro-optic modulator as defined in claim 3, comprising, prior to the high temperature anneal:

etching the second silicon dioxide layer and the silicon dioxide waveguide so as to expose the top silicon layer;

a high density silicon dioxide protective layer is deposited over the top silicon layer to prevent the top silicon layer from being oxidized.

5. The method of claim 4, wherein the high-density silicon oxide protective layer is etched after the high-temperature anneal to expose the first silicon layer.

6. A method of fabricating a silicon-based electro-optic modulator as defined in claim 2 wherein the top silicon layer has a thickness of 600nm.

7. A method of fabricating a silicon-based electro-optic modulator as defined in claim 3 wherein the first silicon dioxide layer has a thickness of 100nm.

8. A method of fabricating a silicon-based electro-optic modulator as defined in claim 3 wherein the second silicon dioxide layer has a thickness of 50nm.

9. A method of fabricating a silicon-based electro-optic modulator as defined in claim 3, wherein the total dose range of oxygen ion implantation is 2 x 10 ¹⁷ ～7×10 ¹⁷ /cm ² The oxygen ion implantation energy range is 150-200KeV.

10. A method of fabricating a silicon-based electro-optic modulator as defined in claim 3 wherein the high temperature anneal temperature is 1200 ℃ for a time period of 2 to 3 hours.