CN113687332A - Analog front-end circuit based on capacitor array voltage synthesis technology in laser radar - Google Patents
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- 238000003786 synthesis reaction Methods 0.000 title claims abstract description 62
- 239000003990 capacitor Substances 0.000 title claims abstract description 51
- 238000010791 quenching Methods 0.000 claims abstract description 50
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- 230000005669 field effect Effects 0.000 claims description 9
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- G—PHYSICS
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- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
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Abstract
The invention discloses an analog front-end circuit based on a capacitor array voltage synthesis technology in a laser radar, which comprises a synthesis module, a plurality of photosensitive elements and a plurality of quenching circuits, wherein the synthesis module comprises a plurality of photosensitive elements and a plurality of quenching circuits; the cathode of the photosensitive element is electrically connected with the input end of the quenching circuit; the voltage synthesis module comprises a plurality of branches and a first node, each branch comprises a phase inverter and a capacitor, the phase inverter comprises an input end and an output end, the capacitor comprises a first end and a second end, the output end of the quenching circuit is electrically connected with the input end of the phase inverter, and the first end and the second end of the capacitor are respectively electrically connected with the output end of the phase inverter and the first node. Because the current flowing through the phase inverter is extremely small or even negligible, the power consumption of the synthesis module is obviously reduced, and when a plurality of photosensitive elements receive optical signals simultaneously, the phases of generated pulses are different, so that the risk of generating errors is reduced, and the accuracy of voltage synthesis is favorably improved.
Description
Technical Field
The invention belongs to the field of integrated circuits, and particularly relates to an analog front-end circuit based on a capacitor array voltage synthesis technology in a laser radar.
Background
In a laser radar chip, a pixel generally consists of a plurality of SPADs (Single Photon Avalanche diodes), the SPADs are subjected to Avalanche breakdown when receiving optical signals and convert the optical signals into electric signals, but the SPADs are damaged after being in a breakdown state for a long time, and a quenching circuit is used for restoring the SPADs subjected to Avalanche breakdown to the original non-breakdown state, so that the SPADs receiving the optical signals generate the electric signals, the electric signals pass through the quenching circuit and then output pulse signals, and the pulse signals are synthesized into one signal by a synthesis circuit.
In the related art, a current synthesis mode is usually adopted in a synthesis circuit, the synthesis circuit is formed by combining branches composed of a plurality of MOS transistors and current sources, and a synthesis function is realized in a current superposition mode. However, the power consumption of the current combining circuit is proportional to the number of SPADs receiving light, and thus the power consumption is very high. In addition, there is a method of synthesizing multiple pulses by using or logic, in which the synthesizing circuit is composed of a plurality of or gates, the input of the or gate is the same as the number of SPADs in a pixel, the error of the synthesizing circuit is large, and pulse signals generated by two SPADs simultaneously cannot be distinguished after passing through the or gate, so that the number of SPADs actually triggered cannot be determined.
Disclosure of Invention
In order to solve the above problems in the prior art, the present invention provides an analog front-end circuit based on a capacitor array voltage synthesis technique in a laser radar. The technical problem to be solved by the invention is realized by the following technical scheme:
an analog front-end circuit based on a capacitor array voltage synthesis technology in a laser radar comprises a synthesis module, a plurality of photosensitive elements and a plurality of quenching circuits; wherein the content of the first and second substances,
the photosensitive element comprises a cathode, the quenching circuit comprises an input end and an output end, and the cathode of the photosensitive element is electrically connected with the input end of the quenching circuit;
the voltage synthesis module comprises a plurality of branches and a first node, each branch comprises a phase inverter and a capacitor, the phase inverter comprises an input end and an output end, the capacitor comprises a first end and a second end, the output end of the quenching circuit is electrically connected with the input end of the phase inverter, and the first end and the second end of the capacitor are respectively electrically connected with the output end of the phase inverter and the first node.
In one embodiment of the invention, the synthesis module further comprises a reset unit.
In one embodiment of the present invention, the reset unit includes a reset transistor.
In an embodiment of the present invention, a control terminal of the reset transistor is electrically connected to a preset voltage signal terminal, a first terminal of the reset transistor is electrically connected to a common voltage terminal, and a second terminal of the reset transistor is electrically connected to the first node.
In one embodiment of the present invention, the reset transistor is an N-type field effect transistor.
In one embodiment of the invention, the photosensitive element is a single photon avalanche diode.
In one embodiment of the present invention, the inverter further includes a reference voltage signal terminal, a first voltage signal terminal, a second voltage signal terminal, and a third voltage signal terminal, and the quenching circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a second node, and a third node electrically connected to the inverter; wherein the content of the first and second substances,
the control end of the first transistor is electrically connected with the reference voltage signal end, the first end of the first transistor is electrically connected with the first voltage signal end, and the second end of the first transistor is electrically connected with the cathode of the photosensitive element;
the control end of the second transistor is electrically connected with the cathode of the photosensitive element, the first end of the second transistor is electrically connected with the second voltage signal end, and the second end of the second transistor is electrically connected with the second node;
the control end of the third transistor is electrically connected with the cathode of the photosensitive element, the first end of the third transistor is electrically connected with the second node, and the second end of the third transistor is grounded;
a control end of the fourth transistor is electrically connected with the second node, a first end of the fourth transistor is electrically connected with the third voltage signal end, and a second end of the fourth transistor is electrically connected with the third node;
and the control end of the fifth transistor is electrically connected with the second node, the first end of the fifth transistor is electrically connected with the third node, and the second end of the fifth transistor is grounded.
In one embodiment of the present invention, the first transistor, the second transistor, and the fourth transistor are P-type field effect transistors, and the third transistor and the fifth transistor are N-type field effect transistors.
Compared with the prior art, the invention has the beneficial effects that:
the invention provides an analog front-end circuit based on a capacitor array voltage synthesis technology in a laser radar, which comprises a synthesis module, a plurality of photosensitive elements and a plurality of quenching circuits, wherein the synthesis module comprises a first node and a plurality of branches consisting of a phase inverter and a capacitor, the cathode of the photosensitive element is electrically connected with the input end of the quenching circuit, the output end of the quenching circuit is electrically connected with the input end of the phase inverter, and the first end and the second end of the capacitor are respectively electrically connected with the output end of the phase inverter and the first node. Because the current flowing through the inverter is extremely small (negligible), the power consumption of the synthesis module is remarkably reduced, and when a plurality of photosensitive elements receive optical signals simultaneously, the phases of generated pulses are different, so that the risk of generating errors is reduced, and the accuracy of voltage synthesis is favorably improved.
The present invention will be described in further detail with reference to the accompanying drawings and examples.
Drawings
Fig. 1 is a schematic diagram of an analog front-end circuit based on a capacitor array voltage synthesis technique in a laser radar according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a synthesis module in the related art;
FIG. 3 is another schematic diagram of a synthesis module of the related art;
FIG. 4 is a schematic diagram of a negative-going pulse-quench circuit according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of a forward pulse quench circuit according to an embodiment of the present invention;
fig. 6 is another schematic diagram of an analog front-end circuit based on a capacitor array voltage synthesis technique in a laser radar according to an embodiment of the present invention;
FIG. 7 is a schematic diagram of an inverter according to an embodiment of the present invention;
FIG. 8 is an equivalent circuit diagram of the synthesis module in the time period t 1-t 2 according to the embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to specific examples, but the embodiments of the present invention are not limited thereto.
As shown in fig. 1, the present invention provides an analog front-end circuit 100 based on a capacitor array voltage synthesis technology in a laser radar, which includes a synthesis module 10, a plurality of light sensing elements L, and a plurality of quenching circuits 20; wherein the content of the first and second substances,
the photosensitive element L comprises a cathode, the quenching circuit 20 comprises an input end and an output end, and the cathode of the photosensitive element L is electrically connected with the input end of the quenching circuit 20;
the synthesizing module 10 includes a plurality of branches 101 and a first node N1, each branch 101 includes an inverter 102 and a capacitor C, the inverter 102 includes an input end and an output end, the capacitor C includes a first end and a second end, the output end of the quenching circuit 20 is electrically connected to the input end of the inverter 102, and the first end and the second end of the capacitor C are electrically connected to the output end of the inverter 102 and the first node N1, respectively.
In this embodiment, the analog front-end circuit 100 includes a combining module 10, a plurality of light sensing elements L, and a plurality of quenching circuits 20, where the combining module 10 is composed of a first node N1 and a plurality of branches 101, each branch 101 includes an inverter 102 and a capacitor C, and the number of branches 101 is equal to the number of light sensing elements L. Specifically, referring to fig. 1, the input terminal of the quenching circuit 20 is electrically connected to the cathode of the light sensing element L, the output terminal thereof is electrically connected to the input terminal of the inverter 102, and the first terminal and the second terminal of the capacitor C are electrically connected to the output terminal of the inverter 102 and the first node N1, respectively. When the light sensing element L receives the optical signal and generates an electrical signal, the electrical signal is input to the quenching circuit 20, the quenching circuit 20 processes the electrical signal and outputs a segment of pulse signal, and the synthesis module 10 synthesizes the pulse signals into a signal. Obviously, in the analog front-end circuit 100 provided by the present invention, the design of the synthesis module 10 is simple and the layout area is smaller.
It can be understood that, for the pulse signal output by the quenching circuit, a current synthesis manner is generally adopted in the related art, however, in the research process, the inventor finds that the synthesis achieved by a current superposition manner may cause too high power consumption. Specifically, referring to fig. 2, the synthesis module in the related art is formed by combining branches formed by a plurality of MOS transistors and a current source, and only when the photosensitive element receives an optical signal, an electrical signal output by the photosensitive element generates a pulse through a quenching circuit, so that the MOS transistors are turned on, and a current in the current source flows through the MOS transistors. Obviously, the output of the synthesis module is the superposition of multiple paths of currents, and the size of the synthesis module is in direct proportion to the number of the photosensitive elements which actually work, so that the power consumption is high. In the embodiment, since the size of the inverter itself is small and only one MOS transistor is turned on when the inverter is turned on, the current flowing from the power source to the ground is very small, and a large current flows only when both MOS transistors are turned on, but the current flowing through the inverter 102 is negligible in this case and the power consumption of the combining module 10 is significantly reduced.
In addition, there is a way to achieve a combined function by or logic in the related art. As shown in fig. 3, the input terminal of the quenching circuit is electrically connected to the photosensitive element, and the output terminal is electrically connected to the input terminal of the or gate, but when the pulse signals generated by two or more photosensitive elements simultaneously pass through the or gate, the resultant signal has only one pulse, and thus the pulse signals cannot be effectively distinguished. In the present embodiment, when the plurality of light sensing elements L receive the optical signal simultaneously, the phases of the pulses generated by the quenching circuit 20 are different, so that the risk of generating errors is reduced, which is beneficial to improving the accuracy of voltage synthesis.
Fig. 4 is a schematic diagram of a negative-going pulse quenching circuit according to an embodiment of the invention. Optionally, referring to fig. 4, the analog front-end circuit 100 based on the capacitor array voltage synthesis technology further includes a reference voltage signal terminal Vbias, a first voltage signal terminal VDD1, a second voltage signal terminal VDD2 and a third voltage signal terminal VDD3, and the quenching circuit 20 includes a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a fifth transistor M5, a second node N2 and a third node N3 electrically connected to the inverter 102; wherein the content of the first and second substances,
a control terminal of the first transistor M1 is electrically connected to the reference voltage signal terminal Vbias, a first terminal is electrically connected to the first voltage signal terminal VDD1, and a second terminal is electrically connected to the cathode of the light sensing element L;
a control terminal of the second transistor M2 is electrically connected to the cathode of the light sensing element L, a first terminal is electrically connected to the second voltage signal terminal VDD2, and a second terminal is electrically connected to the second node N2;
a control end of the third transistor M3 is electrically connected to the cathode of the photosensitive element L, a first end is electrically connected to the second node N2, and a second end is grounded;
a control terminal of the fourth transistor M4 is electrically connected to the second node N2, a first terminal thereof is electrically connected to the third voltage signal terminal VDD3, and a second terminal thereof is electrically connected to the third node N3;
the control terminal of the fifth transistor M5 is electrically connected to the second node N2, the first terminal is electrically connected to the third node N3, and the second terminal is grounded.
In the embodiment, the first transistor M1, the second transistor M2, and the fourth transistor M4 of the quenching circuit 20 may be P-type field effect transistors, and the third transistor M3 and the fifth transistor M5 may be N-type field effect transistors.
Illustratively, the photosensitive element L is a single photon avalanche diode, comprising a cathode and an anode.
Fig. 5 is a schematic diagram of a forward pulse quenching circuit according to an embodiment of the invention. Referring to fig. 4-5, it should be understood that the quenching circuit 20 may include a positive pulse quenching circuit and a negative pulse quenching circuit, which are different only in the connection manner with the photosensitive element L, and in this embodiment, the pulse high voltage is 1 and the pulse low voltage is 0. For example, referring to fig. 1, in the present embodiment, the input terminal of the quenching circuit 20 is electrically connected to the cathode of the photosensitive element L, which is a negative pulse quenching circuit.
Of course, in some other embodiments of the present application, the analog front-end circuit 100 may also employ a forward pulse quenching circuit, that is, an input terminal of the quenching circuit 20 is electrically connected to an anode of the light sensing element L, which is not limited in the present application.
Optionally, the combining module 10 further includes a reset unit 30, configured to reset the combining module, so as to ensure that the potentials of the first terminal and the second terminal in the capacitor C are zero. In the embodiment, the reset unit 30 includes a reset transistor M0, and the reset transistor M0 is an N-type field effect transistor.
Fig. 6 is another schematic diagram of an analog front-end circuit based on a capacitor array voltage synthesis technique in a laser radar according to an embodiment of the present invention, and the operation principle of the analog front-end circuit 100 is described below with a negative pulse quenching circuit as an example. As shown in fig. 6, the synthesis module 10 includes 10 branches 101 composed of inverters 102 and capacitors C, and in the reset phase, the reset transistor M0 is turned on, so when the light sensing element L does not receive the light signal, the input of the corresponding inverter 102 is 1, the third transistor M3 and the fifth transistor M5 in the quenching circuit 20 are turned on, and further the potential of the first end of the capacitor C is reset to zero, and the capacitor C is grounded and discharged, so that the second end of the capacitor C is reset to zero potential.
Fig. 7 is a schematic diagram of an inverter according to an embodiment of the present invention. Referring to fig. 6-7, the inverter 102 may include a sixth transistor M6 and a seventh transistor M7, wherein control terminals of the sixth transistor M6 and the seventh transistor M7 are electrically connected to the first node N1, a first terminal of the sixth transistor M6 is electrically connected to the reset voltage signal terminal Vref, a second terminal of the sixth transistor M6 and a first terminal of the seventh transistor M7 are electrically connected to a first terminal of the capacitor C, and a second terminal of the seventh transistor M7 is grounded. In this embodiment, the sixth transistor M6 is a P-type fet and the seventh transistor M7 is an N-type fet.
In the period from t1 to t2, assuming that the inverters 102 in the 6 branches 101 of the synthesis module 10 receive the negative pulse signal and the inverters 102 in the 4 branches 101 do not receive the negative pulse signal, that is, the signal level is kept at 1, for the inverter 102 receiving the negative pulse, the sixth transistor M6 is turned on, so that the potential of the first terminal of the capacitor C connected to these inverters 102 is 1, the signal levels received by the other inverters 102 are always 1, at this time, the reset transistor M0 is turned on, and the potential of the second terminal of the capacitor C is 0. Further, as shown in fig. 8, in the equivalent circuit of the synthesis module in the time period from t1 to t2, the capacitors C in the 10 branches 101 are connected in parallel, the equivalent capacitor is the sum of the capacitors C, and the output of the synthesis module 10 can be obtained according to the principle of capacitor voltage division, obviously, the output is proportional to the number of the negative pulses.
Alternatively, the potential of the reset voltage signal terminal is 1, the potential of the common voltage terminal VCOM is 0, and the ground potential is 0.
It should be noted that, in some other embodiments of the present application, the quenching circuit 20 may also have other structures, which are not limited in the present application.
In addition, the synthesis module 10 shown in fig. 6 is only exemplified by the case of 10 branches, and actually the number of branches should be determined according to the number of photosensitive elements.
The beneficial effects of the invention are that:
the invention provides an analog front-end circuit based on a capacitor array voltage synthesis technology in a laser radar, which comprises a synthesis module, a plurality of photosensitive elements and a plurality of quenching circuits, wherein the synthesis module comprises a first node and a plurality of branches consisting of a phase inverter and a capacitor, the cathode of the photosensitive element is electrically connected with the input end of the quenching circuit, the output end of the quenching circuit is electrically connected with the input end of the phase inverter, and the first end and the second end of the capacitor are respectively electrically connected with the output end of the phase inverter and the first node. Because the current flowing through the inverter is extremely small (negligible), the power consumption of the synthesis module is remarkably reduced, and when a plurality of photosensitive elements receive optical signals simultaneously, the phases of generated pulses are different, so that the risk of generating errors is reduced, and the accuracy of voltage synthesis is favorably improved.
In the description of the present invention, the terms "first" and "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implying any number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples described in this specification can be combined and combined by those skilled in the art.
While the present application has been described in connection with various embodiments, other variations to the disclosed embodiments can be understood and effected by those skilled in the art in practicing the claimed application, from a review of the drawings, the disclosure, and the appended claims. In the claims, the word "comprising" does not exclude other elements or steps, and the word "a" or "an" does not exclude a plurality. A single processor or other unit may fulfill the functions of several items recited in the claims. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage.
The foregoing is a more detailed description of the invention in connection with specific preferred embodiments and it is not intended that the invention be limited to these specific details. For those skilled in the art to which the invention pertains, several simple deductions or substitutions can be made without departing from the spirit of the invention, and all shall be considered as belonging to the protection scope of the invention.
Claims (8)
1. An analog front-end circuit based on a capacitor array voltage synthesis technology in a laser radar is characterized by comprising a synthesis module, a plurality of photosensitive elements and a plurality of quenching circuits; wherein the content of the first and second substances,
the photosensitive element comprises a cathode, the quenching circuit comprises an input end and an output end, and the cathode of the photosensitive element is electrically connected with the input end of the quenching circuit;
the voltage synthesis module comprises a plurality of branches and a first node, each branch comprises a phase inverter and a capacitor, the phase inverter comprises an input end and an output end, the capacitor comprises a first end and a second end, the output end of the quenching circuit is electrically connected with the input end of the phase inverter, and the first end and the second end of the capacitor are respectively electrically connected with the output end of the phase inverter and the first node.
2. The analog front-end circuit based on capacitor array voltage synthesis technology in laser radar according to claim 1, wherein the synthesis module further comprises a reset unit.
3. The analog front-end circuit based on capacitor array voltage synthesis technology in laser radar according to claim 2, wherein the reset unit comprises a reset transistor.
4. The analog front-end circuit based on capacitor array voltage synthesis technology in laser radar of claim 3, wherein the control terminal of the reset transistor is electrically connected to a preset voltage signal terminal, the first terminal of the reset transistor is electrically connected to a common voltage terminal, and the second terminal of the reset transistor is electrically connected to the first node.
5. The analog front-end circuit based on capacitor array voltage synthesis technology in laser radar according to claim 3, wherein the reset transistor is an N-type field effect transistor.
6. The analog front-end circuit based on capacitor array voltage synthesis technology in laser radar according to claim 1, wherein the light sensing element is a single photon avalanche diode.
7. The analog front-end circuit based on the capacitor array voltage synthesis technology in the lidar according to claim 1, further comprising a reference voltage signal terminal, a first voltage signal terminal, a second voltage signal terminal and a third voltage signal terminal, wherein the quenching circuit comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a second node and a third node electrically connected with the inverter; wherein the content of the first and second substances,
the control end of the first transistor is electrically connected with the reference voltage signal end, the first end of the first transistor is electrically connected with the first voltage signal end, and the second end of the first transistor is electrically connected with the cathode of the photosensitive element;
the control end of the second transistor is electrically connected with the cathode of the photosensitive element, the first end of the second transistor is electrically connected with the second voltage signal end, and the second end of the second transistor is electrically connected with the second node;
the control end of the third transistor is electrically connected with the cathode of the photosensitive element, the first end of the third transistor is electrically connected with the second node, and the second end of the third transistor is grounded;
a control end of the fourth transistor is electrically connected with the second node, a first end of the fourth transistor is electrically connected with the third voltage signal end, and a second end of the fourth transistor is electrically connected with the third node;
and the control end of the fifth transistor is electrically connected with the second node, the first end of the fifth transistor is electrically connected with the third node, and the second end of the fifth transistor is grounded.
8. The analog front-end circuit based on capacitor array voltage synthesis technology in lidar according to claim 7, wherein the first transistor, the second transistor and the fourth transistor are P-type field effect transistors, and the third transistor and the fifth transistor are N-type field effect transistors.
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