CN113676160B - Anti-interference trigger - Google Patents

Anti-interference trigger Download PDF

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Publication number
CN113676160B
CN113676160B CN202111243047.7A CN202111243047A CN113676160B CN 113676160 B CN113676160 B CN 113676160B CN 202111243047 A CN202111243047 A CN 202111243047A CN 113676160 B CN113676160 B CN 113676160B
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transistor
voltage
controlled switch
signal
component
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CN113676160A (en
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张鑫
刘炽锋
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Guangzhou Huizhi Microelectronics Co ltd
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Guangzhou Huizhi Microelectronics Co ltd
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01Details
    • H03K3/013Modifications of generator to prevent operation by noise or interference
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/26Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback

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Abstract

The invention provides an anti-interference trigger, comprising: a first hysteresis component, a second hysteresis component, and an inversion component; the reversing assembly at least comprises a first controlled switch assembly, a first output path and a second output path which are respectively connected with the first controlled switch assembly; the first controlled switch assembly conducts the first output path to output a first signal when the voltage value of the input signal is higher than a first trigger voltage threshold, and conducts the second output path to output a second signal when the voltage value of the input signal is lower than a second trigger voltage threshold; the first hysteresis component is used for processing the first signal or the second signal to obtain an inverse signal of the first signal or the second signal; the second hysteresis component is connected with the first controlled switch component and used for changing the first trigger voltage threshold value and/or the second trigger voltage threshold value according to the reverse signal so that the first trigger voltage threshold value is different from the second trigger voltage threshold value.

Description

Anti-interference trigger
Technical Field
The invention relates to the technical field of electronics, in particular to an anti-interference trigger.
Background
Flip-flops are a common type of circuit block in the field of integrated circuits and function to change the value of their output level in response to a change in the input level when the input level exceeds or falls below a certain threshold. The flip-flop is widely applied particularly in the field of digital circuits, can convert an analog input signal into a digital output signal, and realizes the function of waveform shaping, as shown in fig. 1, in a power-on reset circuit, a voltage can be detected by the flip-flop in the power-on process, a reset pulse signal is provided for a subsequent digital circuit, and the digital circuit is ensured to be in a correct preset state before starting to work.
In the related art, the flip-flop is single-threshold, that is, the input signal exceeds or falls below a certain threshold voltage, and the output signal changes. In practical application, an input signal may be interfered by other signals to generate jitter, if the jitter causes the input signal to fluctuate near the threshold voltage of the flip-flop, the flip-flop is triggered for multiple times, and the reliability of the circuit is affected.
Disclosure of Invention
The embodiment of the invention provides an anti-interference trigger.
The technical scheme of the embodiment of the invention is realized as follows:
an embodiment of the present invention provides an anti-interference trigger, including: a first hysteresis component, a second hysteresis component, and an inversion component;
the reversing assembly at least comprises a first controlled switch assembly, a first output path and a second output path which are respectively connected with the first controlled switch assembly; the first controlled switch component conducts the first output path and outputs a first signal from the first output path when the voltage value of an input signal is higher than a first trigger voltage threshold, and conducts the second output path and outputs a second signal from the second output path when the voltage value of the input signal is lower than a second trigger voltage threshold;
the first hysteresis component is respectively connected with the output end of the inverting component and the second hysteresis component and is used for processing the first signal or the second signal to obtain an inverted signal of the first signal or the second signal;
the second hysteresis component is connected with the first controlled switch component, and the second hysteresis component is used for changing the first trigger voltage threshold value and/or the second trigger voltage threshold value according to the reverse signal output by the first hysteresis component, so that the first trigger voltage threshold value is different from the second trigger voltage threshold value.
In some embodiments, the second hysteresis component comprises a second controlled switching component and/or a third controlled switching component;
one end of the third controlled switch component is connected with a power supply, and the other end of the third controlled switch component is connected with the second end of the first controlled switch component and used for changing the second trigger voltage threshold value;
one end of the second controlled switch assembly is grounded, and the other end of the second controlled switch assembly is connected with the first end of the first controlled switch assembly and is used for changing the first trigger voltage threshold;
wherein a first terminal of the first controlled switch assembly is configured to control the first trigger voltage threshold, and a second terminal of the first controlled switch assembly is configured to control the second trigger voltage threshold.
In some embodiments, the second controlled switching assembly includes a third output path and a fourth output path connected in parallel at the first end of the first controlled switching assembly;
when the voltage value of the reverse signal is the ground voltage, the third output path is cut off, the fourth output path is conducted, and a first voltage is output;
when the voltage of the reverse signal is the power supply voltage, the third output path is conducted, the fourth output path is short-circuited, and a second voltage is output;
the ground voltage is lower than the power supply voltage, the first voltage is higher than the second voltage, and a first trigger voltage threshold corresponding to the first voltage is higher than a first trigger voltage threshold corresponding to the second voltage.
In some embodiments, the third output path includes at least a first transistor; the fourth output path includes at least a second transistor;
the drain electrode of the first transistor is respectively connected with the drain electrode and the grid electrode of the second transistor; the source electrode of the first transistor and the source electrode of the second transistor are both grounded; the grid electrode of the first transistor is connected with the first hysteresis component; the drain electrode of the first transistor is connected with the first end of the first controlled switch component;
when the voltage of the reverse signal is power supply voltage, the first transistor is conducted, the second transistor is short-circuited, and the first voltage is output;
when the voltage of the reverse signal is the ground voltage, the first transistor is turned off, and the second transistor is turned on to output the second voltage.
In some embodiments, the third controlled switching assembly includes a fifth output path and a sixth output path connected in parallel at the first controlled switching assembly second end;
when the voltage value of the reverse signal is the ground voltage, the fifth output path is conducted, the sixth output path is short-circuited, and a third voltage is output;
when the voltage of the reverse signal is a power supply voltage, the fifth output path is cut off, the sixth output path is conducted, and a fourth voltage is output;
the ground voltage is lower than the power supply voltage, the third voltage is higher than the fourth voltage, and a second trigger voltage threshold corresponding to the third voltage is higher than a second trigger voltage threshold corresponding to the fourth voltage.
In some embodiments, the fifth output path includes at least a third transistor; the sixth output path includes at least a fourth transistor;
the drain electrode of the third transistor is respectively connected with the drain electrode and the grid electrode of the fourth transistor; the source electrode of the third transistor and the source electrode of the fourth transistor are both connected with a power supply; the grid electrode of the third transistor is connected with the first hysteresis component; the drain electrode of the third transistor is connected with the second end of the first controlled switch component;
when the voltage of the reverse signal is the ground voltage, the third transistor is conducted, the fourth transistor is short-circuited, and the third voltage is output;
when the voltage of the inverted signal is a power supply voltage, the third transistor is turned off, and the fourth transistor is turned on to output the fourth voltage.
In some embodiments, the first controlled switch component comprises a fifth transistor and a sixth transistor, the fifth and sixth transistors being transistors of opposite polarity;
the fifth transistor is connected with a power supply through the second hysteresis component or the fifth transistor is connected with the power supply;
the sixth transistor is grounded through the second hysteresis component or the sixth transistor is grounded;
the voltage value of the input signal is higher than the first trigger voltage threshold, the fifth transistor is turned off, the sixth transistor turns on the first output path, and the first output path outputs a first signal;
the voltage value of the input signal is lower than a second trigger voltage threshold, the sixth transistor is turned off, the fifth transistor turns on the second output path, and the second output path outputs a second signal.
In some embodiments, the second output path includes a fourth controlled switch component connected to a power supply;
the first output path includes a fifth controlled switch component connected to ground;
the voltage value of the input signal is higher than a first trigger voltage threshold, the fourth controlled switch component is switched off, the fifth controlled switch component is switched on, and a first signal is output;
the voltage value of the input signal is lower than a second trigger voltage threshold, the fifth controlled switch component is switched off, the fourth controlled switch component is switched on, and a second signal is output;
the voltage value of the first signal is a ground voltage, and the voltage value of the second signal is a power supply voltage.
In some embodiments, the fourth controlled switch assembly comprises: a seventh transistor, an eighth transistor, and a ninth transistor;
the grid electrode of the seventh transistor is connected with the output end of the first controlled switch component; the source electrode of the seventh transistor is grounded, the drain electrode of the seventh transistor is connected with the grid electrode of the eighth transistor, the source electrode of the eighth transistor is connected with the power supply, the drain electrode of the eighth transistor is connected with the source electrode of the ninth transistor, and the grid electrode of the ninth transistor is connected with the controlled end of the first controlled switch component; the drain electrode of the ninth transistor is connected with the input end of the first hysteresis component;
the voltage value of the input signal is higher than a first trigger voltage threshold value, and the seventh transistor, the eighth transistor and the ninth transistor are turned off;
the voltage value of the input signal is lower than a second trigger voltage threshold value, the seventh transistor, the eighth transistor and the ninth transistor are conducted, and the second signal is output.
In some embodiments, the fifth controlled switch assembly comprises: a tenth transistor, an eleventh transistor, and a twelfth transistor;
a source of the tenth transistor is connected to a power supply, a gate of the tenth transistor is connected to the output terminal of the first controlled switch component, a drain of the tenth transistor is connected to a gate of the eleventh transistor, a source of the eleventh transistor is grounded, a drain of the eleventh transistor is connected to a source of the twelfth transistor, a gate of the twelfth transistor is connected to the controlled terminal of the first controlled switch component, and a drain of the twelfth transistor is connected to the input terminal of the first hysteresis component;
the voltage value of the input signal is lower than the second trigger voltage threshold, and the tenth transistor, the eleventh transistor and the twelfth transistor are turned off;
the voltage value of the input signal is higher than the first trigger voltage threshold, the tenth transistor, the eleventh transistor and the twelfth transistor are turned on, and the first signal is output.
In the embodiment of the invention, the reversing component outputs different first signals and second signals according to the voltage value change of the input signal, so that the function of the trigger is realized, the second hysteresis component connected with the first hysteresis component outputs different voltages to the first controlled switch component according to the difference of the voltage value of the output signal of the first hysteresis component, so that the first trigger voltage threshold value and/or the second trigger voltage threshold value corresponding to the first controlled switch component are/is changed, when the input signal changes, the first trigger voltage threshold value corresponding to the trigger when the voltage value of the input signal changes from low to high and the second trigger voltage threshold value corresponding to the trigger when the voltage value changes from high to low can be independently controlled, compared with a trigger with only one trigger threshold value, the hysteresis of the trigger is increased, and the condition that the trigger is triggered by mistake due to an interference signal is reduced, thereby improving the anti-interference capability of the trigger.
Drawings
FIG. 1 is a schematic diagram of a trigger waveform provided by an embodiment of the present invention;
FIG. 2 is a schematic structural diagram of an anti-tamper flip-flop according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a first flip-flop according to an embodiment of the present invention;
fig. 4 is a schematic waveform diagram of input/output signals of a first flip-flop according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a second flip-flop according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of a third flip-flop according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the present invention will be further described in detail with reference to the accompanying drawings, the described embodiments should not be construed as limiting the present invention, and all other embodiments obtained by a person of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.
In the following description, reference is made to "some embodiments" which describe a subset of all possible embodiments, but it is understood that "some embodiments" may be the same subset or different subsets of all possible embodiments, and may be combined with each other without conflict.
In the following description, references to the terms "first \ second \ third" are only to distinguish similar objects and do not denote a particular order, but rather the terms "first \ second \ third" are used to interchange specific orders or sequences, where appropriate, to enable embodiments of the invention described herein to be practiced in other than the order shown or described herein.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein is for the purpose of describing embodiments of the invention only and is not intended to be limiting of the invention.
The following describes an anti-tamper trigger provided by an embodiment of the present invention. Referring to fig. 2, fig. 2 is a schematic structural diagram of an anti-tamper trigger provided in the embodiment of the present invention;
the anti-interference trigger 100 provided by the embodiment of the invention comprises:
a first hysteresis component 110, a second hysteresis component 120, and an inversion component 130;
the inverting component 130 comprises at least a first controlled switching component 1301, and a first output path 1302 and a second output path 1303 connected to the first controlled switching component 1301, respectively; the first controlled switch component 1301 turns on the first output path 1302 and outputs a first signal from the first output path 1302 when the voltage value of an input signal is higher than a first trigger voltage threshold, and the first controlled switch component 1301 turns on the second output path 1303 and outputs a second signal from the second output path 1303 when the voltage value of the input signal is lower than a second trigger voltage threshold;
the first hysteresis component 110 is respectively connected to the output end of the inverting component 130 and the second hysteresis component 120, and is configured to process the first signal or the second signal and output an inverted signal of the first signal or the second signal;
the second hysteresis component 120 is connected to the first controlled switch component 1301, and the second hysteresis component 120 is configured to change the first trigger voltage threshold and/or the second trigger voltage threshold according to the inverse signal output by the first hysteresis component, so that the first trigger voltage threshold is different from the second trigger voltage threshold.
The voltage value of the first signal is a ground voltage, and the voltage value of the second signal is a power voltage. The ground voltage is lower than the power supply voltage.
In one embodiment, the first hysteresis component may be an inverter.
In an embodiment, the inverted signal of the first signal is a signal having a voltage value of a power supply voltage, and the inverted signal of the second signal is a signal having a voltage value of a ground voltage.
In one embodiment, when the voltage value of the input signal changes from low to high and exceeds a first trigger voltage threshold, a first output path of the trigger reversing component is conducted and outputs a first signal, and a second path is in an off state; when the voltage value of the input signal is changed from high to low and is lower than a second trigger voltage threshold value, a second output path of the reverse component is triggered to be conducted to output a second signal, and the first path is in a disconnected state.
In one embodiment, the second hysteresis component is configured to change a first trigger voltage threshold corresponding to a voltage value of the input signal changing from low to high and/or change a second trigger voltage threshold corresponding to a voltage value of the input signal changing from high to low, so that the trigger voltage thresholds corresponding to two changes of the voltage value of the input signal from high to low and from low to high are different.
According to the embodiment of the invention, on one hand, the first signal and the second signal with different voltage values are output through the inverting component according to the voltage value change of the input signal, so that the function of shaping the waveform of the trigger is realized. In addition, through a second hysteresis component connected with the first hysteresis component, different voltages are respectively output to the first controlled component according to different voltage values of output signals of the first hysteresis component, so that a first trigger voltage threshold value and/or a second trigger voltage threshold value corresponding to the first controlled component are/is changed, and therefore when the input signal changes, the first trigger voltage threshold value corresponding to the trigger when the voltage value of the input signal changes from low to high and the second trigger voltage threshold value corresponding to the trigger when the voltage value changes from high to low are different. The trigger provided by the embodiment of the invention has two different trigger thresholds, compared with the trigger with only one trigger threshold, the hysteresis of the trigger is increased, another implementation mode is provided for the trigger with the hysteresis, the condition that the trigger is triggered by mistake due to an interference signal is reduced, and the anti-interference capability of the trigger is improved.
In some embodiments, the second hysteresis component comprises a second controlled switching component and/or a third controlled switching component;
one end of the third controlled switch component is connected with a power supply, and the other end of the third controlled switch component is connected with the second end of the first controlled switch component and used for changing the second trigger voltage threshold value;
one end of the second controlled switch assembly is grounded, and the other end of the second controlled switch assembly is connected with the first end of the first controlled switch assembly and is used for changing the first trigger voltage threshold;
wherein a first terminal of the first controlled switch assembly is configured to control the first trigger voltage threshold, and a second terminal of the first controlled switch assembly is configured to control the second trigger voltage threshold.
The controlled end of the second controlled switch component is connected with the output end of the first hysteresis component; and the controlled end of the third controlled switch component is connected with the output end of the first hysteresis component.
The voltage value of the reverse signal output by the first hysteresis component is the ground voltage, and the second controlled switch component outputs the first voltage to the first end of the first controlled switch component; the voltage value of the reverse signal output by the first hysteresis component is a power supply voltage, and the second controlled switch component outputs a second voltage to the first end of the first controlled switch component; the first voltage is higher than the second voltage;
the voltage value of the reverse signal output by the first hysteresis component is the ground voltage, and the third controlled switch component outputs a third voltage to the second end of the first controlled switch component; the voltage value of the reverse signal output by the first hysteresis component is a power supply voltage, and the third controlled switch component outputs a fourth voltage to the second end of the first controlled switch component; the third voltage is higher than the fourth voltage.
In some embodiments, the second controlled switching assembly includes a third output path and a fourth output path connected in parallel at the first end of the first controlled switching assembly;
when the voltage value of the reverse signal is the ground voltage, the third output path is cut off, the fourth output path is conducted, and a first voltage is output;
when the voltage of the reverse signal is the power supply voltage, the third output path is conducted, the fourth output path is short-circuited, and a second voltage is output;
the first voltage is higher than the second voltage, and a first trigger voltage threshold corresponding to the first voltage is higher than a first trigger voltage threshold corresponding to the second voltage.
In some embodiments, the third output path includes at least a first transistor; the fourth output path includes at least a second transistor;
the drain electrode of the first transistor is respectively connected with the drain electrode and the grid electrode of the second transistor; the source electrode of the first transistor and the source electrode of the second transistor are both grounded; the grid electrode of the first transistor is connected with the first hysteresis component; the drain electrode of the first transistor is connected with the first end of the first controlled switch component;
when the voltage of the reverse signal is power supply voltage, the first transistor is conducted, the second transistor is short-circuited, and the first voltage is output;
when the voltage of the reverse signal is the ground voltage, the first transistor is turned off, and the second transistor is turned on to output the second voltage.
In some embodiments, the third controlled switching assembly includes a fifth output path and a sixth output path connected in parallel at the first controlled switching assembly second end;
when the voltage value of the reverse signal is the ground voltage, the fifth output path is conducted, the sixth output path is short-circuited, and a third voltage is output;
when the voltage of the reverse signal is a power supply voltage, the fifth output path is cut off, the sixth output path is conducted, and a fourth voltage is output;
the ground voltage is lower than the power supply voltage, the third voltage is higher than the fourth voltage, and a second trigger voltage threshold corresponding to the third voltage is higher than a second trigger voltage threshold corresponding to the fourth voltage.
In some embodiments, the fifth output path includes at least a third transistor; the sixth output path includes at least a fourth transistor;
the drain electrode of the third transistor is respectively connected with the drain electrode and the grid electrode of the fourth transistor; the source electrode of the third transistor and the source electrode of the fourth transistor are both connected with a power supply; the grid electrode of the third transistor is connected with the first hysteresis component; the drain electrode of the third transistor is connected with the second end of the first controlled switch component;
when the voltage of the reverse signal is the ground voltage, the third transistor is conducted, the fourth transistor is short-circuited, and the third voltage is output;
when the voltage of the inverted signal is a power supply voltage, the third transistor is turned off, and the fourth transistor is turned on to output the fourth voltage.
In some embodiments, the first controlled switch component comprises a fifth transistor and a sixth transistor, the fifth and sixth transistors being transistors of opposite polarity;
the fifth transistor is connected with a power supply through the second hysteresis component or the fifth transistor is connected with the power supply;
the sixth transistor is grounded through the second hysteresis component or the sixth transistor is grounded;
the voltage value of the input signal is higher than the first trigger voltage threshold, the fifth transistor is turned off, the sixth transistor turns on the first output path, and the first output path outputs a first signal;
the input signal is lower than a second trigger voltage threshold, the sixth transistor is turned off, the fifth transistor turns on the second output path, and the second output path outputs a second signal.
In an embodiment, the fifth transistor and the sixth transistor may be a P-channel Metal Oxide Semiconductor (PMOS) and an N-type Metal Oxide Semiconductor (NMOS), respectively.
In some embodiments, the second output path includes a fourth controlled switch component connected to a power supply;
the first output path includes a fifth controlled switch component connected to ground;
the voltage value of the input signal is higher than a first trigger voltage threshold, the fourth controlled switch component is switched off, the fifth controlled switch component is switched on, and a first signal is output;
the voltage value of the input signal is lower than a second trigger voltage threshold, the fifth controlled switch component is switched off, the fourth controlled switch component is switched on, and a second signal is output;
the voltage value of the first signal is a ground voltage, and the voltage value of the second signal is a power supply voltage.
In some embodiments, the fourth controlled switch assembly comprises: the fourth controlled switch assembly includes: a seventh transistor, an eighth transistor, and a ninth transistor;
the grid electrode of the seventh transistor is connected with the output end of the first controlled switch component; the source electrode of the seventh transistor is grounded, the drain electrode of the seventh transistor is connected with the grid electrode of the eighth transistor, the source electrode of the eighth transistor is connected with the power supply, the drain electrode of the eighth transistor is connected with the source electrode of the ninth transistor, and the grid electrode of the ninth transistor is connected with the controlled end of the first controlled switch component; the drain electrode of the ninth transistor is connected with the input end of the first hysteresis component;
the voltage value of the input signal is higher than a first trigger voltage threshold value, and the seventh transistor, the eighth transistor and the ninth transistor are turned off;
the voltage value of the input signal is lower than a second trigger voltage threshold value, the seventh transistor, the eighth transistor and the ninth transistor are conducted, and the second signal is output.
In some embodiments, the fifth controlled switch assembly comprises: a tenth transistor, an eleventh transistor, and a twelfth transistor;
a source of the tenth transistor is connected to a power supply, a gate of the tenth transistor is connected to the output terminal of the first controlled switch component, a drain of the tenth transistor is connected to a gate of the eleventh transistor, a source of the eleventh transistor is grounded, a drain of the eleventh transistor is connected to a source of the twelfth transistor, a gate of the twelfth transistor is connected to the controlled terminal of the first controlled switch component, and a drain of the twelfth transistor is connected to the input terminal of the first hysteresis component;
the voltage value of the input signal is lower than the second trigger voltage threshold, and the tenth transistor, the eleventh transistor and the twelfth transistor are turned off;
the voltage value of the input signal is higher than the first trigger voltage threshold, the tenth transistor, the eleventh transistor and the twelfth transistor are turned on, and the first signal is output.
The transistors in the above embodiments are controllable switching devices, including but not limited to: a Field Effect Transistor (MOSFET) and an Insulated Gate Bipolar Transistor (IGBT).
In connection with the above-described embodiments, the following specific examples are provided, in which MN1 … … MNn are all NMOS transistors, MP1 … … MPn are all PMOS transistors, and n is a natural number.
In the following example, the voltage value is low when it is lower than the first preset logic voltage, and is high when it is higher than the second preset logic voltage. The first preset logic voltage and the second preset logic voltage are specifically determined by the performance of the MOS transistor, the grid voltage value of the NMOS transistor is high level, the source electrode of the NMOS transistor is grounded, and the NMOS transistor is conducted; the grid voltage value of the PMOS transistor is low level, the source electrode of the PMOS transistor is connected with the power supply, and the PMOS transistor is conducted.
Fig. 3 is a first flip-flop provided in this example, including: an inverting component, a first hysteresis component, and a second hysteresis component.
The first hysteresis component is respectively connected with the output end of the inverting component and the second hysteresis component, and comprises: and an inverter OP 1.
The inverting component at least comprises a first controlled switch component, and a first output path and a second output path which are respectively connected with the first controlled switch component.
The first controlled switch assembly includes: MN1 and MP3, a drain of MN1 is connected to a drain of MP3, which is an output terminal C of the first controlled switch component, a source of MP3 is connected to the second hysteresis component, a source of MP3 is a second terminal a1 of the first controlled switch component, and a source of MN1 is grounded;
the first output path includes: MN3, MN3 controlled by the input signal VIN, MN3 with its source connected to ground and MN3 with its drain connected to the first hysteresis component OP 1.
The second output path includes: the gate electrodes of MN2, MP4, MP5 and MP6, the gate electrodes of MN2 and MP4 are connected with the output end C of the first controlled switch component, the source electrode of MN2 is grounded, the drain electrode of MN2 is connected with the drain electrode of MP4, the source electrode of MP4 is connected with a power supply VDD, the drain electrode of MP4 is connected with the gate electrode of MP5, the source electrode of MP5 is connected with VDD, the drain electrode of MP5 is connected with the source electrode of MP6, the gate electrode of MP6 is controlled by an input signal VIN, and the drain electrode of MP6 is connected with OP 1.
A second hysteresis component is coupled to the first controlled switching component and includes: MP1 and MP2, the gate of MP1 is connected with the output end of OP1, the source of MP1 is connected with power VDD, the drain of MP1 is connected with the second end A of the first controlled switch component, the gate of MP2 is connected with the drain of MP2, the drain of MP2 is connected with the drain of MP1, and the source of MP2 is connected with power VDD.
In the first flip-flop provided in this example, when the input signal VIN is at a low level, the MN1 transistor is turned off, the MP3 transistor is turned on, the point C is at a high level, the MN2 transistor is turned on, the MP4 transistor is turned off, the point B is at a low level, so the MP5 transistor and the MP6 transistor are turned on, the output signal VOUT is at a high level, and the signal VOUT _ N is at a low level after passing through the inverter, so the MP1 is turned on and operates in a deep linear region, the point a1 is at a high level VDD, as the level of the input signal VIN is changed from low to high, when the first trigger voltage threshold VH of the flip-flop is exceeded, the MN1 transistor is turned on, the MP3 transistor is turned off, the point C is at a low level, the MN2 transistor is turned off, the MP4 transistor is turned on, the point B is at a high level, so the MP5 transistor and the 39mp 38 transistor are turned off, the MN3 transistor is turned on, the output signal VOUT is pulled to a low level, and the voltage difference between the voltage of the source voltage of the MP1 is reduced to the VDD of the MP2 transistor, since the level at point a1 is lowered, when the level of the input signal VIN changes from high to low, VIN needs to be lowered to a voltage lower than VH to turn on the MP3 transistor, the MN1 transistor is turned off, and the point C becomes high, the threshold voltage of the flip-flop is taken as the second trigger voltage threshold VL, the difference between VH and VL is related to the size of the MP2 transistor, the hysteresis voltage difference of the first flip-flop of this example can be controlled by adjusting the size of the MP2 transistor according to different application scenarios, as the point C becomes high, the MN2 transistor is turned on, the MP4 transistor is turned off, the point B becomes low, the MP5 transistor and the MP6 transistor are turned on, the MN3 transistor is turned off, and the output signal VOUT is pulled high, and the waveform of the input and output signal of the first flip-flop of this example is as shown in fig. 4.
Fig. 5 is a second flip-flop provided by this example, including: an inverting component, a first hysteresis component, and a second hysteresis component.
The first hysteresis component is respectively connected with the output end of the inverting component and the second hysteresis component, and comprises: and an inverter OP 1.
The inverting assembly includes a first controlled switch assembly, and a first output path and a second output path respectively connected to the first controlled switch assembly.
The first controlled switch assembly includes: the MN1 and the MP1 are connected, the drain of the MN1 is connected to the drain of the MP1, which is the output C of the first controlled switch component, the source of the MP1 is connected to the power supply VDD, and the source of the MN1 is the first end a2 of the first controlled switch component, which is connected to the second hysteresis component.
The first output path includes: MP2, MN6, MN2 and MN3, the gate of MP2 is connected to the output end point C of the first controlled switch component, the source of MP2 is connected to the power VDD, the drain of MP2 is connected to the drain of MN2, the gate of MN2 is connected to the output end point C of the first controlled switch component, the drain of MN2 is connected to the gate of MN6, the source of MN6 is grounded, the drain of MN6 is connected to the source of MN3, MN3 is controlled by the input signal VIN, and the drain of MN3 is connected to the first hysteresis component OP 1.
The second output path includes: MP3 and MP3 are controlled by an input signal VIN, the source of MP3 is connected with a power supply VDD, and the drain of MP3 is connected with OP 1.
The second hysteresis component is connected with the first end A2 of the first controlled switch component and comprises: MN4 and MN5, the gate of MN4 is connected with the output end of OP1, the source of MN4 is grounded, the drain of MN4 is connected with the first end A2 of a controlled switch component, the gate of MN5 is connected with the drain of MN5, the drain of MN5 is connected with the drain of MN4, and the source of MN5 is grounded.
When the input signal VIN is at a low level, the output signal VOUT is at a high level, and at the same time VOUT _ N is at a low level, so that the MN4 transistor is turned off, and as the level of the input signal VIN changes from low to high, the level of the point a2 is higher than the ground level GND by the gate-source voltage of the MN5 transistor, and when the level of VIN continues to rise to exceed the threshold voltage VH of the flip-flop, the output signal VOUT changes to a low level, and VOUT _ N is at a high level, so that the MN4 transistor is turned on and operates in a deep linear region, at which point a2 decreases to the ground level GND, and then when the level of the input signal VIN changes from high to low, the point a2 is at the ground level GND, so that the level of VIN is lower than the threshold voltage VH of the flip-flop, the MN1 transistor is turned off, the output state of the flip-flop is inverted, and the threshold voltage of the flip-flop is recorded as VL. The voltage difference between VH and VL is related to the size of MN 5.
Fig. 6 provides a third flip-flop of the present example, including: an inverting component, a first hysteresis component, and a second hysteresis component.
The first hysteresis component is respectively connected with the output end of the inverting component and the second hysteresis component, and comprises: and an inverter OP 1.
The inverting assembly includes a first controlled switch assembly, and a first output path and a second output path respectively connected to the first controlled switch assembly.
The first controlled switch assembly includes: the MN1 and MP1, the drain of MN1 is connected to the drain of MP1, which is the output terminal C of the first controlled switch component, the source of MP1 is connected to the power supply VDD, the source of MN1 is the first end a2 of the first controlled switch component, which is connected to the second hysteresis component, and the source of MP1 is the second end a1 of the first controlled switch component, which is connected to the second hysteresis component.
The first output path includes: MP2, MN6 and MN3, the gate of MP2 is connected to the output terminal C of the first controlled switch component, the source of MP2 is connected to the power VDD, the drain of MP2 is connected to the gate of MN6, the source of MN6 is grounded, the drain of MN6 is connected to the source of MN3, MN3 is controlled by the input signal VIN, and the drain of MN3 is connected to the first hysteresis component OP 1.
The second output path includes: MN2, MP6 and MP3, wherein the gate of MN2 is connected with the output end C point of the first controlled switch component, the source of MN2 is grounded, the drain of MN2 is connected with the drain of MP2, the gate of MP6 is connected with the drain of MN2, the source of MP6 is connected with a power supply VDD, the drain of MP6 is connected with the source of MP3, MP3 is controlled by an input signal VIN, and the drain of MP3 is connected with OP 1.
A second hysteresis component comprising: MP4, MP5, MN4 and MN5, the gate of MN4 is connected to the output terminal of OP1, the source of MN4 is grounded, the drain of MN4 is connected to the first terminal a2 of the first controlled switch component, the gate of MN5 is connected to the drain of MN5, the drain of MN5 is connected to the drain of MN4, and the source of MN5 is grounded. The gate of MP4 is connected to the output end of OP1, the source of MP4 is connected to the power supply VDD, the drain of MP4 is connected to the second end A1 of the first controlled switch module, the gate of MP5 is connected to the drain of MP5, the drain of MP5 is connected to the drain of MP4, and the source of MP5 is connected to the power supply VDD.
In the third flip-flop of this example, in the process of the input signal VIN changing from low to high, since the output signal VOUT is at high level, VOUT _ N is at low level, the MP4 transistor is turned on and operates in the deep linear region, and the MN4 transistor is turned off, the level at the point a1 is VDD, the level at the point a2 is higher than the ground level GND by the gate-source voltage of the MN5 transistor, and in the process of the input signal changing from high to low, since the output signal VOUT is at low level, VOUT _ N is at high level, the MN4 transistor is turned on and operates in the deep linear region, and the MP4 transistor is turned off, the level at the point a1 is lower than VDD by the gate-source voltage of the MP5 transistor, and the level at the point a2 is at the ground level GND, there is a larger voltage difference between the two threshold voltages VH and VL of the structure, and the hysteresis phenomenon is more obvious.
In the two processes of changing the voltage value of the input signal of the trigger from low to high and from high to low, two different threshold voltages exist, so that the trigger has a hysteresis phenomenon, the risk of triggering the trigger for multiple times due to signal interference is avoided, and the reliability of the circuit is improved.
It should be appreciated that reference throughout this specification to "one embodiment" or "an embodiment" means that a particular feature, structure or characteristic described in connection with the embodiment is included in at least one embodiment of the present application. Thus, the appearances of the phrases "in one embodiment" or "in an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. It should be understood that, in the various embodiments of the present application, the sequence numbers of the above-mentioned processes do not mean the execution sequence, and the execution sequence of each process should be determined by its function and inherent logic, and should not constitute any limitation to the implementation process of the embodiments of the present application. The above-mentioned serial numbers of the embodiments of the present application are merely for description and do not represent the merits of the embodiments.
Various corresponding changes and modifications of the embodiments of the present application can be made by those skilled in the art without departing from the spirit and the substance of the present application, and these corresponding changes and modifications should fall within the scope of the appended claims of the present application.
Other embodiments of the invention will be apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of the invention following, in general, the principles of the invention and including such departures from the present disclosure as come within known or customary practice within the art to which the invention pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the invention being indicated by the following claims.
The above description is only for the embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (9)

1. A tamper resistant flip flop, comprising: a first hysteresis component, a second hysteresis component, and an inversion component;
the reversing assembly at least comprises a first controlled switch assembly, a first output path and a second output path which are respectively connected with the first controlled switch assembly; the first controlled switch component conducts the first output path and outputs a first signal from the first output path when the voltage value of an input signal is higher than a first trigger voltage threshold, and conducts the second output path and outputs a second signal from the second output path when the voltage value of the input signal is lower than a second trigger voltage threshold;
the first hysteresis component is respectively connected with the output end of the inverting component and the second hysteresis component and is used for processing the first signal or the second signal to obtain an inverted signal of the first signal or the second signal;
the second hysteresis component is connected with the first controlled switch component, and the second hysteresis component is used for changing the first trigger voltage threshold value and/or the second trigger voltage threshold value according to the reverse signal output by the first hysteresis component, so that the first trigger voltage threshold value is different from the second trigger voltage threshold value;
wherein the second hysteresis component comprises a second controlled switching component and/or a third controlled switching component;
one end of the third controlled switch component is connected with a power supply, and the other end of the third controlled switch component is connected with the second end of the first controlled switch component and used for changing the second trigger voltage threshold value;
one end of the second controlled switch assembly is grounded, and the other end of the second controlled switch assembly is connected with the first end of the first controlled switch assembly and is used for changing the first trigger voltage threshold;
wherein a first terminal of the first controlled switch assembly is configured to control the first trigger voltage threshold, and a second terminal of the first controlled switch assembly is configured to control the second trigger voltage threshold.
2. The flip-flop according to claim 1,
the second controlled switch assembly comprises a third output path and a fourth output path, and the third output path and the fourth output path are connected to the first end of the first controlled switch assembly in parallel;
when the voltage value of the reverse signal is the ground voltage, the third output path is cut off, the fourth output path is conducted, and a first voltage is output;
when the voltage of the reverse signal is the power supply voltage, the third output path is conducted, the fourth output path is short-circuited, and a second voltage is output;
the ground voltage is lower than the power supply voltage, the first voltage is higher than the second voltage, and a first trigger voltage threshold corresponding to the first voltage is higher than a first trigger voltage threshold corresponding to the second voltage.
3. The flip-flop according to claim 2,
the third output path includes at least a first transistor; the fourth output path includes at least a second transistor;
the drain electrode of the first transistor is respectively connected with the drain electrode and the grid electrode of the second transistor; the source electrode of the first transistor and the source electrode of the second transistor are both grounded; the grid electrode of the first transistor is connected with the first hysteresis component; the drain electrode of the first transistor is connected with the first end of the first controlled switch component;
when the voltage of the reverse signal is power supply voltage, the first transistor is conducted, the second transistor is short-circuited, and the first voltage is output;
when the voltage of the reverse signal is the ground voltage, the first transistor is turned off, and the second transistor is turned on to output the second voltage.
4. The flip-flop according to claim 1,
the third controlled switch assembly comprises a fifth output path and a sixth output path, and the fifth output path and the sixth output path are connected to the second end of the first controlled switch assembly in parallel;
when the voltage value of the reverse signal is the ground voltage, the fifth output path is conducted, the sixth output path is short-circuited, and a third voltage is output;
when the voltage of the reverse signal is a power supply voltage, the fifth output path is cut off, the sixth output path is conducted, and a fourth voltage is output;
the ground voltage is lower than the power supply voltage, the third voltage is higher than the fourth voltage, and a second trigger voltage threshold corresponding to the third voltage is higher than a second trigger voltage threshold corresponding to the fourth voltage.
5. The flip-flop according to claim 4,
the fifth output path includes at least a third transistor; the sixth output path includes at least a fourth transistor;
the drain electrode of the third transistor is respectively connected with the drain electrode and the grid electrode of the fourth transistor; the source electrode of the third transistor and the source electrode of the fourth transistor are both connected with a power supply; the grid electrode of the third transistor is connected with the first hysteresis component; the drain electrode of the third transistor is connected with the second end of the first controlled switch component;
when the voltage of the reverse signal is the ground voltage, the third transistor is conducted, the fourth transistor is short-circuited, and the third voltage is output;
when the voltage of the inverted signal is a power supply voltage, the third transistor is turned off, and the fourth transistor is turned on to output the fourth voltage.
6. The flip-flop according to claim 1,
the first controlled switch component comprises a fifth transistor and a sixth transistor, and the fifth transistor and the sixth transistor are transistors with opposite polarities;
the fifth transistor is connected with a power supply through the second hysteresis component or the fifth transistor is connected with the power supply;
the sixth transistor is grounded through the second hysteresis component or the sixth transistor is grounded;
the voltage value of the input signal is higher than the first trigger voltage threshold, the fifth transistor is turned off, the sixth transistor turns on the first output path, and the first output path outputs a first signal;
the voltage value of the input signal is lower than a second trigger voltage threshold, the sixth transistor is turned off, the fifth transistor turns on the second output path, and the second output path outputs a second signal.
7. The flip-flop according to claim 1,
the second output path includes a fourth controlled switch component connected to a power supply;
the first output path includes a fifth controlled switch component connected to ground;
the voltage value of the input signal is higher than a first trigger voltage threshold, the fourth controlled switch is turned off, the fifth controlled switch is turned on, and a first signal is output;
the voltage value of the input signal is lower than a second trigger voltage threshold, the fifth controlled switch component is switched off, the fourth controlled switch component is switched on, and a second signal is output;
the voltage value of the first signal is a ground voltage, and the voltage value of the second signal is a power supply voltage.
8. The flip-flop according to claim 7,
the fourth controlled switch assembly includes: a seventh transistor, an eighth transistor, and a ninth transistor;
the grid electrode of the seventh transistor is connected with the output end of the first controlled switch component; the source electrode of the seventh transistor is grounded, the drain electrode of the seventh transistor is connected with the grid electrode of the eighth transistor, the source electrode of the eighth transistor is connected with the power supply, the drain electrode of the eighth transistor is connected with the source electrode of the ninth transistor, and the grid electrode of the ninth transistor is connected with the controlled end of the first controlled switch component; the drain electrode of the ninth transistor is connected with the input end of the first hysteresis component;
the voltage value of the input signal is higher than a first trigger voltage threshold value, and the seventh transistor, the eighth transistor and the ninth transistor are turned off;
the voltage value of the input signal is lower than a second trigger voltage threshold value, the seventh transistor, the eighth transistor and the ninth transistor are conducted, and the second signal is output.
9. The flip-flop according to claim 8,
the fifth controlled switch assembly includes: a tenth transistor, an eleventh transistor, and a twelfth transistor;
a source of the tenth transistor is connected to a power supply, a gate of the tenth transistor is connected to the output terminal of the first controlled switch component, a drain of the tenth transistor is connected to a gate of the eleventh transistor, a source of the eleventh transistor is grounded, a drain of the eleventh transistor is connected to a source of the twelfth transistor, a gate of the twelfth transistor is connected to the controlled terminal of the first controlled switch component, and a drain of the twelfth transistor is connected to the input terminal of the first hysteresis component;
the voltage value of the input signal is lower than the second trigger voltage threshold, and the tenth transistor, the eleventh transistor and the twelfth transistor are turned off;
the voltage value of the input signal is higher than the first trigger voltage threshold, the tenth transistor, the eleventh transistor and the twelfth transistor are turned on, and the first signal is output.
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CN105337593A (en) * 2014-06-30 2016-02-17 无锡华润矽科微电子有限公司 Hysteresis circuit structure capable of realizing enhanced anti-interference capability
CN109394169A (en) * 2018-10-17 2019-03-01 深圳硅基智能科技有限公司 Medical Devices with hysteresis module

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CN105337593A (en) * 2014-06-30 2016-02-17 无锡华润矽科微电子有限公司 Hysteresis circuit structure capable of realizing enhanced anti-interference capability
CN109394169A (en) * 2018-10-17 2019-03-01 深圳硅基智能科技有限公司 Medical Devices with hysteresis module

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