CN113672510A - Software program debugging method for SoC system - Google Patents
Software program debugging method for SoC system Download PDFInfo
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- CN113672510A CN113672510A CN202110954809.8A CN202110954809A CN113672510A CN 113672510 A CN113672510 A CN 113672510A CN 202110954809 A CN202110954809 A CN 202110954809A CN 113672510 A CN113672510 A CN 113672510A
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- 238000000034 method Methods 0.000 title claims abstract description 29
- 239000011159 matrix material Substances 0.000 claims description 13
- 238000010586 diagram Methods 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- LHMQDVIHBXWNII-UHFFFAOYSA-N 3-amino-4-methoxy-n-phenylbenzamide Chemical compound C1=C(N)C(OC)=CC=C1C(=O)NC1=CC=CC=C1 LHMQDVIHBXWNII-UHFFFAOYSA-N 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
- G06F11/362—Software debugging
- G06F11/3648—Software debugging using additional hardware
Abstract
The invention discloses a software program debugging method for an SoC system, which comprises the steps of confirming slave equipment needing to be monitored; arranging a monitor at an inlet end of a slave device to be monitored; recording different host devices accessing the slave devices to be monitored through ID information in an AXI protocol; designing a software debugging function for each set monitor; and debugging the software program of the SoC system by combining the prior art and the technical contents. The method skillfully designs the setting position of the monitor, distinguishes different host accesses through ID information, and innovatively designs the debugging function of the monitor, so that the method can better serve the software program debugging of the SoC system; moreover, the method has the advantages of high resource utilization rate, high reliability, good universality, stability and scientificity.
Description
Technical Field
The invention belongs to the field of chip design, and particularly relates to a software program debugging method for an SoC system.
Background
With the development of semiconductor material technology, the integration level of the IC reaches an unprecedented level, the number of transistors integrated on a single chip exceeds 10 hundred million, and the functions of the chip are more and more complex and diversified. The complexity and diversity of the design tend to increase the difficulty of the application system and software programs. With the development of embedded SoC, the integration level and complexity are higher and higher, and the phenomena of multiple hosts and multiple slaves in a single chip are more and more varied. Based on the considerations of performance and access efficiency, most of the masters and slaves support the AXI protocol in AMBA to meet the design requirements.
In order to monitor the real-time bandwidth of some devices while the system is running, researchers need to add monitor modules to the design. In order to distinguish the accesses of different masters to the slave devices, it is common practice to add a monitor module at the exit of the master side, and to distinguish the different devices by address for statistics, as shown by the cross positions in fig. 1. For the statistics of the same slave device, the method needs to add a monitor module on each host channel, and determines which specific slave device is accessed according to the address. However, this method requires adding monitors at the egress ends of all hosts, which not only wastes design resources, but also requires modifying monitor codes for different designs and device address changes, which is not highly versatile.
Disclosure of Invention
The invention aims to provide a stable and scientific software program debugging method for an SoC system, which has the advantages of high resource utilization rate, high reliability and good universality.
The invention provides a software program debugging method for an SoC system, which comprises the following steps:
s1, confirming slave equipment needing to be monitored;
s2, arranging a monitor at the inlet end of the slave equipment to be monitored;
s3, recording different host devices accessing the slave devices to be monitored through ID information in an AXI protocol;
s4, designing a software debugging function aiming at each set monitor;
and S5, debugging the software program of the SoC system by combining the prior art and the technical contents of the steps S1-S4.
The step S3 of recording, through ID information in the AXI protocol, different host devices that access the slave device to be monitored, specifically includes the following steps:
setting that m host devices and n slave devices exist, wherein the host devices and the slave devices are connected through an AXI bus matrix, each host device corresponds to an independent code, and the ID information widths of all host ports of the AXI bus matrix are the same;
host port ID information width AM of AXI bus matrixidIs represented by the following formula:
AMid＝max(AMid1,AMid2,...,AMidi,...,AMidm)
in the formula AMidiID information width identification of the ith host device;
ID information bit width AS of slave side of AXI bus matrixidIs represented by the following formula:
log in formula2m is the number of bits required for encoding all the host devices;
the operation of rounding up is carried out;
C. and B, recording different host devices accessing the slave devices to be monitored according to the bit number information required by all the host devices and the independent code corresponding to each host device in the step B.
The step S4 of designing a software debug function for each set monitor specifically includes the following steps:
a. the software debugging function is arranged at the position of the storage space;
b. setting a plurality of debugging windows according to requirements aiming at the same slave equipment port; each debug window is used to set parameters.
B, setting a plurality of debugging windows according to requirements aiming at the same slave equipment port; each debugging window is used for setting parameters, specifically, a plurality of debugging windows are set according to requirements for the same slave equipment port; each window is provided with three parameters, namely Master, Property and Address Range; wherein, the Master is the host information for accessing the slave equipment; property is the scope Property of the accessed address interval, and the scope Property comprises a read-only Property and a write-only Property; address Range is the range of the debug address and is an open range.
The software program debugging method for the SoC system skillfully designs the setting position of the monitor, distinguishes different host accesses through ID information, and innovatively designs the debugging function of the monitor, so that the method can better serve the software program debugging for the SoC system; moreover, the method has the advantages of high resource utilization rate, high reliability, good universality, stability and scientificity.
Drawings
Fig. 1 is a schematic diagram of a setting position of a monitor in software debugging in the prior art.
FIG. 2 is a schematic flow chart of the method of the present invention.
FIG. 3 is a schematic view of the position of the monitor according to the method of the present invention.
FIG. 4 is a schematic diagram of a debugging window of the method of the present invention.
Detailed Description
FIG. 2 is a schematic flow chart of the method of the present invention: the invention provides a software program debugging method for an SoC system, which comprises the following steps:
s1, confirming slave equipment needing to be monitored;
s2, arranging a monitor at the inlet end of the slave equipment to be monitored; the cross (x) position as shown in fig. 3;
s3, recording different host devices accessing the slave devices to be monitored through ID information in an AXI protocol; the method specifically comprises the following steps:
setting that m host devices and n slave devices exist, wherein the host devices and the slave devices are connected through an AXI bus matrix, the ID information width of each host can be different, each host device corresponds to an independent code, and the ID information widths of all host ports of the AXI bus matrix are the same;
host port ID information width AM of AXI bus matrixidIs represented by the following formula:
AMid＝max(AMid1,AMid2,...,AMidi,...,AMidm)
in the formula AMidiID information width identification of the ith host device;
B. for a specific slave device, taking S2 as an example, there is a path from M1 to Mm to S2, and the dashed line in the figure is M1 to S2; in order to distinguish different hosts from accessing the same slave, ID information bit width expansion can occur when an ID in an AXI bus protocol passes through an AXI bus matrix, and the ID information bit width AS of the slave side of the AXI bus matrixidIs represented by the following formula:
log in formula2m is the number of bits required for encoding all the host devices;
the operation of rounding up is carried out;
C. b, recording different host devices accessing the slave devices to be monitored according to bit number information required by all the host devices coded in the step B and the independent codes corresponding to each host device;
during specific implementation, for example, code 1 corresponds to an M1 host, code 2 corresponds to an M2 host, and so on, the host can be determined by using the extended ID information bits at the slave side, so that the host access can be accurately determined on the premise of saving resource overhead, and the code reusability is high;
s4, designing a software debugging function aiming at each set monitor; the method specifically comprises the following steps:
a. the software debugging function is arranged at the position of the storage space; slave device ports such as SDR, DDR, SPRAM, IRAM or ROM;
b. setting a plurality of debugging windows according to requirements aiming at the same slave equipment port; each debugging window is used for setting parameters; as shown in fig. 4; specifically, a plurality of debugging windows are set according to requirements for the same slave equipment port; each window is provided with three parameters, namely Master, Property and Address Range; wherein, the Master is the host information for accessing the slave equipment; property is the scope Property of the accessed address interval, and the scope Property comprises a read-only Property and a write-only Property; the Address Range is a range of the debug address and is an open range;
when the monitor is required to be used, the monitor is required to be selectively used according to the configuration; for example, when the system is running, a code segment of a certain program is put on the DDR, and the software engineer knows the storage location of the code segment; the code segment cannot be modified by any host machine in the running process; therefore, a monitor function window is set, and one column of the Address Range is set as an address interval for storing the code segment; property is set to a read-only Property; one Master column is set as host ID information for forbidding accessing the address range;
through the setting of the mode, when the write operation of the host to the address range is forbidden, the interrupt can be generated; when the CPU receives the interrupt, the CPU enters ISR (interrupt Service routes) to perform interrupt processing operation; meanwhile, a software engineer can determine the position of a bug possibly existing in a software program according to the window information, and effectively and quickly assist in positioning; in the use process, a larger range can be set at the early stage, and then a gradual retraction mode is adopted. Meanwhile, the DEBUG function of the software code can be completed by matching with a plurality of windows for simultaneous use. The method brings great convenience to software engineers;
s5, debugging the software program of the SoC system by combining the prior art and the technical contents of the steps S1-S4; in specific implementation, the technical contents of steps S1 to S4 are added to the debugging process of the software program of the existing SoC system, and the debugging of the software program of the SoC system can be completed by combining the existing debugging technology.
Claims (4)
1. A software program debugging method for an SoC system comprises the following steps:
s1, confirming slave equipment needing to be monitored;
s2, arranging a monitor at the inlet end of the slave equipment to be monitored;
s3, recording different host devices accessing the slave devices to be monitored through ID information in an AXI protocol;
s4, designing a software debugging function aiming at each set monitor;
and S5, debugging the software program of the SoC system by combining the prior art and the technical contents of the steps S1-S4.
2. The method for debugging software program of SoC system of claim 1, wherein the step S3 of recording different host devices accessing the slave device to be monitored through ID information in AXI protocol specifically includes the following steps:
setting that m host devices and n slave devices exist, wherein the host devices and the slave devices are connected through an AXI bus matrix, each host device corresponds to an independent code, and the ID information widths of all host ports of the AXI bus matrix are the same;
host port ID information width AM of AXI bus matrixidIs represented by the following formula:
AMid＝max(AMid1,AMid2,...,AMidi,...,AMidm)
in the formula AMidiID information width identification of the ith host device;
ID information bit width AS of slave side of AXI bus matrixidIs represented by the following formula:
log in formula2m is the number of bits required for encoding all the host devices;
the operation of rounding up is carried out;
C. and B, recording different host devices accessing the slave devices to be monitored according to the bit number information required by all the host devices and the independent code corresponding to each host device in the step B.
3. The method for debugging software program of SoC system according to claim 1 or 2, wherein the step S4 of designing software debug function for each monitor of the settings specifically includes the steps of:
a. the software debugging function is arranged at the position of the storage space;
b. setting a plurality of debugging windows according to requirements aiming at the same slave equipment port; each debug window is used to set parameters.
4. The method for debugging software program of SoC system according to claim 3, wherein a plurality of debugging windows are set according to the requirement for the same slave device port in step b; each debugging window is used for setting parameters, specifically, a plurality of debugging windows are set according to requirements for the same slave equipment port; each window is provided with three parameters, namely Master, Property and Address Range; wherein, the Master is the host information for accessing the slave equipment; property is the scope Property of the accessed address interval, and the scope Property comprises a read-only Property and a write-only Property; address Range is the range of the debug address and is an open range.
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070168731A1 (en) * | 2005-12-15 | 2007-07-19 | Emil Lambrache | Dual CPU on-chip-debug low-gate-count architecture with real-time-data tracing |
| CN101989242A (en) * | 2010-11-12 | 2011-03-23 | 深圳国微技术有限公司 | Bus monitor for improving safety of SOC (System on a Chip) as well as realizing method thereof |
| CN102592083A (en) * | 2011-12-27 | 2012-07-18 | 深圳国微技术有限公司 | Storage protecting controller and method for improving safety of SOC (system on chip) |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070168731A1 (en) * | 2005-12-15 | 2007-07-19 | Emil Lambrache | Dual CPU on-chip-debug low-gate-count architecture with real-time-data tracing |
| CN101989242A (en) * | 2010-11-12 | 2011-03-23 | 深圳国微技术有限公司 | Bus monitor for improving safety of SOC (System on a Chip) as well as realizing method thereof |
| CN102592083A (en) * | 2011-12-27 | 2012-07-18 | 深圳国微技术有限公司 | Storage protecting controller and method for improving safety of SOC (system on chip) |
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