CN113645004B - Comparison method of high-precision bidirectional time-frequency comparison system based on pulse width modulation - Google Patents

Comparison method of high-precision bidirectional time-frequency comparison system based on pulse width modulation Download PDF

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CN113645004B
CN113645004B CN202111198851.8A CN202111198851A CN113645004B CN 113645004 B CN113645004 B CN 113645004B CN 202111198851 A CN202111198851 A CN 202111198851A CN 113645004 B CN113645004 B CN 113645004B
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module
time
dpll
frequency
optical
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CN113645004A (en
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谢朝阳
曾迎春
朱敏
龚鹏
张中正
刘波
简和兵
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Chengdu Jinnuoxin High Tech Co Ltd
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Chengdu Jinnuoxin High Tech Co Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/0635Clock or time synchronisation in a network
    • H04J3/0638Clock or time synchronisation among nodes; Internode synchronisation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B14/00Transmission systems not characterised by the medium used for transmission
    • H04B14/02Transmission systems not characterised by the medium used for transmission characterised by the use of pulse modulation
    • H04B14/026Transmission systems not characterised by the medium used for transmission characterised by the use of pulse modulation using pulse time characteristics modulation, e.g. width, position, interval

Abstract

The invention provides a comparison method of a high-precision bidirectional time-frequency comparison system based on pulse width modulation, which adopts a PWM (pulse width modulation) mode to modulate a time signal to a frequency signal to be transmitted in the same channel. The method comprises the steps of obtaining optical fiber link noise through self-heterodyne loopback comparison of frequency signals, transmitting stable time signals to a slave end station in a mode of compensating the link noise by using a delay line, compensating transmission delay of a link at a local end, and realizing time synchronization and frequency homology between two places.

Description

Comparison method of high-precision bidirectional time-frequency comparison system based on pulse width modulation
Technical Field
The invention belongs to the technical field of time synchronization, and particularly relates to a comparison method of a high-precision bidirectional time-frequency comparison system based on pulse width modulation.
Background
With the continuous development of scientific technology and the more extensive application of time synchronization technology, the requirement on time synchronization precision is higher and higher. Especially in scientific research, modern high-precision equipment and systems, the accuracy and stability of time are of great importance. At present, the common time service modes at home and abroad include short-wave time service, long-wave time service, satellite time service, network time service, optical fiber time service and the like.
Due to the influence of atmospheric environment, a satellite-based time-frequency transmission mode can not meet the current application requirement gradually; compared with the traditional satellite, long wave and network time service, the optical fiber time service has the advantages of low loss, stable transmission, large bandwidth, small influence of external environment and the like. Therefore, the time synchronization method using the optical fiber channel as the transmission medium has been rapidly developed, and becomes an important method for realizing high-precision time synchronization. The optical fiber time synchronization method based on bidirectional comparison is the most widely applied technology in optical fiber time service.
Disclosure of Invention
The invention provides a comparison method of a high-precision bidirectional time-frequency comparison system based on pulse width modulation, which aims to improve the time service precision of optical fiber bidirectional comparison. The method comprises the steps of obtaining optical fiber link noise through self-heterodyne loopback comparison of frequency signals, transmitting stable time signals to a slave end station in a mode of compensating the link noise by using a delay line, compensating transmission delay of a link at a local end, and realizing time synchronization and frequency homology between two places.
The specific implementation content of the invention is as follows:
the invention provides a comparison method of a high-precision bidirectional time-frequency comparison system based on pulse width modulation, which is based on an optical fiber bidirectional comparison system connected with a reference time frequency source and used for optical fiber time synchronization comparison; the optical fiber bidirectional comparison method comprises the following steps:
step 1: the method for constructing the optical fiber bidirectional comparison system comprises the following specific construction methods: setting a main end platform, an optical module and a slave end platform;
a first DPLL module, a first PWM integer frequency division module and a first electro-optical/photoelectric conversion module are arranged in the main end platform; respectively connecting the first DPLL with a reference time frequency source, a first PWM integer frequency division module and a first electro-optical/photoelectric conversion module; the first PWM integer frequency division module is also connected with a first electro-optical/photoelectric conversion module; the first electro-optical/photoelectric conversion module is also connected with the optical module;
a second DPLL module, a second PWM integer frequency division module and a second electro-optical/photoelectric conversion module are respectively arranged in the slave end station; the second DPLL is respectively connected with a reference time frequency source, a second PWM integer frequency division module and a second electro-optical/photoelectric conversion module; the second PWM integer frequency division module is also connected with a second electro-optical/photoelectric conversion module; the second electro-optical/photoelectric conversion module is also connected with the optical module;
step 2: the method comprises the steps that a first DPLL module is used for receiving a 1PPS time signal and a frequency signal which are sent by a reference time frequency source and sending the time signal and the frequency signal to the first DPLL module for DPLL module phase locking;
and step 3: sending the 1PPS time signal and the frequency signal which are subjected to phase locking by the first DPLL module to a first PWM integer frequency division module for PWM modulation, and modulating the 1PPS time signal into the frequency signal to obtain the frequency signal with time information;
and 4, step 4: converting the frequency signal with the time information into an optical signal by using a first electro-optical/photoelectric conversion module, and sending the optical signal to a second electro-optical/photoelectric conversion module of the slave end station through an optical module;
and 5: and converting the received optical signal into a frequency signal with time information through a second electro-optical/photoelectric conversion module, demodulating a frequency signal and a 1PPS time signal corresponding to the master end station, sending the frequency signal and the 1PPS time signal to a second DPLL module, comparing the frequency signal with a 1PPS time signal output by a local clock source on the second DPLL module, measuring the time of the 1PPS time signal passing through a link, calculating a time delay value according to a measured value, and performing time delay adjustment on the first DPLL module and/or the second DPLL module to realize the synchronization of the time signals.
In order to better realize the invention, further, the slave end station is used for reversely modulating time information and frequency information and sequentially sending the time information and the frequency information to the master end station through the second electro-optical/photoelectric conversion module, the optical module and the first electro-optical/photoelectric conversion module, PWM demodulation is carried out on the master end station to obtain a corresponding frequency signal and a 1PPS time signal of the slave end station, the frequency signal and the 1PPS time signal are compared with a local frequency signal and a local 1PPS time signal of the master end station, the time of the 1PPS time signal passing through a link is measured, a time delay value is calculated according to a measured value, and then time delay adjustment is carried out on the first DPLL module and/or the second DPLL module to realize the synchronization of the time signals.
In order to better implement the present invention, further, in step 1, an OCXO crystal oscillator module is further configured, where the OCXO crystal oscillator module is configured in the host station and connected to the first DPLL module; the stability of the local clock of the first DPLL module is guaranteed using the OCXO crystal oscillator module.
In order to better implement the present invention, further, an external TDC measurement chip is further disposed in step 1, and the external TDC measurement chip is disposed in the main end station and connected to the first DPLL module and the first electro-optical/electro-optical conversion module; and an external TDC measurement chip is used for measuring the 1PPS time delay condition with higher precision and testing the time difference of the frequency signal with higher precision.
In order to better implement the invention, further, the external TDC measuring chip adopts an AD9545 chip.
In order to better implement the present invention, further, in step 1, an input clock selection unit, a first DPLL channel module, a second DPLL channel module, a system DPLL channel module, a PPS encoder, a PPS separator, a system APLL module, and a CPU control unit are respectively disposed in the first DPLL module and the second DPLL module;
a phase discriminator, a low-pass filter, a first digital loop filter and a distributor are arranged in the first DPLL channel module; the input end of the phase discriminator is connected with an input clock selection unit and a distributor, and the output end of the phase discriminator is connected with a low-pass filter and then is connected with the first digital loop filter together with a CPU control unit; connecting the output end of the first digital loop filter and the output end of a system DPLL channel module together with a PPS encoder; the PPS encoder is also connected with a system APLL and a distributor;
and connecting the input end of the second digital loop filter with a CPU control unit, and connecting the output end of the second digital loop filter, the output end of the first digital loop filter and the output end of the system DPLL channel module with the PPS separator.
In order to better implement the present invention, further, a first controllable output frequency divider and a first integer frequency divider are provided in the PPS encoder;
the first controllable output frequency divider is respectively connected with a first loop filter, a system DPLL channel module, a system APLL module and a first integer frequency divider; the first integer frequency divider is connected with the distributor.
In order to better implement the invention, further, a second controllable output frequency divider and a second integer frequency divider are arranged on the PPS separator;
and respectively connecting the second controllable output frequency divider with the second digital loop filter, the first digital loop filter, the system DPLL channel module and the system APLL module.
In order to better implement the present invention, further, both the first PWM integer frequency division module and the second PWM integer frequency division module are provided with a PWM modem and an integer frequency divider; and connecting the PWM modem with an integer frequency divider.
Compared with the prior art, the invention has the following advantages and beneficial effects:
1. the invention realizes the calibration and synchronization of time signals of the transmitting end and the receiving end and the homology and locking of frequency signals, and improves the time service precision of the optical fiber bidirectional comparison;
2. the invention adopts the PWM optical fiber bidirectional comparison technology, can directly transmit frequency and data, and realizes data transmission on the premise of ensuring the front edge periodicity of frequency signals. Namely, data transmission is realized on the premise of ensuring high frequency signals.
Drawings
FIG. 1 is a logic block diagram of a transmitting end according to the present invention;
fig. 2 is a logic frame diagram of adding an external TDC measurement chip and an OCXO crystal oscillator module based on the frame of fig. 1;
fig. 3 is a logic framework diagram of a receiving end corresponding to the transmitting end of fig. 1 and fig. 2;
FIG. 4 is a schematic diagram of PWM modulation according to the present invention;
fig. 5 is a logic diagram of a first DPLL block and a second DPLL block performing DPLL phase locking according to the present invention;
FIG. 6 is a schematic diagram of PWM encoding according to the present invention;
FIG. 7 is a schematic diagram of the time sequence relationship between the PWM encoded time information and the communication management information of 0-0.5S according to the present invention;
FIG. 8 is a schematic diagram of the time sequence relationship between the PWM encoded time information and the communication management information of the present invention in the range of 0.5-1S.
Detailed Description
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it should be understood that the described embodiments are only a part of the embodiments of the present invention, and not all embodiments, and therefore should not be considered as a limitation to the scope of protection. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, are within the scope of the present invention.
In the description of the present invention, it is to be noted that, unless otherwise explicitly specified or limited, the terms "disposed," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
Example 1:
the embodiment provides a comparison method of a high-precision bidirectional time-frequency comparison system based on pulse width modulation, which is connected with a reference time frequency source and used for optical fiber time synchronization comparison; as shown in fig. 1 and 3, the optical fiber bidirectional comparison system includes a master end station, an optical module, and a slave end station;
the main end platform comprises a first DPLL module, a first PWM integer frequency division module and a first electro-optical/photoelectric conversion module; the first DPLL is respectively connected with a reference time frequency source, a first PWM integer frequency division module and a first electro-optical/photoelectric conversion module; the first PWM integer frequency division module is also connected with the first electro-optical/photoelectric conversion module; the first electro-optical/photoelectric conversion module is also connected with the optical module;
the slave end station comprises a second DPLL module, a second PWM integer frequency division module and a second electro-optical/photoelectric conversion module; the second DPLL is respectively connected with a reference time frequency source, a second PWM integer frequency division module and a second electro-optical/photoelectric conversion module; the second PWM integer frequency division module is also connected with a second electro-optical/photoelectric conversion module; the second electro-optical/photoelectric conversion module is also connected with the optical module.
The working principle is as follows: the transmitting terminal equipment of the optical fiber bidirectional comparison system transmits the 1PPS time signal and the frequency signal with high stability and high accuracy of the reference time frequency source to the receiving terminal equipment through the optical fiber link, and the receiving terminal equipment compares and adjusts the local 1PPS time signal and the local frequency signal.
The DPLL module, the electro-optical/photoelectric conversion module and the optical transmitter are arranged in the transmitting end;
and a DPLL module, an electro-optical/photoelectric conversion module and an optical transmitter are arranged in the receiving end.
The time delay calibration and time signal synchronization principle of the scheme is as follows: the time signal takes 1PPS as an example, and a 1PPS signal and a 10MHz frequency signal generated by a reference time frequency source are subjected to phase locking and PWM modulation by a DPLL module; the 1PPS signal is modulated into a sinusoidal frequency signal, and the frequency signal with time information is converted into an optical signal through a local electro-optical conversion module and an optical transmitter. Transmitted to the remote end via a fiber optic link. The photoelectric conversion module at the far-end converts the optical signal into a frequency signal with time information, and the 1PPS signal and the frequency signal are decoded and recovered through a DPLL chip by a predetermined coding rule. Meanwhile, the 1PPS converts the electric signals into optical signals again through an optical transmitter at the remote end and transmits the optical signals back along the same optical fiber link. And converting the returned optical signal into 1PPS output by using an optical receiver and a photoelectric conversion module at the local end. The output 1PPS signal is compared with the output 1PPS signal of the local clock source to measure the round trip time of the 1PPS on the link. And calculating a time delay value enabling the time signal to be synchronized according to the measured value. The time delay is adjusted through the DPLL chip, and the effect of time signal synchronization between two places is achieved.
Example 2:
in this embodiment, on the basis of embodiment 1 described above, as shown in fig. 2 and 3, in order to better implement the present invention, the present invention further includes an OCXO crystal oscillator module that is disposed in the master end station and connected to the first DPLL module.
In order to better implement the invention, the external TDC measurement chip is further included, and the external TDC measurement chip is arranged in the main end station and connected with the first DPLL module and the first electro-optical/photoelectric conversion module.
The working principle is as follows: the optical fiber bidirectional comparison system adopting PWM modulation can be added with an external TDC measurement chip (AD 9545) and is used for high-precision measurement of 1PPS time delay condition and high-precision time difference test of frequency signals. And a high-stability OCXO crystal oscillator is added to ensure the stability of the local clock.
Other parts of this embodiment are the same as those of embodiment 1, and thus are not described again.
Example 3:
in this embodiment, on the basis of any one of the foregoing embodiments 1-2, as shown in fig. 5, in order to better implement the present invention, further, the first DPLL module and the second DPLL module have the same structure, and each of the first DPLL module and the second DPLL module includes an input clock selecting unit, a first DPLL channel module, a second DPLL channel module, a system DPLL channel module, a PPS encoder, a PPS splitter, a system APLL module, and a CPU control unit;
the first DPLL channel module comprises a phase discriminator, a low-pass filter, a first digital loop filter and a distributor; the input end of the phase discriminator is connected with the input clock selection unit and the distributor, and the output end of the phase discriminator is connected with the low-pass filter and then is connected with the CPU control unit together with the first digital loop filter; the output end of the first digital loop filter and the output end of the system DPLL channel module are connected with the PPS encoder together; the PPS encoder is also connected with the system APLL and the distributor;
the input end of the second digital loop filter is connected with the CPU control unit, and the output end of the second digital loop filter, the output end of the first digital loop filter and the output end of the system DPLL channel module are connected with the PPS separator together.
To better implement the present invention, further, the PPS encoder includes a first controllable output frequency divider, a first integer frequency divider;
the first controllable output frequency divider is respectively connected with the first loop filter, the system DPLL channel module, the system APLL module and the first integer frequency divider; the first integer frequency divider is connected with the distributor.
To better implement the present invention, further, the PPS separator includes a second controllable output frequency divider, a second integer frequency divider;
and the second controllable output frequency divider is respectively connected with the second digital loop filter, the first digital loop filter, the system DPLL channel module and the system APLL module.
The working principle is as follows: the Digital Phase-locked Loop generally includes three parts, namely, a Digital Phase Detector (DPD), a Digital Loop Filter (DLF), and a Digital voltage controlled Oscillator (DCO). A digital phase detector is used to compare the phase of an input signal with the output signal of a voltage controlled oscillator whose output voltage is a function of the phase difference corresponding to the two signals. The digital loop filter suppresses input noise in the loop and adjusts the correction speed of the loop. Digitally controlled oscillators, also known as digital clocks. It is located in the digital loop in a position equivalent to a Voltage Controlled Oscillator (VCO) in an analog phase locked loop. However, its output is a pulse train whose period is controlled by the correction signal from the digital loop filter. The control is characterized in that the correction signal obtained at the previous sampling moment changes the pulse time position at the next sampling moment.
The basic operation of the digital phase-locked loop is as follows:
1) the input signal ui (t) and the local oscillator signal (digital vco output signal) uo (t) are sine and cosine signals, respectively, which are compared in a digital phase detector whose output is a voltage ud (t) proportional to the phase difference between them.
2) The digital loop filter divides high-frequency components in the output of the digital phase detector, and then an output voltage Uc (t) is added to the output end of the digital voltage-controlled oscillator, and the frequency of a local oscillator signal of the digital voltage-controlled oscillator changes along with the change of the input voltage. If the two frequencies are not consistent, the output of the digital phase discriminator will generate low-frequency variation components, and the frequency of the DCO is changed through a low-pass filter. This change will cause the frequency of the local oscillator signal uo (t) to coincide with the frequency of the digital phase detector input signal ui (t) as long as the loop design is correct.
3) Finally, if the frequency of the local oscillator signal is completely consistent with the frequency of the input signal, and the phase difference between the local oscillator signal and the input signal keeps a certain constant value, the output of the digital phase discriminator is a constant direct current voltage (ignoring high-frequency components), the output of the digital loop filter is also a direct current voltage, the frequency of the DCO stops changing, and at this time, the loop is in a "locked state".
As shown in the DPLL phase-locked scheme of fig. 5: this scheme will use up to 3 DPLL channels. The system DPLL channel is provided as a source to the remaining two DPLLs. In this scheme, a DPLL will lock to a reference input clock, such as a synchronous ethernet clock or an opto-electronically converted frequency clock with time information; and the DPLL may generate an output clock of a different frequency to track the input reference clock. The second channel acts as a DCO that is controlled by an external processor or directly tracks the first channel so that each channel will not cause any missing pulses or output clocks, since the frequency variations are limited by at least one loop filter. The DCO local oscillator is a clock provided by a local high-stability crystal oscillator, and meanwhile, the local external measurement chip realizes the locking of the constant-temperature crystal oscillator by measuring the clock recovered by the optical receiver and the clock condition of the crystal oscillator.
In the scheme, the master station synchronizes 1PPS generated by a DPLL according to PPS generated by a reference time source, and PWM codes the PPS, time information and inter-device communication management information to a clock signal and sends the PPS, the time information and the inter-device communication management information to the slave station; and the slave station synchronizes the 1PPS and the frequency signal generated by the phase-locked loop according to the demodulated 1PPS and the clock signal generated by decoding, and then carries out PWM coding and sends the signals to the master station. Therefore, the time and the frequency are measured and compared in two directions between the master station and the slave station, and high-precision comparison is realized.
Other parts of this embodiment are the same as any of embodiments 1-2 described above, and thus are not described again.
Example 4:
in this embodiment, on the basis of any one of the above embodiments 1 to 3, as shown in fig. 4, 6, 7, and 8, to better implement the present invention, further, the first PWM integer frequency division module and the second PWM integer frequency division module each include a PWM modem and an integer frequency divider.
The working principle is as follows: in the scheme, the master station synchronizes 1PPS generated by a DPLL according to PPS generated by a reference time source, and PWM codes the PPS, time information and inter-device communication management information to a clock signal and sends the PPS, the time information and the inter-device communication management information to the slave station; the slave station decodes the received frequency signal to generate a 1PPS signal, time information and a clock signal; and calculating local time and frequency difference, adjusting the local time and frequency, and then sending the local time and frequency signals to the master station through the PWM modulation mode. The master station decodes to generate 1PPS (pulse per second) looped back by the slave station, the time difference between the converted 1PPS and the current second is measured, and the time difference is divided by 2 to obtain the adjustment quantity of the slave station, the master station transmits the adjustment quantity to the slave station through an optical fiber network, and the slave station adjusts a local second signal to realize master-slave alignment. Meanwhile, the measurement and comparison of frequency signals between the master station and the slave station are realized.
The schematic diagram of PWM modulation is shown in fig. 4, where the DPLL generates a standard frequency signal, the rising edge of each clock is of equal period, and clocks with different duty ratios are implemented by changing the position of the falling edge of each clock, and the different duty ratios represent different values. For example, as shown in FIG. 6: logic 0 represents a 25% duty cycle, logic 1 represents a 75% duty cycle, and a 50% duty cycle represents no modulation.
The clock frame header in the modulated 25M frequency signal corresponding to the 1PPS signal is shown in fig. 4. In encoding, in addition to the frame header for generating 1PPS, time information (including year, month, day, hour, minute, second) and communication management information between devices are generated by encoding. The time information and communication management information timing relationship is shown in fig. 7 and 8. Fig. 7 is a schematic diagram of a time sequence relationship between time information and communication management information in a range of 0-0.5S, fig. 7 is a schematic diagram of a time sequence relationship between time information and communication management information in a range of 0.5S-1S, and fig. 7 and fig. 8 are combined to obtain a schematic diagram of a time sequence relationship between time information and communication management information in a complete time period range of 0-1S. Therefore, the receiving end can decode and generate data information according to the agreed coding rule while receiving the standard frequency signal.
Other parts of this embodiment are the same as any of embodiments 1 to 3, and thus are not described again.
Example 5:
the embodiment also provides a comparison method of a high-precision bidirectional time-frequency comparison system based on pulse width modulation, which is based on an optical fiber bidirectional comparison system connected with a reference time frequency source and used for optical fiber time synchronization comparison; as shown in fig. 1, fig. 2, and fig. 3, the optical fiber bidirectional comparison method includes the following steps:
step 1: the method for constructing the optical fiber bidirectional comparison system comprises the following specific construction methods: setting a main end platform, an optical module and a slave end platform;
a first DPLL module, a first PWM integer frequency division module and a first electro-optical/photoelectric conversion module are arranged in the main end platform; respectively connecting the first DPLL with a reference time frequency source, a first PWM integer frequency division module and a first electro-optical/photoelectric conversion module; the first PWM integer frequency division module is also connected with a first electro-optical/photoelectric conversion module; the first electro-optical/photoelectric conversion module is also connected with the optical module;
a second DPLL module, a second PWM integer frequency division module and a second electro-optical/photoelectric conversion module are respectively arranged in the slave end station; the second DPLL is respectively connected with a reference time frequency source, a second PWM integer frequency division module and a second electro-optical/photoelectric conversion module; the second PWM integer frequency division module is also connected with a second electro-optical/photoelectric conversion module; the second electro-optical/photoelectric conversion module is also connected with the optical module;
step 2: the method comprises the steps that a first DPLL module is used for receiving a 1PPS time signal and a frequency signal which are sent by a reference time frequency source and sending the time signal and the frequency signal to the first DPLL module for DPLL module phase locking;
and step 3: sending the 1PPS time signal and the frequency signal which are subjected to phase locking by the first DPLL module to a first PWM integer frequency division module for PWM modulation, and modulating the 1PPS time signal into the frequency signal to obtain the frequency signal with time information;
and 4, step 4: converting the frequency signal with the time information into an optical signal by using a first electro-optical/photoelectric conversion module, and sending the optical signal to a second electro-optical/photoelectric conversion module of the slave end station through an optical module;
and 5: and converting the received optical signal into a frequency signal with time information through a second electro-optical/photoelectric conversion module, demodulating a frequency signal and a 1PPS time signal corresponding to the master end station, sending the frequency signal and the 1PPS time signal to a second DPLL module, comparing the frequency signal with a 1PPS time signal output by a local clock source on the second DPLL module, measuring the time of the 1PPS time signal passing through a link, calculating a time delay value according to a measured value, and performing time delay adjustment on the first DPLL module and/or the second DPLL module to realize the synchronization of the time signals.
Example 6:
in this embodiment, on the basis of the above embodiment 5, to better implement the present invention, as shown in fig. 1, fig. 2, and fig. 3, to better implement the present invention, further, the slave station is used to reversely modulate time information and frequency information, and sequentially transmit the time information and the frequency information to the master station through the second electro-optical/optical-to-optical conversion module, the optical module, and the first electro-optical/optical-to-optical conversion module, and perform PWM demodulation on the master station to obtain a corresponding frequency signal and a 1PPS time signal of the slave station, compare the frequency signal and the 1PPS time signal with a local frequency signal of the master station, measure a time when the 1PPS time signal passes through a link, calculate a delay value according to the measured value, and perform delay adjustment on the first DPLL module and/or the second DPLL module to implement synchronization of the time signal.
Other parts of this embodiment are the same as those of embodiment 5, and thus are not described again.
The above description is only a preferred embodiment of the present invention, and is not intended to limit the present invention in any way, and all simple modifications and equivalent variations of the above embodiments according to the technical spirit of the present invention are included in the scope of the present invention.

Claims (8)

1. A high-precision bidirectional time frequency comparison system comparison method based on pulse width modulation is based on an optical fiber bidirectional comparison system connected with a reference time frequency source and used for optical fiber time synchronization comparison; the method is characterized by comprising the following steps:
step 1: the method for constructing the optical fiber bidirectional comparison system comprises the following specific construction methods: setting a main end platform, an optical module and a slave end platform;
a first DPLL module, a first PWM integer frequency division module and a first electro-optical/photoelectric conversion module are arranged in the main end platform; respectively connecting the first DPLL with a reference time frequency source, a first PWM integer frequency division module and a first electro-optical/photoelectric conversion module; the first PWM integer frequency division module is also connected with a first electro-optical/photoelectric conversion module; the first electro-optical/photoelectric conversion module is also connected with the optical module;
a second DPLL module, a second PWM integer frequency division module and a second electro-optical/photoelectric conversion module are respectively arranged in the slave end station; the second DPLL is respectively connected with a reference time frequency source, a second PWM integer frequency division module and a second electro-optical/photoelectric conversion module; the second PWM integer frequency division module is also connected with a second electro-optical/photoelectric conversion module; the second electro-optical/photoelectric conversion module is also connected with the optical module;
step 2: the method comprises the steps that a first DPLL module is used for receiving a 1PPS time signal and a frequency signal which are sent by a reference time frequency source and sending the time signal and the frequency signal to the first DPLL module for DPLL module phase locking;
and step 3: sending the 1PPS time signal and the frequency signal which are subjected to phase locking by the first DPLL module to a first PWM integer frequency division module for PWM modulation, and modulating the 1PPS time signal into the frequency signal to obtain the frequency signal with time information;
and 4, step 4: converting the frequency signal with the time information into an optical signal by using a first electro-optical/photoelectric conversion module, and sending the optical signal to a second electro-optical/photoelectric conversion module of the slave end station through an optical module;
and 5: converting the received optical signal into a frequency signal with time information through a second electro-optical/photoelectric conversion module, demodulating a frequency signal corresponding to the master end station and a 1PPS time signal, sending the frequency signal and the 1PPS time signal to a second DPLL module, comparing the frequency signal with a 1PPS time signal output by a local clock source on the second DPLL module, and measuring the time of the 1PPS time signal passing through a link;
the reverse modulation time information and the frequency information of the slave end station are sequentially transmitted to the master end station through the second electro-optical/photoelectric conversion module, the optical module and the first electro-optical/photoelectric conversion module, PWM demodulation is carried out on the master end station to obtain a corresponding frequency signal and a 1PPS time signal of the slave end station, the frequency signal and the 1PPS time signal are compared with a local frequency signal and a 1PPS time signal of the master end station, and the time of the 1PPS time signal passing through a link is measured;
and calculating a time delay value according to the measured value, and then carrying out time delay adjustment on the first DPLL module and/or the second DPLL module to realize the synchronization of the time signals.
2. The comparison method of the pulse width modulation-based high-precision bidirectional time-frequency comparison system according to claim 1, wherein in step 1, an OCXO crystal oscillator module is further configured, and the OCXO crystal oscillator module is configured in the host station and connected to the first DPLL module; the stability of the local clock of the first DPLL module is guaranteed using the OCXO crystal oscillator module.
3. The comparison method of the pulse width modulation-based high-precision bidirectional time-frequency comparison system according to claim 1, wherein an external TDC measurement chip is further provided in the step 1, and the external TDC measurement chip is disposed in the master end station and connected to the first DPLL module and the first electro-optical/electro-optical conversion module; and an external TDC measurement chip is used for measuring the 1PPS time delay condition with higher precision and testing the time difference of the frequency signal with higher precision.
4. The comparison method of the pulse width modulation-based high-precision bidirectional time-frequency comparison system as claimed in claim 3, wherein the external TDC measurement chip is AD9545 chip.
5. The method for matching the pulse width modulation-based high-precision bidirectional time-frequency matching system as claimed in claim 1, 2, 3 or 4, wherein in step 1, an input clock selection unit, a first DPLL channel module, a second DPLL channel module, a system DPLL channel module, a PPS encoder, a PPS separator, a system APLL module and a CPU control unit are disposed in both the first DPLL module and the second DPLL module;
a phase discriminator, a low-pass filter, a first digital loop filter and a distributor are arranged in the first DPLL channel module; the input end of the phase discriminator is connected with an input clock selection unit and a distributor, and the output end of the phase discriminator is connected with a low-pass filter and then is connected with the first digital loop filter together with a CPU control unit; connecting the output end of the first digital loop filter and the output end of a system DPLL channel module together with a PPS encoder; the PPS encoder is also connected with a system APLL and a distributor;
setting a second digital loop filter in the second DPLL channel module; and connecting the input end of the second digital loop filter with a CPU control unit, and connecting the output end of the second digital loop filter, the output end of the first digital loop filter and the output end of the system DPLL channel module with the PPS separator.
6. The comparison method of the pulse width modulation-based high-precision bidirectional time-frequency comparison system as claimed in claim 5, wherein a first controllable output frequency divider and a first integer frequency divider are provided in the PPS encoder;
the first controllable output frequency divider is respectively connected with a first loop filter, a system DPLL channel module, a system APLL module and a first integer frequency divider; the first integer frequency divider is connected with the distributor.
7. The comparison method of the pulse width modulation-based high-precision two-way time-frequency comparison system as claimed in claim 6, wherein a second controllable output frequency divider and a second integer frequency divider are arranged in the PPS separator;
and respectively connecting the second controllable output frequency divider with the second digital loop filter, the first digital loop filter, the system DPLL channel module and the system APLL module.
8. The comparison method of the pulse width modulation-based high-precision two-way time-frequency comparison system according to claim 1, wherein the first PWM integer frequency division module and the second PWM integer frequency division module are both provided with a PWM modem and an integer frequency divider; and connecting the PWM modem with an integer frequency divider.
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