CN113594228A - Gallium nitride Schottky barrier diode with heterojunction terminal and preparation method - Google Patents

Gallium nitride Schottky barrier diode with heterojunction terminal and preparation method Download PDF

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CN113594228A
CN113594228A CN202110845428.6A CN202110845428A CN113594228A CN 113594228 A CN113594228 A CN 113594228A CN 202110845428 A CN202110845428 A CN 202110845428A CN 113594228 A CN113594228 A CN 113594228A
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metal layer
schottky
gallium nitride
anode metal
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周弘
杨蓉
张进成
刘志宏
许晟瑞
郝跃
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Xidian University
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Abstract

The invention discloses a gallium nitride Schottky barrier diode with a heterojunction terminal and a preparation method thereof, and mainly solves the problems of low breakdown voltage and poor reliability in the prior art. The device comprises a substrate layer (1), a gallium nitride channel layer (2) and an aluminum gallium nitrogen barrier layer (3) from bottom to top, wherein an ohmic cathode metal layer (4) and a Schottky anode metal layer (5) are respectively arranged at two ends of the aluminum gallium nitrogen barrier layer; a P-type nickel oxide layer (6) is arranged on the left side of the Schottky anode metal layer, so that a wider depletion region is formed when the device works in the reverse direction; a passivation dielectric layer (7) is arranged between the ohmic cathode metal layer and the P-type nickel oxide layer so as to fill N vacancies in the AlGaN barrier layer; the Schottky anode metal layer adopts an embedded groove structure, one side of the Schottky anode metal layer is tightly attached to the P-type nickel oxide layer, and the lower part of the Schottky anode metal layer is embedded into the gallium nitride channel layer. The invention improves the reverse breakdown voltage of the gallium nitride Schottky barrier diode, reduces the reverse leakage, and can be used for high-frequency high-power electronic equipment.

Description

Gallium nitride Schottky barrier diode with heterojunction terminal and preparation method
Technical Field
The invention belongs to the technical field of microelectronics, and particularly relates to a gallium nitride Schottky barrier diode which can be used for manufacturing various high-power electronic devices.
Background
Gallium nitride is a representative of third-generation semiconductor materials, has an ultra-wide forbidden band width of 3.4eV, has a theoretical breakdown field intensity much higher than that of a silicon-based device, and simultaneously has high electron mobility and low intrinsic carrier concentration, so that the gallium nitride-based device is suitable for preparing high-power devices and further applied to equipment with extremely high requirements on device reliability, such as military industry, aerospace and the like. The gallium nitride-based schottky barrier diode has the advantages and characteristics, has ultralow conduction voltage and smaller reverse leakage compared with a PN junction diode, and can well play the role under the severe working conditions of high power and high temperature, thereby being widely applied.
In combination with the development at home and abroad, the current schottky barrier diode still has some problems. Besides the fact that epitaxy itself is a heterojunction with a certain dislocation density, there are other parasitic problems. For example, the breakdown voltage of the gan-based schottky barrier diode is still much higher than the theoretical breakdown value of the material; when the diode operates in the reverse direction, although the leakage current is smaller than that of the conventional PN junction diode, there is still room for optimization, and the leakage current can be further reduced.
As shown in fig. 1, the conventional lateral gan schottky barrier diode structure includes, from bottom to top, a substrate layer 1, a gan channel layer 2, and an algan barrier layer 3, where the algan barrier layer 3 is provided with an ohmic cathode metal 4 and a schottky anode metal 5. The current application of the gan schottky barrier diode is very wide, so the research on the device has immeasurable value. The reverse performance of the schottky barrier diode structure is not outstanding because the schottky barrier diode structure is not protected by the termination structure as shown in fig. 1. In addition, when the diode works in a reverse direction, the Schottky barrier height is not high enough, so that the depletion degree is not high, and the leakage current is large.
Disclosure of Invention
The invention aims to provide a gallium nitride schottky barrier diode with a heterojunction terminal and a preparation method thereof aiming at the defects of the prior art, so as to effectively increase the reverse breakdown voltage of the gallium nitride diode, reduce the leakage current and improve the performance of the device.
The technical scheme of the invention is realized as follows:
1. the utility model provides a gallium nitride schottky barrier diode with heterojunction terminal, its includes substrate layer 1, gallium nitride channel layer 2, aluminium gallium nitrogen barrier layer 3 from bottom to top, and the both ends on 3 upper portions of aluminium gallium nitrogen barrier layer are ohm cathode metal layer 4 and schottky anode metal layer 5 respectively, its characterized in that: the left side of the Schottky anode metal layer 5 is provided with a P-type nickel oxide layer 6, so that when the device works reversely, a formed depletion region is wider, the depletion effect is stronger, and the reverse leakage current is reduced; a passivation dielectric layer 7 is arranged between the ohmic cathode metal layer 4 and the P-type nickel oxide layer 6 to fill N vacancy in the AlGaN barrier layer 3, reduce the magnitude of leakage current and further increase the breakdown voltage.
Furthermore, the Schottky anode metal layer 5 adopts an embedded groove structure, namely, one side of the Schottky anode metal layer is tightly attached to the P-type nickel oxide layer 6, the lower part of the Schottky anode metal layer is embedded into the gallium nitride channel layer 2, and the depth of the groove is 10 nm-100 nm.
Further, the thickness of the AlGaN barrier layer 3 is 10 nm-100 nm; the thickness of the gallium nitride channel layer 2 is 100 nm-2 um; the thickness of the P-type nickel oxide layer 6 is 100 nm-500 nm.
Further, the passivation dielectric layer 7 adopts a dielectric material of SiO2、Al2O3、Si3N4Of 50nm to 200nm in thickness.
Further, the ohmic cathode metal layer 4 is a single layer or multiple layers formed by multiple materials formed by one or more of Ti, Al, Ni, Au and Pt; the Schottky anode metal layer 5 is formed by a single layer or multiple layers of materials formed by one of Ni, Au and W metals.
2. A method for preparing a gallium nitride Schottky barrier diode with a heterojunction terminal is characterized by comprising the following steps:
1) selecting an epitaxial wafer which sequentially comprises a substrate layer 1, a gallium nitride channel layer 2 and an aluminum gallium nitrogen barrier layer 3 from bottom to top;
2) carrying out first photoetching on the AlGaN barrier layer 3 to form a pattern, growing ohmic cathode metal in the pattern region by adopting an electron beam evaporation process, and carrying out thermal annealing treatment to form an ohmic cathode metal layer 4;
3) carrying out secondary photoetching on the aluminum gallium nitrogen barrier layer 3 to form a pattern, and etching 10-100 nm downwards into the gallium nitride channel layer 2 by adopting a reactive ion etching process to form a groove;
4) carrying out third photoetching on the AlGaN barrier layer 3 to form a pattern, and growing P-type nickel oxide with the thickness of 100 nm-500 nm in the pattern region by adopting a sputtering process to form a P-type nickel oxide layer 6;
5) performing fourth photoetching on the aluminum gallium nitrogen barrier layer 3 to form a pattern, growing Schottky anode metal in the pattern region by adopting an electron beam evaporation process, and performing thermal annealing treatment to form a Schottky anode metal layer 5;
6) and carrying out fifth photoetching on the AlGaN barrier layer 3 to form a pattern, and depositing a passivation dielectric layer 7 with the thickness of 50 nm-200 nm in the pattern area by adopting a chemical vapor deposition process to finish the manufacture of the whole device.
Compared with the prior art, the invention has the following advantages and effects:
firstly, because the invention is provided with the P-type nickel oxide layer, when the device works in the reverse direction, the formed depletion region is wider, the depletion effect is stronger, and the reverse leakage current can be reduced;
secondly, because the passivation dielectric layer is additionally arranged, the N vacancy in the epitaxial wafer material is filled, the leakage path of the material is reduced, the leakage current is reduced, the breakdown voltage is increased, and the device performance is improved.
Drawings
FIG. 1 is a schematic cross-sectional view of a conventional lateral GaN Schottky barrier diode;
FIG. 2 is a schematic cross-sectional view of a GaN Schottky barrier diode with heterojunction termination according to the present invention;
fig. 3 is a schematic flow chart of the schottky barrier diode of fig. 2 according to the present invention.
Detailed Description
The following describes the practice of the present invention in further detail with reference to the accompanying drawings:
referring to fig. 2, the schottky barrier diode with heterojunction terminal of the present invention comprises a substrate layer 1, a gallium nitride channel layer 2, an aluminum gallium nitrogen barrier layer 3, an ohmic cathode metal layer 4, a schottky anode metal layer 5, a P-type nickel oxide layer 6 and a passivation dielectric layer 7. Wherein: the thickness of the gallium nitride channel layer 2 is 100 nm-2 um, and the gallium nitride channel layer is positioned at the upper part of the substrate layer 1; the thickness of the AlGaN barrier layer 3 is 10 nm-100 nm, and the AlGaN barrier layer is positioned on the upper part of the GaN channel layer 2; the ohmic cathode metal layer 4 is of a single-layer structure formed by one or more of Ti, Al, Ni, Au and Pt or of a multi-layer structure formed by multiple materials and is positioned at the left end of the upper part of the AlGaN barrier layer 3; the P-type nickel oxide layer 6 is made of a P-type nickel oxide material with the thickness of 100 nm-500 nm and is positioned on the right side of the upper part of the AlGaN barrier layer 3; the passivation dielectric layer 7 is made of SiO2、Al2O3、Si3N4Any one of the metal layers is 50 nm-200 nm thick and is positioned between the ohmic cathode metal layer 4 and the P-type nickel oxide layer 6; the Schottky anode metal layer 5 is made of one of W, Ni/Au metal materials, is of an embedded groove structure and is positioned on the right side of the P-type nickel oxide layer 6, the lower part of the Schottky anode metal layer is embedded into the gallium nitride channel layer 2, and the depth of the groove is 10 nm-100 nm.
Referring to fig. 3, the method of fabricating the gan schottky barrier diode with the heterojunction termination according to the present invention provides the following three embodiments:
example 1: the thickness of the P-type nickel oxide layer is 100nm, the ohmic cathode metal is Ti/Au, the Schottky anode metal is Ni/Au, and the passivation dielectric layer material is Si3N4The schottky diode of (1).
Step 1: the epitaxial wafer is cleaned as shown in fig. 3 (a).
The present example uses an epitaxial wafer comprising a substrate layer, a gallium nitride channel layer, and an aluminum gallium nitrogen barrier layer from bottom to top, wherein the thickness of the gallium nitride channel layer is 1um, and the thickness of the aluminum gallium nitrogen barrier layer is 30 nm;
and (3) sequentially ultrasonically cleaning the epitaxial wafer in acetone, ethanol and plasma water for 5min, and finally blowing the epitaxial wafer by using a nitrogen gun.
Step 2: an ohmic cathode metal layer is deposited as shown in fig. 3 (b).
Carrying out primary photoetching on the AlGaN barrier layer to form a pattern, then placing an epitaxial wafer into an electron beam evaporation table, and evaporating Ti/Au with the thickness of 20/45nm on the epitaxial wafer as ohmic cathode metal at the speed of 0.1nm/s under the conditions that the power is 30W and the vacuum is 5E-4 Pa;
and removing redundant metal on the surface of the sample wafer by adopting a stripping process, and annealing at 860 ℃ for 30s to form an ohmic cathode metal layer.
And step 3: the anode recess is etched as shown in fig. 3 (c).
Performing a second photolithography on the AlGaN barrier layer to form a pattern, and performing reactive ion etching at a power of 150W and a pressure of 5mTorr with gas Cl2And BCl3The flow rate ratio was 75sccm: etching the whole sample wafer downwards by 30nm under the condition of 30sccm to form a groove;
and then sequentially carrying out ultrasonic cleaning on the epitaxial wafer with the groove in acetone, ethanol and plasma water for 5min, and finally blowing the epitaxial wafer to dry by using a nitrogen gun.
And 4, step 4: sputtering a P-type nickel oxide layer as shown in fig. 3 (d).
Carrying out third photoetching on the AlGaN barrier layer to form a pattern, sputtering a P-type nickel oxide layer with the thickness of 100nm in a pattern area by adopting a magnetron sputtering process, removing redundant metal on the surface of the sample wafer by adopting a stripping process, carrying out ultrasonic cleaning in acetone, ethanol and plasma water for 5min in sequence, and finally blowing the sample wafer by using a nitrogen gun.
And 5: schottky anode metal is deposited as shown in fig. 3 (e).
Performing fourth photoetching on the AlGaN barrier layer to form a pattern, then placing the sample wafer into an electron beam evaporation table, and evaporating Ni/Au with the thickness of 120/150nm on the surface of the sample at the speed of 0.1nm/s as Schottky anode metal under the conditions that the power is 30W and the vacuum is 5E-4 Pa;
and removing redundant metal on the surface of the sample wafer by adopting a stripping process, and annealing for 5min at the temperature of 450 ℃ to form the Schottky anode metal layer.
Step 6: a passivation dielectric layer is deposited as shown in fig. 3 (f).
Performing fifth photoetching on the AlGaN barrier layer to form a pattern, placing the sample wafer into a plasma enhanced chemical vapor deposition device, and performing SiH (hydrogen oxygen) reaction in the reaction chamber at the power of 20W, the pressure of the reaction chamber of 2000mTorr, the deposition temperature of the cavity of 220 DEG C4：N2O：N2Flow rate ratio 40 sccm: 710 sccm: depositing Si with the thickness of 80nm under the condition of 180sccm3N4And passivating the dielectric layer to finish manufacturing the Schottky barrier diode with the heterojunction terminal.
Example 2: the thickness of the prepared P-type nickel oxide layer is 200nm, the ohmic cathode metal is Ti/Al/Ni/Au, the Schottky anode metal is Ni/Au, and the passivation dielectric layer material is SiO2The schottky diode of (1).
Step A: the epitaxial wafer is cleaned as shown in fig. 3 (a).
Step a of this example is the same as step 1 in example 1.
And B: an ohmic cathode metal layer is deposited as shown in fig. 3 (b).
B1) Carrying out primary photoetching on the AlGaN barrier layer to form a pattern, then placing an epitaxial wafer into an electron beam evaporation table, and evaporating Ti/Al/Ni/Au with the thickness of 20/145/50/45nm on the epitaxial wafer as ohmic cathode metal at the speed of 0.1nm/s under the conditions that the power is 35W and the vacuum is 5E-4 Pa;
B2) and removing redundant metal on the surface of the sample wafer by adopting a stripping process, and annealing at 860 ℃ for 30s to form an ohmic cathode metal layer.
And C: the anode recess is etched as shown in fig. 3 (c).
C1) Performing a second photolithography on the AlGaN barrier layer to form a pattern, and performing reactive ion etching with a power of 180W and a pressure of 5mTorr in the presence of Cl gas2And BCl3The flow rate ratio was 75sccm: etching the whole sample wafer downwards by 30nm under the condition of 30sccm to form a groove;
C2) and then sequentially carrying out ultrasonic cleaning on the epitaxial wafer with the groove in acetone, ethanol and plasma water for 5min, and finally blowing the epitaxial wafer to dry by using a nitrogen gun.
Step D: sputtering a P-type nickel oxide layer as shown in fig. 3 (d).
D1) Carrying out third photoetching on the AlGaN barrier layer to form a pattern, and sputtering a P-type nickel oxide layer with the thickness of 200nm in the pattern region by adopting a magnetron sputtering process;
D2) and removing the redundant metal on the surface of the sample wafer by adopting a stripping process, sequentially carrying out ultrasonic cleaning in acetone, ethanol and plasma water for 5min respectively, and finally blowing the sample wafer by using a nitrogen gun.
Step E: schottky anode metal deposition as shown in fig. 3 (e).
E1) Performing fourth photoetching on the AlGaN barrier layer to form a pattern, then placing the sample wafer into an electron beam evaporation table, and evaporating Ni/Au with the thickness of 120/150nm on the surface of the sample at the speed of 0.1nm/s as Schottky anode metal under the conditions that the power is 35W and the vacuum is 5E-4 Pa;
E2) and removing redundant metal on the surface of the sample wafer by adopting a stripping process, and annealing for 5min at the temperature of 450 ℃ to form the Schottky anode metal layer.
Step F: a passivation dielectric layer is deposited as shown in fig. 3 (f).
F1) Carrying out fifth photoetching on the AlGaN barrier layer to form a pattern;
F2) then putting the sample wafer into a plasma enhanced chemical vapor deposition device, and carrying out reverse reaction at the power of 25WThe reaction chamber pressure is 2000mTorr, the chamber deposition temperature is 300 ℃, and SiH in the reaction chamber4And O2The gas flow rate ratio of (2) is 40 sccm: depositing SiO with the thickness of 200nm under the condition of 710sccm2And passivating the dielectric layer to finish manufacturing the Schottky barrier diode with the heterojunction terminal.
Example 3: the thickness of the P-type nickel oxide layer is 300nm, the ohmic cathode metal is Ti/Al/Au, the Schottky anode metal is W, and the passivation dielectric layer material is Al2O3The schottky diode of (1).
The method comprises the following steps: the epitaxial wafer is cleaned as shown in fig. 3 (a).
Step one of this example is the same as step 1 in example 1.
Step two: an ohmic cathode metal layer is deposited as shown in fig. 3 (b).
Firstly, carrying out primary photoetching on an aluminum gallium nitrogen barrier layer to form a pattern, then placing an epitaxial wafer into an electron beam evaporation table, and evaporating Ti/Al/Au with the thickness of 20/145/45nm on the epitaxial wafer as ohmic cathode metal at the speed of 0.1nm/s under the conditions that the power is 40W and the vacuum is 5E-4 Pa;
and then, removing redundant metal on the surface of the sample wafer by adopting a stripping process, and annealing for 30s at 860 ℃ to form an ohmic cathode metal layer.
Step three: the anode recess is etched as shown in fig. 3 (c).
Firstly, a second photoetching is carried out on the AlGaN barrier layer to form a pattern, and then a reactive ion etching process is adopted, wherein the power is 200W, the pressure is 5mTorr, and gas Cl is adopted2And BCl3Etching the whole sample wafer downwards by 30nm under the condition that the flow rate ratio is 75sccm to 30sccm to form a groove;
and then, sequentially and respectively ultrasonically cleaning the epitaxial wafer with the groove in acetone, ethanol and plasma water for 5min, and finally, blow-drying the epitaxial wafer by using a nitrogen gun.
Step four: sputtering a P-type nickel oxide layer as shown in fig. 3 (d).
Firstly, carrying out third photoetching on the AlGaN barrier layer to form a pattern, and sputtering a P-type nickel oxide layer with the thickness of 300nm in a pattern region by adopting a magnetron sputtering process;
and then, removing redundant metal on the surface of the sample wafer by using a stripping process, sequentially carrying out ultrasonic cleaning in acetone, ethanol and plasma water for 5min respectively, and finally blowing the sample wafer by using a nitrogen gun.
Step five: schottky anode metal is deposited as shown in fig. 3 (e).
Firstly, carrying out fourth photoetching on an aluminum gallium nitrogen barrier layer to form a pattern, then placing a sample wafer into an electron beam evaporation table, and evaporating W with the thickness of 200nm on the surface at the speed of 0.1nm/s under the conditions that the power is 40W and the vacuum is 5E-4Pa to be used as Schottky anode metal;
and then, removing the redundant metal on the whole surface of the sample wafer by adopting a stripping process, and annealing for 5min at the temperature of 450 ℃ to form the Schottky anode metal layer.
Step six: a passivation dielectric layer is deposited as shown in fig. 3 (f).
Firstly, carrying out fifth photoetching on the AlGaN barrier layer to form a pattern;
then, the sample wafer is placed into a plasma enhanced chemical vapor deposition device, and the power is 30W, the pressure of the reaction chamber is 2000mTorr, the deposition temperature of the cavity is 380 ℃, the gas flow rate Ar of the reaction chamber is as follows: n is a radical of2O: TMA ratio of 700 sccm: 800 sccm: al is deposited to a thickness of 200nm on the whole sample wafer under the condition of 100sccm2O3And passivating the dielectric layer to finish manufacturing the Schottky barrier diode with the heterojunction terminal.

Claims (10)

1. The utility model provides a gallium nitride schottky barrier diode with heterojunction terminal, its includes substrate layer (1), gallium nitride channel layer (2), aluminium gallium nitrogen barrier layer (3) from bottom to top, and the both ends on aluminium gallium nitrogen barrier layer (3) upper portion are ohm cathode metal layer (4) and schottky anode metal layer (5) respectively, its characterized in that:
a P-type nickel oxide layer (6) is arranged on the left side of the Schottky anode metal layer (5), so that when the device works in a reverse direction, a formed depletion region is wider, the depletion effect is stronger, and the size of reverse leakage current is reduced;
a passivation dielectric layer (7) is arranged between the ohmic cathode metal layer (4) and the P-type nickel oxide layer (6) to fill N vacancies in the AlGaN barrier layer (3), reduce the leakage current and further increase the breakdown voltage.
2. The diode of claim 1, wherein:
the Schottky anode metal layer (5) adopts an embedded groove structure, namely, one side of the Schottky anode metal layer is tightly attached to the P-type nickel oxide layer (6), the lower part of the Schottky anode metal layer is embedded into the gallium nitride channel layer (2), and the depth of the groove is 10 nm-100 nm.
3. The diode of claim 1, wherein:
the thickness of the aluminum gallium nitrogen barrier layer (3) is 10 nm-100 nm;
the thickness of the gallium nitride channel layer (2) is 100 nm-2 um;
the thickness of the P-type nickel oxide layer (6) is 100 nm-500 nm.
4. The diode of claim 1, wherein:
the passivation dielectric layer (7) adopts SiO as a dielectric material2、Al2O3、Si3N4Of 50nm to 200nm in thickness.
5. The diode of claim 1, wherein:
the ohmic cathode metal layer (4) is a single layer or a plurality of layers formed by one or more materials of Ti, Al, Ni, Au and Pt.
6. The diode of claim 1, wherein:
the Schottky anode metal layer (5) is formed by a single layer or a plurality of layers of materials from one of Ni, Au and W metals.
7. A method for preparing a gallium nitride Schottky barrier diode with a heterojunction terminal is characterized by comprising the following steps:
1) selecting an epitaxial wafer which sequentially comprises a substrate layer (1), a gallium nitride channel layer (2) and an aluminum gallium nitrogen barrier layer (3) from bottom to top;
2) carrying out primary photoetching on the AlGaN barrier layer (3) to form a pattern, growing ohmic cathode metal in the pattern region by adopting an electron beam evaporation process, and carrying out thermal annealing treatment to form an ohmic cathode metal layer (4);
3) carrying out secondary photoetching on the aluminum gallium nitrogen barrier layer (3) to form a pattern, and etching the pattern downwards to the inside of the gallium nitride channel layer (2) by 10-100 nm by adopting a reactive ion etching process to form a groove;
4) carrying out third photoetching on the AlGaN barrier layer (3) to form a pattern, and growing P-type nickel oxide with the thickness of 100 nm-500 nm in the pattern region by adopting a sputtering process to form a P-type nickel oxide layer (6);
5) performing fourth photoetching on the aluminum gallium nitrogen barrier layer (3) to form a pattern, growing Schottky anode metal in the pattern region by adopting an electron beam evaporation process, and performing thermal annealing treatment to form a Schottky anode metal layer (5);
6) and carrying out fifth photoetching on the AlGaN barrier layer (3) to form a pattern, and depositing a passivation dielectric layer (7) with the thickness of 50 nm-200 nm in the pattern region by adopting a chemical vapor deposition process to finish the manufacture of the whole device.
8. The method of claim 7, wherein:
the process conditions of the electron beam evaporation adopted in the step (2) are as follows: working vacuum: 5E-4 Pa; reaction chamber gas: one or more of Ti, Al, Ni, Au and Pt metals; evaporation rate: 0.1 nm/s; evaporation power: 30W-40W;
the process conditions of adopting electron beam evaporation in the step (5) are as follows: working vacuum: 5E-4 Pa; reaction chamber gas: Ni/Au, or W; evaporation rate: 0.1 nm/s; evaporation power: 30W to 40W.
9. The method of claim 7, wherein the etching in step (3) is performed by a reactive ion etching process under the following process conditions:
reaction chamber pressure: the temperature of the tail gas of the gas turbine is 5mTorr,
reaction chamber gas: cl2And BCl3，
Reaction chamber gas flow rate ratio: cl2：BCl3＝75sccm：30sccm，
RF radio frequency source: 150W to 200W.
10. The method of claim 7, wherein the process conditions for applying enhanced chemical vapor deposition in step (6) are as follows:
reaction chamber pressure: the temperature of the liquid crystal is 2000mTorr,
reaction chamber gas: SiH4、N2O、N2These three gases, or SiH4And O2These two gases, or Ar, N2O, TMA the three kinds of gases are mixed,
reaction chamber gas flow rate ratio: SiH4：N2O：N240 sccm: 710 sccm: 180sccm, or SiH4：O240 sccm: 710sccm, or Ar: n is a radical of2O：TMA＝700sccm：800sccm：100sccm，
Temperature of the reaction chamber: 220 to 380 ℃,
RF radio frequency source: 20W to 30W.
CN202110845428.6A 2021-07-26 2021-07-26 Gallium nitride Schottky barrier diode with heterojunction terminal and preparation method Pending CN113594228A (en)

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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100078683A1 (en) * 2008-09-30 2010-04-01 Sanken Electric Co., Ltd. Semiconductor device
WO2015077916A1 (en) * 2013-11-26 2015-06-04 中国科学院半导体研究所 Gan-based schottky barrier diode rectifier
US20160013286A1 (en) * 2014-07-10 2016-01-14 Toyota Jidosha Kabushiki Kaisha Schottky barrier diode formed with nitride semiconductor substrate
CN110364574A (en) * 2019-06-05 2019-10-22 西安电子科技大学 AlGaN/GaN heterojunction schottky diode device based on P-GaN cap layers and floating becket
CN110416318A (en) * 2019-07-24 2019-11-05 芜湖启迪半导体有限公司 A kind of gallium nitride based diode structure and preparation method thereof
CN112038416A (en) * 2020-09-15 2020-12-04 西安电子科技大学 Schottky diode based on p-type NiO film and inclined plane terminal structure and manufacturing method thereof
CN112186034A (en) * 2020-10-22 2021-01-05 西安电子科技大学 Gallium nitride Schottky diode with slant field plate structure and manufacturing method thereof

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100078683A1 (en) * 2008-09-30 2010-04-01 Sanken Electric Co., Ltd. Semiconductor device
WO2015077916A1 (en) * 2013-11-26 2015-06-04 中国科学院半导体研究所 Gan-based schottky barrier diode rectifier
US20160013286A1 (en) * 2014-07-10 2016-01-14 Toyota Jidosha Kabushiki Kaisha Schottky barrier diode formed with nitride semiconductor substrate
CN110364574A (en) * 2019-06-05 2019-10-22 西安电子科技大学 AlGaN/GaN heterojunction schottky diode device based on P-GaN cap layers and floating becket
CN110416318A (en) * 2019-07-24 2019-11-05 芜湖启迪半导体有限公司 A kind of gallium nitride based diode structure and preparation method thereof
CN112038416A (en) * 2020-09-15 2020-12-04 西安电子科技大学 Schottky diode based on p-type NiO film and inclined plane terminal structure and manufacturing method thereof
CN112186034A (en) * 2020-10-22 2021-01-05 西安电子科技大学 Gallium nitride Schottky diode with slant field plate structure and manufacturing method thereof

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