CN113571541A - Display panel and preparation method thereof - Google Patents
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- CN113571541A CN113571541A CN202110765152.0A CN202110765152A CN113571541A CN 113571541 A CN113571541 A CN 113571541A CN 202110765152 A CN202110765152 A CN 202110765152A CN 113571541 A CN113571541 A CN 113571541A
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- 238000002360 preparation method Methods 0.000 title abstract description 6
- 239000000758 substrate Substances 0.000 claims abstract description 79
- 239000010409 thin film Substances 0.000 claims abstract description 79
- 238000004806 packaging method and process Methods 0.000 claims abstract description 12
- 239000010410 layer Substances 0.000 claims description 89
- 239000011241 protective layer Substances 0.000 claims description 16
- 238000004519 manufacturing process Methods 0.000 claims description 10
- 238000000034 method Methods 0.000 claims description 10
- 238000005538 encapsulation Methods 0.000 claims description 9
- 230000004888 barrier function Effects 0.000 claims description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 abstract description 6
- 229910052760 oxygen Inorganic materials 0.000 abstract description 6
- 239000001301 oxygen Substances 0.000 abstract description 6
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 abstract description 6
- 230000000903 blocking effect Effects 0.000 abstract description 3
- 230000008878 coupling Effects 0.000 abstract description 3
- 238000010168 coupling process Methods 0.000 abstract description 3
- 238000005859 coupling reaction Methods 0.000 abstract description 3
- 239000000872 buffer Substances 0.000 description 11
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 7
- 239000000463 material Substances 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 229910004205 SiNX Inorganic materials 0.000 description 3
- 239000011229 interlayer Substances 0.000 description 3
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- 229910052751 metal Inorganic materials 0.000 description 3
- -1 polyethylene Polymers 0.000 description 3
- 235000012239 silicon dioxide Nutrition 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 3
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 229910052681 coesite Inorganic materials 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 229910052906 cristobalite Inorganic materials 0.000 description 2
- 239000012044 organic layer Substances 0.000 description 2
- 239000005020 polyethylene terephthalate Substances 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 229910052682 stishovite Inorganic materials 0.000 description 2
- 229910052905 tridymite Inorganic materials 0.000 description 2
- 229920004934 Dacron® Polymers 0.000 description 1
- 239000004698 Polyethylene Substances 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 239000004743 Polypropylene Substances 0.000 description 1
- 239000004793 Polystyrene Substances 0.000 description 1
- 230000003139 buffering effect Effects 0.000 description 1
- 238000002425 crystallisation Methods 0.000 description 1
- 238000001723 curing Methods 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000005224 laser annealing Methods 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 229920000747 poly(lactic acid) Polymers 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920000573 polyethylene Polymers 0.000 description 1
- 229920000139 polyethylene terephthalate Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000004626 polylactic acid Substances 0.000 description 1
- 229920001155 polypropylene Polymers 0.000 description 1
- 229920002223 polystyrene Polymers 0.000 description 1
- 229920002635 polyurethane Polymers 0.000 description 1
- 239000004814 polyurethane Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/52—Encapsulations
- H01L33/54—Encapsulations having a particular shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Electroluminescent Light Sources (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The invention relates to a display panel and a preparation method thereof. The display panel includes: a substrate, a thin film transistor device, and a light emitting diode device. According to the invention, the thin film transistor device and the light emitting diode device are arranged on two sides of the substrate, so that the light emitting diode device is prevented from being transferred onto the thin film transistor device, and on one hand, the thin film transistor device is prevented from being damaged and shorted due to pressure on the thin film transistor device; on the other hand, the height difference between the thin film transistor device and the light emitting diode device in the prior art is eliminated, so that the packaging performance of the thin film transistor device is prevented from being influenced, and the thin film transistor device is prevented from being corroded by water and oxygen; and finally, the light emitting diode device and the thin film transistor device are not required to be arranged in a staggered mode, a substrate is arranged between the light emitting diode device and the thin film transistor device for blocking, the influence of capacitance coupling is low, and the design space can be greatly saved.
Description
Technical Field
The application relates to the technical field of display, in particular to a display panel and a preparation method thereof.
Background
The Micro Light-Emitting Diode (Micro LED) technology is a display technology in which a self-luminous micron-sized LED is used as a Light-Emitting pixel unit and is assembled on a driving panel to form a high-density LED array. Compared with the existing Liquid Crystal Display (LCD) technology and Organic Light-Emitting Diode (OLED) technology, the Micro LED Display technology has greater advantages in brightness, resolution, contrast, energy consumption, service life, response speed, thermal stability, and the like.
Firstly, the transfer of a large number of Micro LEDs to a thin film transistor device can generate pressure on the thin film transistor device, which easily causes rupture and short circuit of an inner film layer of the thin film transistor device. Secondly, after the Micro LED is transferred to the thin film transistor device, the surface of one side of the Micro LED, which is far away from the substrate, has a height difference with the surface of one side of the thin film transistor device, which is far away from the substrate, so that the packaging performance of the thin film transistor device is influenced, and the thin film transistor device is corroded by water and oxygen. Finally, pixel space needs to be compressed to reduce the seam in the tiled display design, but the Micro LEDs and the thin film transistor devices need to be arranged in parallel when the Micro LEDs are transferred to the thin film transistor devices, so that the requirements of high PPI pixel design or tiled display design cannot be met.
Disclosure of Invention
The invention aims to provide a display panel and a preparation method thereof, which can solve the problems that the packaging performance of a thin film transistor device is influenced and the thin film transistor device is corroded by water and oxygen due to the fact that the height difference exists between the surface of a Micro LED and the surface of the thin film transistor device in the existing display panel.
In order to solve the above problems, the present invention provides a display panel including: a substrate; a first electrode disposed on a surface of one side of the substrate; the thin film transistor device is arranged on one side, away from the substrate, of the first electrode; a drain electrode is arranged in the thin film transistor device; the light-emitting diode device is arranged on one side of the substrate, which is far away from the thin film transistor device; the light emitting diode device includes: a second electrode electrically connected to the first electrode; and a third electrode electrically connected to the drain electrode.
Further, the display panel further includes: a first bonding electrode disposed between the substrate and the light emitting diode device; the second bonding electrode is arranged on the same layer as the first bonding electrode and is arranged at intervals with the first bonding electrode; wherein the first bonding electrode has one end electrically connected to the first electrode and the other end electrically connected to the second electrode; wherein one end of the second bonding electrode is electrically connected to the drain electrode, and the other end is electrically connected to the third electrode.
Furthermore, a first through hole and a second through hole are arranged on the substrate in a penetrating manner; the first bonding electrode is electrically connected to the first electrode through the first via; the second bonding electrode is electrically connected to the drain through the second via.
Further, the display panel further includes: the fourth electrode is arranged on the same layer as the first electrode and is arranged at intervals with the first electrode; the second bonding electrode is electrically connected to the fourth electrode through the second via, the fourth electrode being electrically connected to the drain.
Further, the display panel further includes: and the packaging layer covers the surface of one side of the light-emitting diode device, which is far away from the substrate, and extends to cover the substrate.
Further, the display panel further includes: and the protective layer is arranged on the surface of one side of the thin film transistor device, which is far away from the substrate.
Further, the protective layer includes: one or more of an encapsulation barrier layer, a light-shielding layer, and a planarization layer.
In order to solve the above problems, the present invention further provides a method for manufacturing a display panel according to the present invention, which includes the following steps: providing a substrate; preparing a first electrode on a surface of one side of the substrate; preparing a thin film transistor device on one side of the first electrode, which is far away from the substrate; a drain electrode is arranged in the thin film transistor device; and providing a light emitting diode device on a side of the substrate remote from the thin film transistor device; the light emitting diode device includes: a second electrode electrically connected to the first electrode; and a third electrode electrically connected to the drain electrode.
Further, after the step of fabricating the thin film transistor device, the step of fabricating the light emitting diode device further includes: preparing a first temporary protective layer on one side of the thin film transistor device, which is far away from the substrate; preparing a first bonding electrode and a second bonding electrode at an interval on one side of the substrate far away from the thin film transistor device, wherein the first bonding electrode and the second bonding electrode are arranged on the same layer; preparing a second temporary protection layer on one sides of the first bonding electrode and the second bonding electrode, which are far away from the substrate; and removing the first temporary protective layer, and preparing a protective layer on one side of the thin film transistor device, which is far away from the substrate.
Further, the step of preparing the light emitting diode device further comprises: and preparing a packaging layer on the surface of one side of the light-emitting diode device, which is far away from the substrate, wherein the packaging layer also extends to cover the substrate.
The invention has the advantages that: the invention relates to a display panel and a preparation method thereof, wherein the thin film transistor device and the light emitting diode device are arranged on two sides of the substrate, so that the light emitting diode device is prevented from being transferred onto the thin film transistor device, and on one hand, the thin film transistor device is prevented from being damaged and shorted due to pressure on the thin film transistor device; on the other hand, the height difference between the thin film transistor device and the light emitting diode device in the prior art is eliminated, so that the packaging performance of the thin film transistor device is prevented from being influenced, and the thin film transistor device is prevented from being corroded by water and oxygen; and finally, the light emitting diode device and the thin film transistor device are not required to be arranged in a staggered mode, a substrate is arranged between the light emitting diode device and the thin film transistor device for blocking, the influence of capacitance coupling is low, and the design space can be greatly saved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1 is a schematic structural diagram of a display panel according to the present invention;
FIG. 2 is a diagram of a process for manufacturing a display panel according to the present invention;
fig. 3 is a schematic structural diagram of a first temporary protection layer formed on a side of the thin film transistor device away from the substrate;
FIG. 4 is a schematic structural diagram of a second temporary protection layer formed on the sides of the first and second bonding electrodes away from the substrate.
Description of reference numerals:
100. a display panel;
1. a substrate; 2. A first electrode;
3. a fourth electrode; 4. A thin film transistor device;
5. a protective layer; 6. A light emitting diode device;
7. a first bonding electrode; 8. A second bonding electrode;
9. a light shielding unit; 10. A buffer layer;
11. a first through hole; 12. A second through hole;
13. a packaging layer; 14. A first temporary protective layer;
15. a second temporary protective layer;
41. an active layer; 42. A first insulating layer;
43. a gate layer; 44. A second insulating layer;
45. a source electrode; 46. A drain electrode;
47. an interlayer insulating layer;
61. a second electrode; 62. And a third electrode.
Detailed Description
The following detailed description of the preferred embodiments of the present invention is provided to enable those skilled in the art to make and use the present invention in a complete manner, and is provided for illustration of the technical disclosure of the present invention so that the technical disclosure of the present invention will be more clearly understood and appreciated by those skilled in the art how to implement the present invention. The present invention may, however, be embodied in many different forms of embodiment, and the scope of the present invention should not be construed as limited to the embodiment set forth herein, but rather construed as being limited only by the following description of the embodiment.
The directional terms used in the present invention, such as "up", "down", "front", "back", "left", "right", "inner", "outer", "side", etc., are only directions in the drawings, and are used for explaining and explaining the present invention, but not for limiting the scope of the present invention.
In the drawings, structurally identical elements are represented by like reference numerals, and structurally or functionally similar elements are represented by like reference numerals throughout the several views. In addition, the size and thickness of each component shown in the drawings are arbitrarily illustrated for convenience of understanding and description, and the present invention is not limited to the size and thickness of each component.
As shown in fig. 1, the present embodiment provides a display panel 100. The display panel 100 includes: the light-emitting diode device comprises a substrate 1, a first electrode 2, a fourth electrode 3, a thin film transistor device 4, a protective layer 5, a light-emitting diode device 6, a first bonding electrode 7 and a second bonding electrode 8.
In this embodiment, the substrate 1 is made of glass. In other embodiments, the material of the substrate 1 may further include one or more of silicon dioxide, dacron resin, polyethylene, polypropylene, polystyrene, polylactic acid, polyethylene terephthalate, polyimide, or polyurethane.
As shown in fig. 1, a first electrode 2 is disposed on a surface of one side of the substrate 1.
As shown in fig. 1, the fourth electrode 3 is disposed in the same layer as the first electrode 2, and is spaced apart from the first electrode 2.
As shown in fig. 1, the display panel 100 further includes: a light shielding unit 9 and a buffer layer 10.
As shown in fig. 1, the light shielding unit 9 is disposed on the substrate 1 between the first electrode 2 and the fourth electrode 3, and is spaced apart from the first electrode 2 and the fourth electrode 3. The light shielding unit 9 is disposed corresponding to the thin film transistor device 4, thereby effectively reducing a threshold voltage negative bias caused by light irradiation to the thin film transistor device 4.
As shown in fig. 1, the buffer layer 10 covers the first electrode 2, the fourth electrode 3, and the light shielding unit 9, and extends to cover the substrate 1. The buffer layer 10 has a thickness ranging from 300 μm to 500 μm. Preferably, in this embodiment, the thickness of the buffer layer 10 is 400 μm. The buffer layer 10 mainly plays a role of buffering, and the material of the buffer layer 10 includes one or more of SiNx and SiOx.
As shown in fig. 1, the thin film transistor device 4 is disposed on a side of the first electrode 2 away from the substrate 1, and specifically, the thin film transistor device 4 is disposed on a side of the buffer layer 10 away from the substrate 1.
As shown in fig. 1, the thin film transistor device 4 includes: an active layer 41, a first insulating layer 42, a gate layer 43, a second insulating layer 44, a source electrode 45, a drain electrode 46, and an interlayer insulating layer 47.
As shown in fig. 1, an active layer 41 is disposed on a surface of the buffer layer 10 on a side away from the substrate 1. The material of the active layer 41 may be ITZO or IGZO. The active layer 41 may be made of amorphous silicon, and then the amorphous silicon is converted into a polycrystalline silicon layer by a high temperature curing method, an excimer laser annealing method, a metal induced crystallization method, and the like, and then the active layer 41 is formed by a patterning process.
As shown in fig. 1, a first insulating layer 42 is disposed on a surface of the active layer 41 on a side away from the substrate 1. The first insulating layer 42 is mainly used to prevent a short circuit phenomenon from occurring in a contact between the gate layer 43 and the active layer 41. The material of the first insulating layer 42 may be one or more of SiO2 and SiNx.
As shown in fig. 1, a gate layer 43 is disposed on a surface of the first insulating layer 42 on a side away from the substrate 1. The material of the gate layer 43 is metal, such as Cu or Mo.
As shown in fig. 1, a second insulating layer 44 is disposed on a surface of the gate layer 43 on a side away from the substrate 1, and extends over the first insulating layer 42, the active layer 41, and the buffer layer 10. The second insulating layer 44 mainly prevents the gate layer 43 from being short-circuited with the source 45 and the drain 46. The material of the second insulating layer 44 may be one or more of SiO2 and SiNx.
As shown in fig. 1, a source electrode 45 and a drain electrode 46 are disposed on a surface of the second insulating layer 44 on a side away from the substrate 1 at an interval. The source electrode 45 and the drain electrode 46 are electrically connected to the active layer 41. The source 45 and the drain 46 are made of metal, such as Cu or Mo.
As shown in fig. 1, the source electrode 45 is electrically connected to the light shielding unit 9, thereby increasing the signal transfer stability of the thin film transistor device 4.
In the embodiment, as shown in fig. 1, the drain electrode 46 is electrically connected to the fourth electrode 3, and the fourth electrode 3 is electrically connected to the second bonding electrode 8. In other embodiments, fourth electrode 3 may be eliminated, i.e., drain 46 is directly electrically connected to second bonding electrode 8.
As shown in fig. 1, an interlayer insulating layer 47 covers the source 45, the drain 46 and the second insulating layer 44.
As shown in fig. 1, a protective layer 5 is disposed on a surface of the thin film transistor device 4 on a side away from the substrate 1. Wherein the protective layer 5 comprises: one or more of an encapsulation barrier layer, a light-shielding layer, and a planarization layer.
As shown in fig. 1, a light emitting diode device 6 is disposed on a side of the substrate 1 away from the thin film transistor device 4.
As shown in fig. 1, the light emitting diode device 6 includes: a second electrode 61 and a third electrode 62. Wherein the second electrode 61 is electrically connected to the first electrode 2; the third electrode 62 is electrically connected to the drain electrode 46.
As shown in fig. 1, a first bonding electrode 7 is disposed between the substrate 1 and the light emitting diode device 6. Specifically, the first bonding electrode 7 has one end electrically connected to the first electrode 2 and the other end electrically connected to the second electrode 61.
As shown in fig. 1, second bonding electrode 8 is disposed on the same layer as first bonding electrode 7, and is spaced apart from first bonding electrode 7. Specifically, one end of the second bonding electrode 8 is electrically connected to the drain electrode 46, and the other end is electrically connected to the third electrode 62.
As shown in fig. 1, a first through hole 11 and a second through hole 12 are formed through the substrate 1. First bonding electrode 7 is electrically connected to first electrode 2 through first via 11; second bonding electrode 8 is electrically connected to drain 46 through second via 12.
As shown in fig. 1, the display panel 100 further includes an encapsulation layer 13. The encapsulation layer 13 covers the surface of the side of the light emitting diode device 6 away from the substrate 1, and extends to cover the substrate 1. The encapsulation layer 13 may include an organic layer, an inorganic layer, or a combination of organic and inorganic layers. The inorganic layer mainly plays a role in blocking water and oxygen, and the organic layer mainly buffers and releases stress applied to the encapsulation layer 13, so as to increase the flexibility of the display panel 100.
In summary, the thin film transistor device 4 and the light emitting diode device 6 are disposed on two sides of the substrate 1, so that the light emitting diode device 6 is prevented from being transferred onto the thin film transistor device 4, and on one hand, the thin film transistor device 4 is prevented from being damaged and short-circuited due to pressure on the thin film transistor device 4; on the other hand, the height difference between the thin film transistor device 4 and the light emitting diode device 6 in the prior art is eliminated, so that the packaging performance of the thin film transistor device 4 is prevented from being influenced, and the thin film transistor device 4 is prevented from being corroded by water and oxygen; finally, the light emitting diode device 6 does not need to be staggered with the thin film transistor device 4, the light emitting diode device 6 and the thin film transistor device 4 are isolated by the substrate 1, the capacitive coupling influence is low, and the design space can be greatly saved.
As shown in fig. 2 to fig. 4, the present embodiment further provides a method for manufacturing the display panel 100, which includes the following steps: s1, providing a substrate 1; s2, preparing a first electrode 2 on a surface of one side of the substrate 1; s3, preparing a thin film transistor device 4 on the side of the first electrode 2 far away from the substrate 1; a drain electrode 46 is arranged in the thin film transistor device 4; s4, preparing a first temporary protection layer 14 on the side of the thin film transistor device 4 away from the substrate 1; s5, preparing a first bonding electrode 7 and a second bonding electrode 8 at an interval on a side of the substrate 1 away from the thin film transistor device 4, where the first bonding electrode 7 and the second bonding electrode 8 are disposed in the same layer; s6, preparing a second temporary protection layer 15 on the side of the first and second bonding electrodes 7 and 8 away from the substrate 1; s7, removing the first temporary protection layer 14, and preparing a protection layer 5 on the side, away from the substrate 1, of the thin film transistor device 4; s8, disposing a light emitting diode device 6 on a side of the substrate 1 away from the thin film transistor device 4; the light emitting diode device 6 includes: a second electrode 61 electrically connected to the first electrode 2; and a third electrode 62 electrically connected to the drain electrode 46; s9, preparing an encapsulation layer 13 on the surface of the side, away from the substrate 1, of the light-emitting diode device 6, wherein the encapsulation layer 13 also extends to cover the substrate 1.
S8 specifically includes: the second temporary protection layer 15 is removed, and the second electrode 61 of the light emitting diode device 6 is electrically connected to the first bonding electrode 7, and the third electrode 62 is electrically connected to the second bonding electrode 8.
The display panel and the method for manufacturing the same provided by the present application are described in detail above, and the principle and the embodiment of the present application are explained in the present application by applying specific examples, and the description of the above examples is only used to help understanding the method and the core idea of the present application; meanwhile, for those skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.
Claims (10)
1. A display panel, comprising:
a substrate;
a first electrode disposed on a surface of one side of the substrate;
the thin film transistor device is arranged on one side, away from the substrate, of the first electrode; a drain electrode is arranged in the thin film transistor device; and
the light-emitting diode device is arranged on one side of the substrate, which is far away from the thin film transistor device;
the light emitting diode device includes:
a second electrode electrically connected to the first electrode; and
a third electrode electrically connected to the drain electrode.
2. The display panel according to claim 1, further comprising:
a first bonding electrode disposed between the substrate and the light emitting diode device; and
the second bonding electrode is arranged on the same layer as the first bonding electrode and is arranged at intervals with the first bonding electrode;
wherein the first bonding electrode has one end electrically connected to the first electrode and the other end electrically connected to the second electrode;
wherein one end of the second bonding electrode is electrically connected to the drain electrode, and the other end is electrically connected to the third electrode.
3. The display panel according to claim 2, wherein the substrate has a first through hole and a second through hole;
the first bonding electrode is electrically connected to the first electrode through the first via;
the second bonding electrode is electrically connected to the drain through the second via.
4. The display panel according to claim 3, further comprising:
the fourth electrode is arranged on the same layer as the first electrode and is arranged at intervals with the first electrode;
the second bonding electrode is electrically connected to the fourth electrode through the second via, the fourth electrode being electrically connected to the drain.
5. The display panel according to claim 1, further comprising:
and the packaging layer covers the surface of one side of the light-emitting diode device, which is far away from the substrate, and extends to cover the substrate.
6. The display panel according to claim 1, further comprising:
and the protective layer is arranged on the surface of one side of the thin film transistor device, which is far away from the substrate.
7. The display panel according to claim 6, wherein the protective layer comprises: one or more of an encapsulation barrier layer, a light-shielding layer, and a planarization layer.
8. A method for manufacturing a display panel according to claim 1, comprising the steps of:
providing a substrate;
preparing a first electrode on a surface of one side of the substrate;
preparing a thin film transistor device on one side of the first electrode, which is far away from the substrate; a drain electrode is arranged in the thin film transistor device; and
arranging a light emitting diode device on one side of the substrate far away from the thin film transistor device; the light emitting diode device includes: a second electrode electrically connected to the first electrode; and a third electrode electrically connected to the drain electrode.
9. The method for manufacturing a display panel according to claim 8, wherein after the step of manufacturing the thin film transistor device, the step of manufacturing the light emitting diode device further includes:
preparing a first temporary protective layer on one side of the thin film transistor device, which is far away from the substrate;
preparing a first bonding electrode and a second bonding electrode at an interval on one side of the substrate far away from the thin film transistor device, wherein the first bonding electrode and the second bonding electrode are arranged on the same layer;
preparing a second temporary protection layer on one sides of the first bonding electrode and the second bonding electrode, which are far away from the substrate;
and removing the first temporary protective layer, and preparing a protective layer on one side of the thin film transistor device, which is far away from the substrate.
10. The method for manufacturing a display panel according to claim 9, wherein the step of manufacturing the light emitting diode device further comprises:
and preparing a packaging layer on the surface of one side of the light-emitting diode device, which is far away from the substrate, wherein the packaging layer also extends to cover the substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110765152.0A CN113571541A (en) | 2021-07-07 | 2021-07-07 | Display panel and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110765152.0A CN113571541A (en) | 2021-07-07 | 2021-07-07 | Display panel and preparation method thereof |
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| CN113571541A true CN113571541A (en) | 2021-10-29 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110765152.0A Pending CN113571541A (en) | 2021-07-07 | 2021-07-07 | Display panel and preparation method thereof |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2023103022A1 (en) * | 2021-12-10 | 2023-06-15 | 武汉华星光电半导体显示技术有限公司 | Display device and manufacturing method therefor |
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