CN113552751B - Array substrate, manufacturing method thereof, display panel and display device - Google Patents
Array substrate, manufacturing method thereof, display panel and display device Download PDFInfo
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- CN113552751B CN113552751B CN202110826881.2A CN202110826881A CN113552751B CN 113552751 B CN113552751 B CN 113552751B CN 202110826881 A CN202110826881 A CN 202110826881A CN 113552751 B CN113552751 B CN 113552751B
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- 239000000758 substrate Substances 0.000 title claims abstract description 90
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 15
- 239000010410 layer Substances 0.000 claims abstract description 73
- 239000011241 protective layer Substances 0.000 claims abstract description 59
- 239000010409 thin film Substances 0.000 claims description 8
- 238000000034 method Methods 0.000 description 15
- 238000002834 transmittance Methods 0.000 description 9
- 230000008569 process Effects 0.000 description 8
- 239000004973 liquid crystal related substance Substances 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 230000009471 action Effects 0.000 description 3
- 230000007423 decrease Effects 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000000052 comparative effect Effects 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
Classifications
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
Abstract
The embodiment of the application provides an array substrate, a manufacturing method thereof, a display panel and a display device. The array substrate includes: a substrate base; the data line is arranged on one side of the substrate base plate; a first protective layer covering the data line; a pixel electrode disposed on a side of the first protective layer away from the substrate; the second protective layer is arranged on one side of the first protective layer, which is far away from the substrate, and covers the pixel electrode; the common electrode layer comprises a plurality of common electrodes arranged on one side of the second protective layer, which is far away from the first protective layer, and each pixel electrode and a part of the common electrodes are oppositely arranged in the thickness direction of the array substrate; the touch control line comprises a first section and a second section, the first section and the data line are arranged on the same layer, the second section is connected with a common electrode, and the second section is further connected with the first section.
Description
Technical Field
The application relates to the technical field of display, in particular to an array substrate, a manufacturing method thereof, a display panel and a display device.
Background
This section provides merely background information related to the present disclosure and is not necessarily prior art.
At present, the touch panel and the liquid crystal display panel of most touch devices are independently disposed, the touch panel is disposed above the liquid crystal display panel, and a physical space exists between the liquid crystal display panel and the touch panel, so that external light is reflected on the upper surface of the liquid crystal display panel and the lower surface of the touch panel, which results in reduced visibility of the liquid crystal display panel in bright environments such as outdoors. If the visibility of the touch panel can be realized, the integration of the touch panel and the display panel can also realize the thinning and the light weight of the whole display panel.
In this technology development, in Cell touch technology is being developed and rapidly developed, and In the In Cell touch technology, a common electrode (VCOM) is mostly divided by using a division method. That is, the common electrode is divided into a plurality of areas of equal size, which are respectively used as touch electrodes in the touch stage, and each area is connected to a TDDI (touch display integrated IC) through a touch line.
In the related art, a touch line is formed on an array substrate of a display panel. The touch lines are generally disposed on the same layer as the data lines, and the touch lines are located outside the pixel region of the display panel. Limited by the line width of the touch line, the available space of the pixel region is limited, thereby limiting further improvement of transmittance.
Disclosure of Invention
The embodiment of the application provides a display panel, a manufacturing method thereof and a display device, so as to improve the transmittance of the display panel. In order to solve the technical problems, the embodiment of the application provides the following technical scheme:
an embodiment of a first aspect of the present application provides an array substrate, including:
a substrate base;
the data line is arranged on one side of the substrate base plate;
a first protective layer covering the data line;
a pixel electrode disposed on a side of the first protective layer away from the substrate base plate;
a second protective layer disposed on a side of the first protective layer away from the substrate base plate, the second protective layer covering the pixel electrode;
a common electrode layer including a plurality of common electrodes disposed on a side of the second protective layer away from the first protective layer, each of the pixel electrodes being disposed opposite a portion of the common electrodes in a thickness direction of the array substrate;
the touch control line comprises a first section and a second section connected with the first section, the first section and the data line are arranged on the same layer, and the second section is connected with one common electrode.
In some embodiments of the present application, the array substrate further includes a thin film transistor including a gate electrode, a first electrode, a second electrode, and an active layer, the data line is connected to one of the first electrode and the second electrode, and the pixel electrode is connected to the other of the first electrode and the second electrode.
In some embodiments of the present application, the common electrode is a stripe electrode, each stripe electrode is parallel to each other, a gap is formed between any two adjacent stripe electrodes, and the pixel electrode and three or four common electrodes are arranged opposite to each other in a thickness direction of the array substrate.
In some embodiments of the present application, the width of the touch line is less than or equal to 3 μm.
In some embodiments of the present application, a line width of the data line is 3 μm or less, and a distance between the touch line and the data line is not more than 3.5 μm.
In some embodiments of the present application, the array substrate further includes a gate line, the gate line and the data line are disposed in a crossing manner, and the gate line is connected to the gate electrode.
In some embodiments of the application, the projection of the common electrode connected to the second section onto the substrate is located outside the projection of the pixel electrode onto the substrate.
In some embodiments of the application, a first via is provided on the first protective layer, the second section being connected to the first section through the first via.
In some embodiments of the application, the array substrate further comprises a gate insulating layer, the gate and the active layer being separated by the gate insulating layer.
An embodiment of a second aspect of the present application provides a method for manufacturing an array substrate, including:
forming a gate electrode of a thin film transistor and an active layer arranged to be insulated from the gate electrode on a substrate;
forming a first pole and a second pole connected to the active layer, and forming a data line connected to one of the first pole and the second pole;
forming a first section of a touch line arranged on the same layer as the data line;
forming a first protective layer covering the active layer, the first electrode, the second electrode, the data line and the touch line;
a first via hole is arranged on the first protective layer;
forming a pixel electrode on the first protective layer, the pixel electrode being connected to the other of the first pole and the second pole;
forming a second section of the touch line on the first protective layer, wherein the second section is connected with the first section through the first via hole;
forming a second protective layer covering the pixel electrode and the second section on the first protective layer;
setting a second via hole on the second protective layer;
and forming a common electrode layer on the second protective layer, wherein the common electrode layer comprises a plurality of common electrodes, and the common electrodes are connected with the second section through the second via holes.
An embodiment of a third aspect of the present application provides a display panel, including the array substrate in the embodiment of the first aspect, and the display panel further includes an opposite substrate disposed opposite to the array substrate.
An embodiment of a fourth aspect of the present application proposes a display device comprising the display panel of the embodiment of the above third aspect.
According to the array substrate, the manufacturing method thereof, the display panel and the display device, each pixel electrode in the array substrate is opposite to a part of common electrodes of the common electrode layer in the thickness direction of the array substrate, and meanwhile, the touch line is connected with one common electrode, so that the common electrode layer can receive common electrode signals and touch sensing signals in a touch stage. Specifically, the touch line in this embodiment includes a first section and a second section, where the first section and the first protective layer are disposed on the same layer, and the second section passes through the second protective layer and is connected to a common electrode, so that the touch line passes through two layer structures of the first protective layer and the second protective layer, and thus, the size of the touch line in the thickness direction of the array substrate is increased (compared with the touch line in the related art), so that the resistance of the touch line is increased, and the current load passing through the touch line is reduced. Based on the condition that the current load is smaller, the width of the touch control line can be properly reduced (the touch control line is ensured to bear the current load). With the reduction of the width of the touch line, a part of space can be released, and the released space can increase the width of the pixel electrode. In addition, the number of common electrodes of the common electrode layer can be increased by using the process limit manufacturing, and thus, the number of common electrodes opposite to the pixel electrode can be increased, thereby improving the transmittance of the display panel.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the related art, the drawings that are required to be used in the description of the embodiments of the present application or the related technologies are briefly described below. It is evident that the drawings in the following description are only some embodiments of the present application and that other drawings may be obtained from these drawings without inventive effort for a person of ordinary skill in the art.
Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the application;
FIG. 2 is a schematic diagram of a TFT according to an embodiment of the application;
FIG. 3 is a schematic diagram of a pixel region according to an embodiment of the application;
fig. 4 is a schematic diagram showing transmittance contrast between a display panel according to an embodiment of the application and a display panel according to the related art.
Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
As shown in fig. 1, an embodiment of the first aspect of the present application provides an array substrate 10, which includes a substrate 100, a data line 300, a first protective layer 400, a pixel electrode 500, a second protective layer 600, a common electrode layer, and a touch line 700. Specifically, the data line 300 is disposed at one side of the substrate base 100. The first protective layer 400 covers the data line 300. The number of the pixel electrodes 500 is plural, and the pixel electrodes 500 are disposed at a side of the first protective layer 400 remote from the substrate 100. The second protective layer 600 is disposed at a side of the first protective layer 400 remote from the substrate 100, and the second protective layer 600 covers the pixel electrode 500. The common electrode layer includes a plurality of common electrodes 800 disposed at a side of the second protective layer 600 remote from the first protective layer 400, and each pixel electrode 500 is disposed opposite a portion of the common electrodes 800 in a thickness direction of the array substrate 10. The touch line 700 includes a first section 710 and a second section 720 connected to the first section 710, wherein the first section 710 and the data line 300 are disposed in the same layer, and the second section 720 is connected to one common electrode 800.
As can be appreciated, as shown in fig. 1 and 2, the number of the data lines 300 in the display substrate is plural, the plurality of data lines 300 are parallel to each other, and two adjacent data lines 300 define a range of one pixel region S1 in the row direction of the array substrate 10.
According to the array substrate 10 of the embodiment of the application, each pixel electrode 500 is opposite to a part of the common electrode 800 of the common electrode layer in the thickness direction of the array substrate 10, and meanwhile, the touch line 700 is also connected with one common electrode 800, so that the common electrode layer can receive the signal of the common electrode 800 and also can receive the touch sensing signal in the touch stage. Specifically, the touch wire 700 in the present embodiment includes the first section 710 and the second section 720, where the first section 710 and the first protection layer 400 are disposed in the same layer, and the second section 720 passes through the second protection layer 600 and is connected to one common electrode 800, so that the touch wire 700 passes through the two layer structures of the first protection layer 400 and the second protection layer 600, and thus, the size of the touch wire 700 in the thickness direction of the array substrate 10 is increased (compared with the touch wire 700 in the related art), thereby increasing the resistance of the touch wire 700 and further reducing the current load passing through the touch wire 700. Based on the situation that the current load is smaller, the width of the touch line 700 can be reduced appropriately (the touch line 700 is guaranteed to be capable of bearing the current load). As the width of the touch line 700 decreases, a portion of the space may be released, and the released space may increase the width of the pixel electrode 500. In addition, the number of the common electrodes 800 of the common electrode layer can be increased by using the process limit manufacturing, and thus, the number of the common electrodes 800 facing the pixel electrode 500 can be increased, thereby improving the transmittance of the display panel 1.
Further, a first via may be disposed on the first protective layer, and the second section 720 of the touch line 700 is connected to the first section 710 through the first via.
In some embodiments of the present application, as shown in fig. 2, the array substrate 10 further includes a thin film transistor 900, the thin film transistor 900 includes a gate electrode 910, a first electrode 920, a second electrode 930, and an active layer 940, the data line 300 is connected to one of the first electrode 920 and the second electrode 930, and the pixel electrode 500 is connected to the other of the first electrode 920 and the second electrode 930. Specifically, the first pole 920 may be a source or a drain, and when the first pole 920 is a source, the second pole 930 is a drain; when the first pole 920 is the drain, then the second pole 930 is the source. In general, the data line 300 may be connected to one of the first and second poles 920 and 930 as a source electrode, and the pixel electrode 500 may be connected to one of the first and second poles 920 and 930 as a drain electrode. Further, the first pole 920 and the second pole 930 of the thin film transistor 900 may be disposed in the same layer as the data line 300, i.e. the first section 710 of the touch line 700 is also disposed in the same layer as the first pole 920 and the second pole 930. It will be appreciated that there may be overlapping areas between the projection of the pixel electrode 500 onto the substrate 100 and the projections of the first and second electrodes 920, 930 onto the substrate 100, and thus the width of the first and second electrodes 920, 930 does not limit the range of the pixel region S1.
In some embodiments of the present application, the common electrode 800 is a stripe-shaped electrode, each stripe-shaped electrode is parallel to each other, and a gap is formed between any two adjacent stripe-shaped electrodes. The pixel electrode 500 is disposed opposite to three or four common electrodes 800 in the thickness direction of the array substrate 10. It is understood that the number of the common electrodes 800 opposite to the pixel electrodes 500 may be increased based on the increase of the width of the pixel electrodes 500 and the increase of the number of the common electrodes 800, and the transmittance of the display panel 1 may be significantly increased when each pixel electrode 500 is opposite to three common electrodes 800 or four common electrodes 800 in the thickness direction of the array substrate 10. Moreover, the scheme can be realized under the existing manufacturing process conditions.
Further, the width of the touch line 700 may be less than or equal to 3 μm, and at this time, the line width of the touch line 700 may meet the load requirement of the current load, and at the same time, it is also beneficial to release some space to the pixel region S1.
Further, the line width of the data line 300 is 3 μm or less, and the distance between the touch line 700 and the data line 300 is not more than 3.5 μm. That is, the width of the data line 300 in the embodiment of the present application may be reduced as compared with the data line 300 in the related art, and at the same time, the distance between the touch line 700 and the data line 300 may be reduced, so that more space may be released for the pixel region S1, the width of the pixel electrode 500 may be as large as possible, and the number of the common electrodes 800 may be maximized by reusing the process limit, and at this time, it may be ensured that one pixel electrode 500 is opposite to four common electrodes 800 in the thickness direction of the array substrate 10.
In some embodiments of the present application, as shown in fig. 3, the array substrate 10 further includes a gate line 1000, where the gate line 1000 and the data line 300 are disposed in a crossing manner, and the gate line 1000 is connected to the gate electrode 910. Further, two adjacent gate lines 1000 define a range of one pixel region S1 in the column direction of the array substrate 10. That is, the data line 300 and the gate line define the range of one pixel region S1.
In some embodiments of the present application, the projection of the common electrode 800 connected to the second section 720 onto the substrate 100 is located outside the projection of the pixel electrode 500 onto the substrate 100. The common electrode 800 opposite to the pixel electrode 500 forms a capacitance structure with the pixel electrode 500. The common electrode 800 connected with the touch control line 700 is staggered with the pixel electrode 500, so that the influence of the capacitor structure on the common electrode 800 can be reduced to a certain extent, and the voltage jump phenomenon generated by the common electrode 800 when the display stage and the touch control stage are switched mutually is weakened, so that the transverse stripe problem of the display panel 1 is restrained.
In some embodiments of the present application, the array substrate 10 further includes a gate insulating layer 200, and the gate electrode 910 and the active layer 940 are separated by the gate insulating layer 200 to achieve electrical insulation between the gate electrode 910 and the active layer 940.
The beneficial effects of the application are illustrated below by way of a specific example: in a specific example, the width of the touch line 700 is 2.5 μm, the width of the data line 300 is 2.5 μm, the distance between the touch line 700 and the data line 300 is 3.5 μm, and each pixel electrode 500 is opposite to four common electrodes 800 in the thickness direction of the array substrate 10. In one comparative example, the width of the touch line was 6.3 μm, the width of the data line was 3 μm, the distance between the touch line and the data line was 4.3 μm, and each pixel electrode was opposite to two common electrodes in the thickness direction of the array substrate. Fig. 4 shows a comparison of the test results of the above example and the comparative example, and it can be seen from the figure that the transmittance of the above example is improved by 11%.
An embodiment of the second aspect of the present application provides a method for manufacturing an array substrate 10, including:
forming a gate electrode 910 of the thin film transistor 900 and an active layer 940 provided to be insulated from the gate electrode 910 on the substrate 100;
forming a first pole 920 and a second pole 930 connected to the active layer 940, and forming a data line 300 connected to one of the first pole 920 and the second pole 930;
forming a first section 710 of the touch line 700 disposed on the same layer as the data line 300;
forming a first protective layer 400 covering the active layer 940, the first electrode 920, the second electrode 930, the data line 300, and the touch line 700;
disposing a first via on the first protective layer 400;
forming a pixel electrode 500 on the first protective layer 400, the pixel electrode 500 connecting the other of the first and second poles 920 and 930;
forming a second section 720 of the touch line 700 on the first protective layer 400, the second section 720 being connected to the first section 710 through a first via;
forming a second protective layer 600 covering the pixel electrode 500 and the second section 720 on the first protective layer 400;
disposing a second via hole on the second protection layer 600;
a common electrode layer including a plurality of common electrodes 800 is formed on the second protective layer 600, and the pixel electrode 500 is opposite to a portion of the common electrodes 800 in the thickness direction of the array substrate 10, and the second section 720 of the touch line 700 is connected to one common electrode 800 through a second via hole.
According to the method for manufacturing the array substrate 10 of the embodiment of the application, the manufactured touch line 700 includes the first section 710 and the second section 720, wherein the first section 710 and the first protection layer 400 are arranged in the same layer, and the second section 720 passes through the second protection layer 600 and is connected with one common electrode 800, so that the touch line 700 passes through the two-layer structure of the first protection layer 400 and the second protection layer 600, and thus, the size of the touch line 700 in the thickness direction of the array substrate 10 is increased (compared with the touch line 700 in the related art), thereby increasing the resistance of the touch line 700 and reducing the current load passing through the touch line 700. Based on the situation that the current load is smaller, the width of the touch line 700 can be reduced appropriately (the touch line 700 is guaranteed to be capable of bearing the current load). As the width of the touch line 700 decreases, a portion of the space may be released, and the released space may increase the width of the pixel electrode 500. In addition, the number of the common electrodes 800 of the common electrode layer can be increased by using the process limit manufacturing, and thus, the number of the common electrodes 800 facing the pixel electrode 500 can be increased, thereby improving the transmittance of the display panel 1.
An embodiment of the third aspect of the present application proposes a display panel 1 comprising the array substrate 10 in the embodiment of the first aspect described above. The display panel 1 further includes an opposite substrate 20 arranged opposite to the array substrate 10.
According to the display panel 1 of the embodiment of the application, each pixel electrode 500 in the array substrate 10 is opposite to a part of the common electrode 800 of the common electrode layer in the thickness direction of the array substrate 10, and meanwhile, the touch line 700 is also connected with one common electrode 800, so that the common electrode layer can receive signals of the common electrode 800 and touch sensing signals in a touch stage. Specifically, the touch wire 700 in the present embodiment includes the first section 710 and the second section 720, where the first section 710 and the first protection layer 400 are disposed in the same layer, and the second section 720 passes through the second protection layer 600 and is connected to one common electrode 800, so that the touch wire 700 passes through the two layer structures of the first protection layer 400 and the second protection layer 600, and thus, the size of the touch wire 700 in the thickness direction of the array substrate 10 is increased (compared with the touch wire 700 in the related art), thereby increasing the resistance of the touch wire 700 and further reducing the current load passing through the touch wire 700. Based on the situation that the current load is smaller, the width of the touch line 700 can be reduced appropriately (the touch line 700 is guaranteed to be capable of bearing the current load). As the width of the touch line 700 decreases, a portion of the space may be released, and the released space may increase the width of the pixel electrode 500. In addition, the number of the common electrodes 800 of the common electrode layer can be increased by using the process limit manufacturing, and thus, the number of the common electrodes 800 facing the pixel electrode 500 can be increased, thereby improving the transmittance of the display panel 1.
Further, the opposite substrate may be a color film substrate.
An embodiment of a fourth aspect of the present application proposes a display device comprising the display panel 1 in the embodiment of the above third aspect. The specific type of the display device is not limited, and may be, for example, a mobile phone, a tablet computer, a liquid crystal television, and the like.
Since the display device in the embodiment of the present application and the display panel 1 in the embodiment of the third aspect are the same inventive concept, the display device in the embodiment of the present application can obtain all the advantageous effects possessed by the display panel 1 in the embodiment of the third aspect.
It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
In this specification, each embodiment is described in a related manner, and identical and similar parts of each embodiment are all referred to each other, and each embodiment mainly describes differences from other embodiments.
The foregoing description is only of the preferred embodiments of the present application and is not intended to limit the scope of the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application are included in the protection scope of the present application.
Claims (11)
1. An array substrate, characterized by comprising:
a substrate base;
the data line is arranged on one side of the substrate base plate;
a first protective layer covering the data line;
a pixel electrode disposed on a side of the first protective layer away from the substrate;
a second protective layer disposed on a side of the first protective layer away from the substrate base plate, the second protective layer covering the pixel electrode;
a common electrode layer including a plurality of common electrodes disposed on a side of the second protective layer away from the first protective layer, each of the pixel electrodes being disposed opposite a portion of the common electrodes in a thickness direction of the array substrate;
the touch control line comprises a first section and a second section connected with the first section, the first section and the data line are arranged on the same layer, the second section is connected with one common electrode, and the width of the touch control line is smaller than or equal to 3 mu m.
2. The array substrate of claim 1, further comprising a thin film transistor comprising a gate electrode, a first pole, a second pole, and an active layer, wherein the data line is connected to one of the first pole and the second pole, and wherein the pixel electrode is connected to the other of the first pole and the second pole.
3. The array substrate according to claim 1, wherein the common electrode is a stripe-shaped electrode, each stripe-shaped electrode is parallel to each other, a gap is provided between any two adjacent stripe-shaped electrodes, and the pixel electrode and three or four common electrodes are arranged opposite to each other in a thickness direction of the array substrate.
4. The array substrate of claim 1, wherein a line width of the data line is 3 μm or less, and a distance between the touch line and the data line is not more than 3.5 μm.
5. The array substrate of claim 2, further comprising a gate line, wherein the gate line and the data line are disposed in a crossing arrangement, and wherein the gate line is connected to the gate electrode.
6. The array substrate according to claim 1, wherein a projection of the common electrode connected to the second section onto the substrate is located outside a projection of the pixel electrode onto the substrate.
7. The array substrate according to claim 1, wherein a first via hole is provided on the first protective layer, and the second section is connected to the first section through the first via hole.
8. The array substrate of claim 2, further comprising a gate insulating layer, the gate and the active layer being separated by the gate insulating layer.
9. The manufacturing method of the array substrate is characterized by comprising the following steps of:
forming a gate electrode of a thin film transistor and an active layer arranged to be insulated from the gate electrode on a substrate;
forming a first pole and a second pole connected to the active layer, and forming a data line connected to one of the first pole and the second pole;
forming a first section of a touch line arranged on the same layer as the data line;
forming a first protective layer covering the active layer, the first electrode, the second electrode, the data line and the touch line;
a first via hole is arranged on the first protective layer;
forming a pixel electrode on the first protective layer, the pixel electrode connecting the other of the first pole and the second pole;
forming a second section of the touch line on the first protective layer, wherein the second section is connected with the first section through the first via hole;
forming a second protective layer covering the pixel electrode and the second section on the first protective layer;
setting a second via hole on the second protective layer;
and forming a common electrode layer on the second protective layer, wherein the common electrode layer comprises a plurality of common electrodes, and the common electrodes are connected with the second section through the second via holes.
10. A display panel comprising the array substrate according to any one of claims 1 to 8, the display panel further comprising a counter substrate arranged opposite to the array substrate.
11. A display device comprising the display panel according to claim 10.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110826881.2A CN113552751B (en) | 2021-07-21 | 2021-07-21 | Array substrate, manufacturing method thereof, display panel and display device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202110826881.2A CN113552751B (en) | 2021-07-21 | 2021-07-21 | Array substrate, manufacturing method thereof, display panel and display device |
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| CN113552751A CN113552751A (en) | 2021-10-26 |
| CN113552751B true CN113552751B (en) | 2023-11-07 |
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| CN202110826881.2A Active CN113552751B (en) | 2021-07-21 | 2021-07-21 | Array substrate, manufacturing method thereof, display panel and display device |
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| CN103474432A (en) * | 2013-08-28 | 2013-12-25 | 合肥京东方光电科技有限公司 | Array substrate and preparation method and display device of array substrate |
| CN108227326A (en) * | 2018-02-01 | 2018-06-29 | 京东方科技集团股份有限公司 | Array substrate and its manufacturing method, touch-control display panel |
| CN110347285A (en) * | 2019-06-25 | 2019-10-18 | 武汉华星光电技术有限公司 | A kind of display panel |
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| CN104699348A (en) * | 2015-04-01 | 2015-06-10 | 上海天马微电子有限公司 | Array substrate and display device |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103474432A (en) * | 2013-08-28 | 2013-12-25 | 合肥京东方光电科技有限公司 | Array substrate and preparation method and display device of array substrate |
| CN108227326A (en) * | 2018-02-01 | 2018-06-29 | 京东方科技集团股份有限公司 | Array substrate and its manufacturing method, touch-control display panel |
| CN110347285A (en) * | 2019-06-25 | 2019-10-18 | 武汉华星光电技术有限公司 | A kind of display panel |
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