CN113540296A - Manufacturing method of LED epitaxial wafer suitable for small-spacing display screen - Google Patents

Manufacturing method of LED epitaxial wafer suitable for small-spacing display screen Download PDF

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CN113540296A
CN113540296A CN202110820277.9A CN202110820277A CN113540296A CN 113540296 A CN113540296 A CN 113540296A CN 202110820277 A CN202110820277 A CN 202110820277A CN 113540296 A CN113540296 A CN 113540296A
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CN113540296B (en
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徐平
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Xiangneng Hualei Optoelectrical Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H01L27/153Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier

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Abstract

The application discloses a method for manufacturing an LED epitaxial wafer suitable for a small-spacing display screen, which sequentially comprises the following steps: processing a substrate, growing a low-temperature GaN buffer layer, growing a non-doped GaN layer, growing an N-type GaN layer doped with Si, growing a multi-quantum well layer, growing an AlGaN electronic barrier layer, growing a P-type GaN layer doped with Mg, and cooling, wherein the step of growing the multi-quantum well layer sequentially comprises the steps of introducing a TMIn source, growing MQWs1 and growing MQWs2, and the step of growing the MQWs1 comprises the step of sequentially growing an InGaN well layer and an In well layerxAlyMg(1‑x‑y)And a layer growing step, wherein the MQWs2 comprises a step of sequentially growing a GaO layer and a GaN barrier layer. The invention reduces the blue shift of wavelength and improves the brightness of LED by adopting a novel manufacturing method of the LED epitaxial wafer, and is particularly suitable for manufacturing small-spacing display screens.

Description

Manufacturing method of LED epitaxial wafer suitable for small-spacing display screen
Technical Field
The invention belongs to the technical field of LEDs, and particularly relates to a manufacturing method of an LED epitaxial wafer suitable for a small-spacing display screen.
Background
A Light-Emitting Diode (LED) is a semiconductor electronic device that converts electrical energy into optical energy. When current flows through the LED, electrons and holes in the LED are recombined in the multiple quantum wells to emit monochromatic light. As a novel high-efficiency, environment-friendly and green solid-state illumination light source, the LED is widely used for indoor and outdoor illumination, and also widely applied to traffic signal lamps, automobile lamps, indoor and outdoor illumination and small-distance display screens.
In the current LED quantum well growth method, the forbidden bandwidth of the material is limited, the ground state in the quantum well is raised, and the light-emitting wavelength of the LED is easy to move towards the short wave direction, namely blue shift occurs. When currents with different magnitudes are injected into the small-spacing display screen to change the luminous intensity, the blue shift amount of the LED luminous wavelength has large difference, and the application requirement of the small-spacing display screen cannot be met.
In summary, it is urgently needed to develop a new LED chip manufacturing method to reduce the blue shift of the wavelength and improve the brightness of the LED, so as to meet the application requirement of the small-pitch display screen.
Disclosure of Invention
The invention reduces the blue shift of wavelength and improves the brightness of the LED by adopting a novel manufacturing method of the LED epitaxial wafer.
The invention relates to a method for manufacturing an LED epitaxial wafer suitable for a small-spacing display screen, which sequentially comprises the following steps: treating a substrate, growing a low-temperature GaN buffer layer, growing a non-doped GaN layer, growing an N-type GaN layer doped with Si, growing a multi-quantum well layer, growing an AlGaN electronic barrier layer, growing a P-type GaN layer doped with Mg, cooling,
the growing multiple quantum well layer sequentially comprises: introducing a TMIn source, growing MQWs1 and growing MQWs 2; wherein,
the introducing of the TMIn source specifically comprises the following steps:
controlling the pressure of the reaction cavity at 300-;
the growing MQWs1 includes growing an InGaN well layer and In sequencexAlyMg(1-x-y)The layer is specifically:
keeping the pressure of the reaction cavity unchanged, raising the temperature of the reaction cavity to 900-3TMGa and TMIn, the growth thickness of the In source and the Ga source is interrupted periodically and is D1In the InGaN well layer, the time for interrupting and leading the TMIn into the reaction cavity is 6s and 3s respectively during the growth of the InGaN well layer, TMThe time for interrupting and introducing Ga into the reaction cavity is respectively 10s and 15 s;
the pressure of the reaction cavity is kept unchanged, the temperature of the reaction cavity is reduced to 700-720 ℃, and TMIn and Cp are introduced2Mg, TMAl and H2Growing a thickness D on the InGaN well layer2In (2) ofxAlyMg(1-x-y)The value range of x is 0.1-0.2, and the value range of y is 0.3-0.45;
the MQWs2 comprises a GaO layer and a GaN barrier layer which are sequentially grown, and the method specifically comprises the following steps:
keeping the pressure of the reaction cavity unchanged, reducing the temperature of the reaction cavity to 620-640 ℃, and introducing N2And H2As carrier gas, simultaneously introducing NH3TMGa and O2Introducing for 18-28s to allow TMGa and O to be mixed2Cracking sufficiently to make the cracked Ga and O atoms In the InxAlyMg(1-x-y)The layers are bonded to form a thickness D3The molar content of Ga atoms is improved from 20 percent to 40 percent in the cracking process of the GaO layer, and simultaneously, H, N, C atoms which are cracked are conveyed to a tail pipe along with a carrier gas and are discharged out of the reaction chamber;
the temperature of the reaction cavity is increased to 800-820 ℃, the pressure of the reaction cavity is increased to 400-3TMGa and N2Periodically interrupting the growth of the Ga source to a thickness D on the GaO layer4In the growth process of the GaN barrier layer, the time for interrupting the TMGa and the time for introducing the TMGa into the reaction cavity are respectively 8s and 4 s;
wherein D is3+D4=1.5(D1+D2);
The steps of supplying the TMIn source, growing the MQWs1 and growing the MQWs2 are performed periodically in sequence with a period of 2-11 cycles.
Preferably, the specific process for processing the substrate is as follows:
at the temperature of 1000-1100 ℃, 100-130L/min H is introduced2And processing the sapphire substrate for 5-10min by keeping the pressure of the reaction chamber at 100-.
Preferably, the specific process for growing the low-temperature GaN buffer layer is as follows:
cooling to 500-600 deg.C, and maintaining the pressure in reaction cavity at 3 deg.C00-600mbar, NH with the flow rate of 10000-3TMGa of 50-100sccm and H of 100-2Growing a low-temperature GaN buffer layer with the thickness of 20-40nm on the sapphire substrate;
raising the temperature to 1000-3And H of 100-2And preserving the heat for 300-500s to etch the low-temperature GaN buffer layer into an irregular island shape.
Preferably, the specific process for growing the undoped GaN layer is as follows:
raising the temperature to 1000-3200-400sccm TMGa and 100-130L/min H2And continuously growing the 2-4 mu m undoped GaN layer.
Preferably, the specific process for growing the Si-doped GaN layer is as follows:
the pressure of the reaction chamber is kept at 300-3200-400sccm TMGa, 100-130L/min H2And 20-50sccm SiH4Continuously growing a 3m-4 μm Si-doped N-type GaN layer, wherein the Si doping concentration is 5E18-5E19atoms/cm3
Preferably, the specific process for growing the AlGaN electron blocking layer is as follows:
introducing NH of 50000-70000sccm at the temperature of 900-950 ℃ and the pressure of the reaction chamber of 200-400mbar3TMGa 30-60sccm, H100-130L/min2100 TMAl with 130sccm, 1000 Cp with 1300sccm2Growing the AlGaN electron barrier layer under the condition of Mg, wherein the thickness of the AlGaN layer is 40-60nm, and the Mg doping concentration is 1E19-1E20atoms/cm3
Preferably, the specific process for growing the Mg-doped P-type GaN layer is as follows:
keeping the pressure of the reaction cavity at 400-320-100sccm of TMGa, 100-2And 1000-Cp of 3000sccm2Mg, continuously growing a P-type GaN layer doped with Mg with the thickness of 50-200nmWherein the Mg doping concentration is 1E19-1E20atoms/cm3
Preferably, the specific process of cooling down is as follows:
cooling to 650 plus 680 ℃, preserving the temperature for 20-30min, closing the heating system and the gas supply system, and cooling along with the furnace.
Compared with the traditional growth method, the manufacturing method of the LED epitaxial wafer suitable for the small-spacing display screen achieves the following effects:
1. the method is beneficial to repairing a rough interface of the InGaN quantum well by introducing the TMIn source before the InGaN quantum well grows, and inhibits the formation of defects such as V-shaped pits, In clusters and the like In the InGaN quantum well, thereby improving the growth quality of the quantum well.
2. The method for growing the InGaN well layer by periodically interrupting the In source and the Ga source is adopted, so that the luminous intensity of the LED is obviously improved, which can be explained as that In clusters, In drops and the like are easily formed on a growing interface due to the fact that the N source is insufficient In the process of growing the InGaN quantum well by the traditional method, thermal decomposition and continuous supply of the N source are facilitated In the process of interrupting growth by closing the In source and the Ga source, the defects of the In clusters, the In drops and the like on the surface are eliminated, the quality of the quantum well is improved, and the photoelectric performance of the LED is improved.
3. According to the invention, a cracking method is adopted to introduce a grown GaO layer into a quantum well layer, the molar content of Ga atoms is controlled to be increased from 20% to 40% in the cracking process, the mass centers of Ga atom sets and N atom sets in a multi-quantum well layer can be enabled to coincide, thus a dipole is formed, spontaneous polarization is generated in the material of the layer, a built-in electric field is formed, the built-in electric field can promote the injection of carriers in the quantum well, the quantum confinement Stark effect is reduced, the energy band is enabled to be smooth, and the blue shift of the wavelength is reduced.
4. The invention inserts an In layer behind the InGaN well layerxAlyMg(1-x-y)Layer, Al atom In by linear combination effect of atomic orbitals due to Al atom having lower principal quantum number and wider orbital energy gap than In atomxAlyMg(1-x-y)The formation of Al-In bond (or In-Mg-Al bond) can increase the forbidden bandwidth of InGaN and promote the radicals In quantum wellThe state is reduced, and the light-emitting wavelength of the LED is reduced to move towards the short wave direction, so that the blue shift of the wavelength is reduced.
5. The invention divides the quantum well structure of the active region into two groups, wherein the thickness of MQWs2 is 1.5 times of the thickness of MQWs1, which can improve the lattice periodicity of epitaxial slice materials and the interface characteristics of materials, thereby improving the performance of the LED, also promoting the overlapping of the central distribution axes of holes and electrons in a multi-quantum well, improving the efficiency of electron-hole transition, and improving the luminous efficiency of the LED chip.
6. According to the invention, the GaN barrier layer is grown by periodically interrupting the Ga source, so that the material growth defects can be effectively reduced, the crystal quality of the key luminescent MQWs2 is improved, and the brightness can be improved by about 1.5% compared with the traditional GaN barrier layer growth method.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the invention and not to limit the invention. In the drawings:
FIG. 1 is a schematic structural diagram of an LED epitaxy prepared by the method of the present invention;
FIG. 2 is a schematic structural diagram of an LED epitaxy prepared by a conventional method;
the GaN-based light-emitting diode comprises a sapphire substrate, a low-temperature GaN buffer layer, a non-doped GaN layer, a N-type GaN layer, a multi-quantum well layer, an AlGaN electronic barrier layer, a P-type GaN layer, an InGaN well layer, an AlGaN electronic barrier layer, an InGaN electron barrier layer, an indium (In) layer, a gallium nitride (AlGaN) layer, a gallium nitride (GaN) layer, an indium (indium) layer, a gallium nitride (InGaN) layer, an indium (indium) layer, a gallium nitride (AlGaN) layer, a gallium nitride (GaN) layer, a gallium nitride (AlGaN) layer, an indium (gallium nitride) layer, a gallium nitride (gallium nitride) layer, a silicon (gallium nitride) layer, a silicon) layer, an indium (gallium nitride layer, a) layer, an indium (gallium nitride layer, 2, a gallium nitride (gallium nitride) layer, anxAlyMg(1-x-y)Layer 53, GaO layer, 54, GaN barrier layer.
Detailed Description
As used in the specification and in the claims, certain terms are used to refer to particular components. As one skilled in the art will appreciate, manufacturers may refer to a component by different names. This specification and claims do not intend to distinguish between components that differ in name but not function. In the following description and in the claims, the terms "include" and "comprise" are used in an open-ended fashion, and thus should be interpreted to mean "include, but not limited to. "substantially" means within an acceptable error range, and a person skilled in the art can solve the technical problem within a certain error range to substantially achieve the technical effect. The description which follows is a preferred embodiment of the present application, but is made for the purpose of illustrating the general principles of the application and not for the purpose of limiting the scope of the application. The protection scope of the present application shall be subject to the definitions of the appended claims.
Furthermore, the present description does not limit the components and method steps disclosed in the claims to those of the embodiments. In particular, the dimensions, materials, shapes, structural and adjacent orders, manufacturing methods, and the like of the components described in the embodiments are merely illustrative examples, and the scope of the present invention is not limited thereto, unless otherwise specified. The sizes and positional relationships of the structural members shown in the drawings are exaggerated for clarity of illustration.
The present application will be described in further detail below with reference to the accompanying drawings, but the present application is not limited thereto.
Example 1
In the embodiment, the method for manufacturing the LED epitaxial wafer suitable for the small-spacing display screen adopts MOCVD to grow the GaN-based LED epitaxial wafer and adopts high-purity H2Or high purity N2Or high purity H2And high purity N2The mixed gas of (2) is used as a carrier gas, high-purity NH3As the N source, a metal organic source, trimethyl gallium (TMGa) as the gallium source, trimethyl indium (TMIn) as the indium source, and an N-type dopant, Silane (SiH)4) Trimethylaluminum (TMAl) as the aluminum source and magnesium diclomelate (CP) as the P-type dopant2Mg), the reaction pressure is between 70mbar and 600 mbar. The specific growth method is as follows (please refer to fig. 1 for the epitaxial structure):
the manufacturing method of the LED epitaxial wafer suitable for the small-spacing display screen sequentially comprises the following steps: processing a sapphire substrate 1, growing a low-temperature GaN buffer layer 2, growing a non-doped GaN layer 3, growing an N-type GaN layer 4 doped with Si, growing a multi-quantum well layer 5, growing an AlGaN electronic barrier layer 6 and growing a P-type GaN layer 7 doped with Mg, and cooling; wherein,
step 1: the sapphire substrate 1 is processed.
Specifically, the step 1 further includes:
introducing 100-130L/min H at the temperature of 1000-1100 ℃ and the pressure of the reaction cavity of 100-300mbar2The sapphire substrate was processed for 5 to 10 minutes under the conditions of (1).
Step 2: and growing the low-temperature GaN buffer layer 2, and forming irregular islands on the low-temperature GaN buffer layer 2.
Specifically, the step 2 further includes:
introducing 10000-20000sccm NH into the reaction chamber at the temperature of 500-600 ℃ and the pressure of 300-600mbar3TMGa 50-100sccm, H100-130L/min2Growing the low-temperature GaN buffer layer 2 on the sapphire substrate 1 under the condition (1), wherein the thickness of the low-temperature GaN buffer layer 2 is 20-40 nm;
introducing NH of 30000-40000sccm at the temperature of 1000-1100 ℃ and the pressure of the reaction chamber of 300-600mbar3And H of 100-2Under the condition of (1), keeping the temperature for 300-.
And step 3: an undoped GaN layer 3 is grown.
Specifically, the step 3 further includes:
introducing NH of 30000-40000sccm at the temperature of 1000-1200 ℃ and the pressure of the reaction chamber of 300-600mbar3200-400sccm TMGa and 100-130L/min H2The non-doped GaN layer 3 grown under the condition of (a); the thickness of the undoped GaN layer 3 is 2-4 μm.
And 4, step 4: a Si doped N-type GaN layer 4 is grown.
Specifically, the step 4 is further:
the pressure of the reaction chamber is kept at 300-3200-400sccm TMGa, 100-130L/min H2And 20-50sccm SiH4Continuously growing a 3-4 μm Si-doped N-type GaN layer 4 in which the Si doping concentration is 5E18-1E19atoms/cm3
And 5: the multiple quantum well layer 5 is grown.
The growing multiple quantum well layer sequentially comprises: introducing a TMIn source, growing MQWs1 and growing MQWs 2; wherein,
the introducing of the TMIn source specifically comprises the following steps:
controlling the pressure of the reaction cavity at 300-;
the growing of MQWs1 includes growing InGaN well layer 51 and In sequencexAlyMg(1-x-y)Layer 52, specifically:
keeping the pressure of the reaction cavity unchanged, raising the temperature of the reaction cavity to 900-3TMGa and TMIn, the growth thickness of the In source and the Ga source is interrupted periodically and is D1In the growth process of the InGaN well layer 51, the time for interrupting and introducing the TMIn into the reaction cavity is 6s and 3s respectively, and the time for interrupting and introducing the TMGa into the reaction cavity is 10s and 15s respectively;
the pressure of the reaction cavity is kept unchanged, the temperature of the reaction cavity is reduced to 700-720 ℃, and TMIn and Cp are introduced2Mg, TMAl and H2Grown over the InGaN well layer 51 to a thickness D2In (2) ofxAlyMg(1-x-y)The layer 52, x ranges from 0.1 to 0.2, and y ranges from 0.3 to 0.45;
the growth of the MQWs2 comprises the sequential growth of a GaO layer 53 and a GaN barrier layer 54, and specifically comprises the following steps:
keeping the pressure of the reaction cavity unchanged, reducing the temperature of the reaction cavity to 620-640 ℃, and introducing N2And H2As carrier gas, simultaneously introducing NH3TMGa and O2Introducing for 18-28s to allow TMGa and O to be mixed2Cracking sufficiently to make the cracked Ga and O atoms In the InxAlyMg(1-x-y)Layer 52 is bonded to produce a thickness D3The Ga layer 53, the mole content of Ga atoms is increased from 20% to 40% in the cracking process, and H, N, C atoms are transported to the tail pipe to be discharged out of the reaction chamber along with the carrier gas;
the temperature of the reaction cavity is increased to 800-820 ℃, the pressure of the reaction cavity is increased to 400-3TMGa andN2periodically interrupting the growth of Ga source on top of said GaO layer 53 to a thickness D4In the growth process of the GaN barrier layer 54, the time for interrupting the TMGa and the time for introducing the TMGa into the reaction cavity are respectively 8s and 4 s;
wherein, D3+ D4 is 1.5(D1+ D2);
the steps of supplying the TMIn source, growing the MQWs1 and growing the MQWs2 are performed periodically in sequence with a period of 2-11 cycles.
Step 6: an AlGaN electron blocking layer 6 is grown.
Specifically, the step 6 further includes:
introducing NH of 50000-70000sccm at the temperature of 900-950 ℃ and the pressure of the reaction chamber of 200-400mbar3TMGa 30-60sccm, H100-130L/min2100-TMAl of 130sccm and 1000-Cp of 1300sccm2Growing the AlGaN electron barrier layer 6 under the condition of Mg, wherein the thickness of the AlGaN layer 6 is 40-60nm, and the Mg doping concentration is 1E19-1E20atoms/cm3
And 7: a P-type GaN layer 7 doped with Mg is grown.
Specifically, the step 7 is further:
introducing NH of 50000-70000sccm at the temperature of 950-1000 ℃ and the pressure of the reaction chamber of 400-900mbar320-100sccm of TMGa, 100-21000-Cp of 3000sccm2Growing a P-type GaN layer 7 doped with Mg with a thickness of 50-200nm under the condition of Mg, wherein the Mg doping concentration is 1E19-1E20atoms/cm3
And 8: keeping the temperature for 20-30min at 650-680 ℃, then closing the heating system and the gas supply system, and cooling along with the furnace.
Example 2
A comparative example, a method for growing a conventional LED epitaxial structure, is provided below (see fig. 2 for an epitaxial structure).
Step 1: introducing 100-130L/min H at the temperature of 1000-1100 ℃ and the pressure of the reaction cavity of 100-300mbar2The sapphire substrate was processed for 5 to 10 minutes under the conditions of (1).
Step 2: and growing the low-temperature GaN buffer layer 2, and forming irregular islands on the low-temperature GaN buffer layer 2.
Specifically, the step 2 further includes:
introducing 10000-20000sccm NH into the reaction chamber at the temperature of 500-600 ℃ and the pressure of 300-600mbar3TMGa 50-100sccm, H100-130L/min2Growing the low-temperature GaN buffer layer 2 on the sapphire substrate 1 under the condition (1), wherein the thickness of the low-temperature GaN buffer layer 2 is 20-40 nm;
introducing NH of 30000-40000sccm at the temperature of 1000-1100 ℃ and the pressure of the reaction chamber of 300-600mbar3100-130L/min H2Under the condition of (1), keeping the temperature for 300-.
And step 3: an undoped GaN layer 3 is grown.
Specifically, the step 3 further includes:
introducing NH of 30000-40000sccm at the temperature of 1000-1200 ℃ and the pressure of the reaction chamber of 300-600mbar3200-400sccm TMGa and 100-130L/min H2Under the conditions of (a), growing the undoped GaN layer; the thickness of the undoped GaN layer 3 is 2-4 μm.
And 4, step 4: a Si doped N-type GaN layer 4 is grown.
Specifically, the step 4 is further:
introducing NH of 30000-60000sccm at the temperature of 1000-1200 ℃ and the pressure of the reaction chamber of 300-600mbar3200-400sccm TMGa, 100-130L/min H220-50sccm SiH4Under the conditions of (1) growing a Si-doped N-type GaN layer 4, the thickness of the N-type GaN layer 4 being 3-4 μm, the concentration of Si doping being 5E18-1E19atoms/cm3
And 5: an InGaN/GaN MQW layer 5 is grown.
Specifically, the multiple quantum well layer 5 is further grown by:
keeping the pressure of the reaction cavity at 300-320-40sccm of TMGa, 10000-2Growing an In-doped InGaN well layer 51 with a thickness of 3 nm;
raising the temperature to 800 ℃, keeping the pressure of the reaction cavity at 300-320-100sccm of TMGa and 100-130L/min of N2Growing a 10nm GaN barrier layer 54;
and repeatedly and alternately growing the InGaN well layer 51 and the GaN barrier layer 54 to obtain the InGaN/GaN multi-quantum well light-emitting layer, wherein the number of the alternate growth cycles of the InGaN well layer 51 and the GaN barrier layer 54 is 7-13.
Step 6: an AlGaN electron blocking layer 6 is grown.
Specifically, the step 6 further includes:
introducing NH of 50000-70000sccm at the temperature of 900-950 ℃ and the pressure of the reaction chamber of 200-400mbar3TMGa 30-60sccm, H100-130L/min2100 TMAl with 130sccm, 1000 Cp with 1300sccm2Growing the AlGaN electron barrier layer 6 under the condition of Mg, wherein the thickness of the AlGaN layer 6 is 40-60nm, and the Mg doping concentration is 1E19-1E20atoms/cm3
And 7: a P-type GaN layer 7 doped with Mg is grown.
Specifically, the step 7 is further:
introducing NH of 50000-70000sccm at the temperature of 950-1000 ℃ and the pressure of the reaction chamber of 400-900mbar320-100sccm of TMGa, 100-21000-Cp of 3000sccm2Growing a P-type GaN layer 7 doped with Mg with a thickness of 50-200nm under the condition of Mg, wherein the Mg doping concentration is 1E19-1E20atoms/cm3
And 8: keeping the temperature for 20-30min at 650-680 ℃, then closing the heating system and the gas supply system, and cooling along with the furnace.
Samples 1 and 2 were prepared according to the above examples 1 and 2, respectively, with sample 1 and 2 being about 150nm coated with an ITO layer under the same pre-process conditions, about 1500nm coated with a Cr/Pt/Au electrode under the same conditions, and a protective layer of SiO coated under the same conditions2About 100nm, the samples were then ground under the same conditions to cut 635 μm (25 mil) chip particles, after which 1000 grains were picked from each of sample 1 and sample 2 at the same location, and the same chip particles were mounted on the same substrateAnd packaging the LED into the white light LED under the packaging process. The photoelectric properties of sample 1 and sample 2 were tested using an integrating sphere at a drive current of 350 mA.
TABLE 1 comparison of electrical parameters of sample 1 and sample 2
Figure BDA0003171763760000101
The data obtained by the integrating sphere are analyzed and compared, and as can be seen from table 1, the luminous efficiency of the LED (sample 1) prepared by the LED chip manufacturing method provided by the invention is obviously improved, the blue shift of the wavelength is smaller, and the electrical parameters of the voltage, the reverse voltage, the antistatic capability and other LEDs are also better, because the new quantum well growth technical scheme is adopted, the luminous efficiency of the LED is improved, the blue shift of the wavelength is reduced, and the photoelectric properties of other LEDs are improved.
The manufacturing method of the LED epitaxial wafer suitable for the small-spacing display screen achieves the following effects:
1. the method is beneficial to repairing a rough interface of the InGaN quantum well by introducing the TMIn source before the InGaN quantum well grows, and inhibits the formation of defects such as V-shaped pits, In clusters and the like In the InGaN quantum well, thereby improving the growth quality of the quantum well.
2. The method for growing the InGaN well layer by periodically interrupting the In source and the Ga source is adopted, so that the luminous intensity of the LED is obviously improved, which can be explained as that In clusters, In drops and the like are easily formed on a growing interface due to the fact that the N source is insufficient In the process of growing the InGaN quantum well by the traditional method, thermal decomposition and continuous supply of the N source are facilitated In the process of interrupting growth by closing the In source and the Ga source, the defects of the In clusters, the In drops and the like on the surface are eliminated, the quality of the quantum well is improved, and the photoelectric performance of the LED is improved.
3. According to the invention, a cracking method is adopted to introduce a grown GaO layer into a quantum well layer, the molar content of Ga atoms is controlled to be increased from 20% to 40% in the cracking process, the mass centers of Ga atom sets and N atom sets in a multi-quantum well layer can be enabled to coincide, thus a dipole is formed, spontaneous polarization is generated in the material of the layer, a built-in electric field is formed, the built-in electric field can promote the injection of carriers in the quantum well, the quantum confinement Stark effect is reduced, the energy band is enabled to be smooth, and the blue shift of the wavelength is reduced.
4. The invention inserts an In layer behind the InGaN well layerxAlyMg(1-x-y)Layer, Al atom In by linear combination effect of atomic orbitals due to Al atom having lower principal quantum number and wider orbital energy gap than In atomxAlyMg(1-x-y)The "Al-In" bond (or "In-Mg-Al" bond) can increase the forbidden bandwidth of InGaN, promote the ground state In the quantum well to be reduced, and reduce the light-emitting wavelength of the LED to move towards the short wave direction, thereby reducing the blue shift of the wavelength.
5. The invention divides the quantum well structure of the active region into two groups, wherein the thickness of MQWs2 is 1.5 times of the thickness of MQWs1, which can improve the lattice periodicity of epitaxial slice materials and the interface characteristics of materials, thereby improving the performance of the LED, also promoting the overlapping of the central distribution axes of holes and electrons in a multi-quantum well, improving the efficiency of electron-hole transition, and improving the luminous efficiency of the LED chip.
6. According to the invention, the GaN barrier layer is grown by periodically interrupting the Ga source, so that the material growth defects can be effectively reduced, the crystal quality of the key luminescent MQWs2 is improved, and the brightness can be improved by about 1.5% compared with the traditional GaN barrier layer growth method.
Since the method has already been described in detail in the embodiments of the present application, the expanded description of the structure and method corresponding parts related to the embodiments is omitted here, and will not be described again. The description of specific contents in the structure may refer to the contents of the method embodiments, which are not specifically limited herein.
The foregoing description shows and describes several preferred embodiments of the present application, but as aforementioned, it is to be understood that the application is not limited to the forms disclosed herein, but is not to be construed as excluding other embodiments and is capable of use in various other combinations, modifications, and environments and is capable of changes within the scope of the application as described herein, commensurate with the above teachings, or the skill or knowledge of the relevant art. And that modifications and variations may be effected by those skilled in the art without departing from the spirit and scope of the application, which is to be protected by the claims appended hereto.

Claims (8)

1. A manufacturing method of an LED epitaxial wafer suitable for a small-spacing display screen is characterized by sequentially comprising the following steps: treating a substrate, growing a low-temperature GaN buffer layer, growing a non-doped GaN layer, growing an N-type GaN layer doped with Si, growing a multi-quantum well layer, growing an AlGaN electronic barrier layer, growing a P-type GaN layer doped with Mg, cooling,
the growing multiple quantum well layer sequentially comprises: introducing a TMIn source, growing MQWs1 and growing MQWs 2; wherein,
the introducing of the TMIn source specifically comprises the following steps:
controlling the pressure of the reaction cavity at 300-;
the growing MQWs1 includes growing an InGaN well layer and In sequencexAlyMg(1-x-y)The layer is specifically:
keeping the pressure of the reaction cavity unchanged, raising the temperature of the reaction cavity to 900-3TMGa and TMIn, the growth thickness of the In source and the Ga source is interrupted periodically and is D1In the growth process of the InGaN well layer, the time for interrupting and leading the TMIn into the reaction cavity is 6s and 3s respectively, and the time for interrupting and leading the TMGa into the reaction cavity is 10s and 15s respectively;
the pressure of the reaction cavity is kept unchanged, the temperature of the reaction cavity is reduced to 700-720 ℃, and TMIn and Cp are introduced2Mg, TMAl and H2Growing a thickness D on the InGaN well layer2In (2) ofxAlyMg(1-x-y)The value range of x is 0.1-0.2, and the value range of y is 0.3-0.45;
the MQWs2 comprises a GaO layer and a GaN barrier layer which are sequentially grown, and the method specifically comprises the following steps:
keeping the pressure of the reaction cavity unchanged, reducing the temperature of the reaction cavity to 620-640 ℃, and introducing N2And H2As carrier gas, simultaneously introducing NH3TMGa and O2Introducing for 18-28s to allow TMGa and O to be mixed2Cracking, with Ga and O atoms in the crackingSaid InxAlyMg(1-x-y)The layers are bonded to form a thickness D3The molar content of Ga atoms is improved from 20 percent to 40 percent in the cracking process of the GaO layer, and simultaneously, H, N, C atoms which are cracked are conveyed to a tail pipe along with a carrier gas and are discharged out of the reaction chamber;
the temperature of the reaction cavity is increased to 800-820 ℃, the pressure of the reaction cavity is increased to 400-3TMGa and N2Periodically interrupting the growth of the Ga source to a thickness D on the GaO layer4In the growth process of the GaN barrier layer, the time for interrupting the TMGa and the time for introducing the TMGa into the reaction cavity are respectively 8s and 4 s;
wherein D is3+D4=1.5(D1+D2);
The steps of supplying the TMIn source, growing the MQWs1 and growing the MQWs2 are performed periodically in sequence with a period of 2-11 cycles.
2. The method as claimed in claim 1, wherein 100-130L/min H is introduced at 1100 ℃ for the first time2And processing the sapphire substrate for 5-10min by keeping the pressure of the reaction chamber at 100-.
3. The method for manufacturing the LED epitaxial wafer applicable to the small-spacing display screen according to claim 2, wherein the specific process for growing the low-temperature GaN buffer layer is as follows:
cooling to 500-3TMGa of 50-100sccm and H of 100-2Growing a low-temperature GaN buffer layer with the thickness of 20-40nm on the sapphire substrate;
raising the temperature to 1000-3And H of 100-2And preserving the heat for 300-500s to etch the low-temperature GaN buffer layer into an irregular island shape.
4. The method for manufacturing the LED epitaxial wafer applicable to the small-spacing display screen according to claim 1, wherein the specific process for growing the non-doped GaN layer is as follows:
raising the temperature to 1000-3200-400sccm TMGa and 100-130L/min H2And continuously growing the 2-4 mu m undoped GaN layer.
5. The method for manufacturing the LED epitaxial wafer applicable to the small-spacing display screen according to claim 1, wherein the specific process for growing the Si-doped N-type GaN layer is as follows:
the pressure of the reaction chamber is kept at 300-3200-400sccm TMGa, 100-130L/min H2And 20-50sccm SiH4Continuously growing a 3-4 μm Si-doped N-type GaN layer, wherein the doping concentration of Si is 5E18-1E19atoms/cm3
6. The method for manufacturing the LED epitaxial wafer applicable to the small-spacing display screen according to claim 1, wherein the specific process for growing the AlGaN electron blocking layer is as follows:
introducing NH of 50000-70000sccm at the temperature of 900-950 ℃ and the pressure of the reaction chamber of 200-400mbar3TMGa 30-60sccm, H100-130L/min2100-TMAl of 130sccm and 1000-Cp of 1300sccm2Growing the AlGaN electron barrier layer under the condition of Mg, wherein the thickness of the AlGaN layer is 40-60nm, and the doping concentration of Mg is 1E19-1E20atoms/cm3
7. The method for manufacturing the LED epitaxial wafer applicable to the small-spacing display screen in the claim 1 is characterized in that the specific process for growing the Mg-doped P-type GaN layer is as follows:
keeping the pressure of the reaction cavity at 400-320-100sccm of TMGa, 100-2And 1000-Cp of 3000sccm2Mg, continuously growing a P-type GaN layer doped with Mg with the concentration of 50-200nm, wherein the doping concentration of Mg is 1E19-1E20atoms/cm3
8. The method for manufacturing the LED epitaxial wafer suitable for the small-spacing display screen according to claim 1, wherein the specific process of cooling down is as follows:
cooling to 650 plus 680 ℃, preserving the temperature for 20-30min, closing the heating system and the gas supply system, and cooling along with the furnace.
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