CN112941490A - LED epitaxial quantum well growth method - Google Patents

LED epitaxial quantum well growth method Download PDF

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CN112941490A
CN112941490A CN202110117461.7A CN202110117461A CN112941490A CN 112941490 A CN112941490 A CN 112941490A CN 202110117461 A CN202110117461 A CN 202110117461A CN 112941490 A CN112941490 A CN 112941490A
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quantum well
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CN112941490B (en
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徐平
周孝维
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Xiangneng Hualei Optoelectrical Co Ltd
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Xiangneng Hualei Optoelectrical Co Ltd
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Abstract

The application discloses a method for growing an LED epitaxial quantum well, which sequentially comprises the following steps: processing substrate, growing low-temperature GaN buffer layer, growing non-doped GaN layer, growing Si-dopedThe method comprises the steps of growing an N-type GaN layer, growing a multi-quantum well layer, growing an AlGaN electronic barrier layer, growing a P-type GaN layer doped with Mg, and cooling, wherein the step of growing the multi-quantum well layer sequentially comprises the steps of carrying out In doping pretreatment, growing an InGaN well layer and Ga2O3Pre-growth of Ga2O3Layer, annealing treatment, In growthxAlyMg(1‑x‑y‑z)NzAnd growing a GaN barrier layer. The invention adopts a new method for growing the multiple quantum well layer to improve the quality of the quantum well material, in particular to improve the lattice periodicity of an epitaxial wafer material and the interface characteristic of the material, thereby improving the performance of the LED.

Description

LED epitaxial quantum well growth method
Technical Field
The invention belongs to the technical field of LEDs, and particularly relates to a growing method of an LED epitaxial quantum well.
Background
A Light-Emitting Diode (LED) is a semiconductor electronic device that converts electrical energy into optical energy. When current flows through the LED, electrons and holes in the LED are recombined in the multiple quantum wells to emit monochromatic light. As a novel efficient, environment-friendly and green solid-state lighting source, the LED has the advantages of low voltage, low energy consumption, small size, light weight, long service life, high reliability, rich colors and the like. At present, the scale of domestic LED production is gradually enlarged, but the LED still has the problem of low performance, and the energy-saving effect of the LED is influenced.
The LED epitaxial InGaN/GaN multi-quantum well material prepared by the existing LED multi-quantum well growth method is low in quality, the improvement of LED performance is seriously hindered, and the energy-saving effect of an LED is influenced.
In conclusion, a new method for growing the epitaxial quantum well of the LED is urgently needed to be developed, so as to solve the problem that the existing material for the multiple quantum well of the LED is not high in growth quality, and thus, the performance of the LED is improved.
Disclosure of Invention
The invention adopts a new method for growing the multiple quantum well layer to improve the quality of the quantum well material, in particular to improve the lattice periodicity of an epitaxial wafer material and the interface characteristic of the material, thereby improving the performance of the LED.
The LED epitaxial quantum well growth method sequentially comprises the following steps: processing a substrate, growing a low-temperature GaN buffer layer, growing a non-doped GaN layer, growing an N-type GaN layer doped with Si, growing a multi-quantum well layer, growing an AlGaN electronic barrier layer, growing a P-type GaN layer doped with Mg, and cooling; wherein growing the multiple quantum well layer sequentially comprises: in doping pretreatment, growing InGaN well layer and Ga2O3Pre-growth of Ga2O3Layer, annealing treatment, In growthxAlyMg(1-x-y-z)NzLayer and growth GaN barrier layer, the concrete steps are:
A. controlling the pressure of the reaction cavity at 200-280mbar, controlling the temperature of the reaction cavity at 700 ℃, and introducing NH3And TMIn, carrying out In-doping pretreatment for 10-20 seconds, and controlling the temperature to be uniformly increased from 700 ℃ to 760 ℃ In the In-doping pretreatment process;
B. keeping the pressure of the reaction cavity unchanged, raising the temperature of the reaction cavity to 800-3TMGa and TMIn, and growing an InGaN well layer with the thickness of 3-5 nm;
C. keeping the pressure of the reaction cavity unchanged, reducing the temperature of the reaction cavity to 660-680 ℃, and introducing NH3、TMGa、O2And N2Ga is carried out for 30-40 seconds2O3Pre-growing, wherein the molar content of O atoms is uniformly increased from 5% to 10% in the pre-growing process;
D. keeping the pressure of the reaction cavity unchanged, raising the temperature of the reaction cavity to 900-950 ℃, and introducing NH3、TMGa、O2And N2Growing Ga with a thickness of 10-15nm2O3A layer;
E. keeping the pressure of the reaction cavity unchanged, reducing the temperature of the reaction cavity to 650-680 ℃, and introducing O2And N2Annealing for 60-80S with the flow ratio of the introduced gas being N2:O2＝100:30sccm；
F. The temperature of the reaction chamber is increased to 850 ℃, the pressure of the reaction chamber is increased to 300mbar, NH is introduced3、TMIn、Cp2Mg, TMAl and N2Growing 10-15nm of InxAlyMg(1-x-y-z)NzThe value range of x is 0.08-0.2, the value range of y is 0.15-0.40, the value range of z is 0.1-0.2, and the doping concentration of Mg is controlled to be 2E21atom/cm firstly in the growth process3Uniformly reduced to 1E20atom/cm3And then 1E20atom/cm3Uniformly increased to 1E22atom/cm3；
G. The temperature is reduced to 700 ℃, the pressure of the reaction cavity is kept at 300-320-100sccm of TMGa and 100-130L/min of N2Growing a 10nm GaN barrier layer;
repeating the steps A-G, periodically and sequentially carrying out In-doping pretreatment, growing an InGaN well layer and Ga2O3Pre-growth of Ga2O3Layer, annealing treatment, In growthxAlyMg(1-x-y-z)NzAnd growing the GaN barrier layer, wherein the cycle number is 2-12.
Preferably, the specific process for processing the substrate is as follows:
at the temperature of 1000-1100 ℃, 100-130L/min H is introduced2And processing the sapphire substrate for 5-10min by keeping the pressure of the reaction chamber at 100-.
Preferably, the specific process for growing the low-temperature GaN buffer layer is as follows:
cooling to 500-3TMGa of 50-100sccm and H of 100-2Growing a low-temperature GaN buffer layer with the thickness of 20-40nm on the sapphire substrate;
raising the temperature to 1000-3And H of 100-2And preserving the heat for 300-500s to etch the low-temperature GaN buffer layer into an irregular island shape.
Preferably, the specific process for growing the undoped GaN layer is as follows:
raising the temperature to 1000-3200-400sccm TMGa and 100-130L/min H2And continuously growing the 2-4 mu m undoped GaN layer.
Preferably, the specific process for growing the Si-doped GaN layer is as follows:
the pressure of the reaction chamber is kept at 300-3200-400sccm TMGa, 100-130L/min H2And 20-50sccm SiH4Continuously growing a 3m-4 μm Si-doped N-type GaN layer, wherein the Si doping concentration is 5E18-5E19atoms/cm3。
Preferably, the specific process for growing the AlGaN electron blocking layer is as follows:
introducing NH of 50000-70000sccm at the temperature of 900-950 ℃ and the pressure of the reaction chamber of 200-400mbar3TMGa 30-60sccm, H100-130L/min2100 TMAl with 130sccm, 1000 Cp with 1300sccm2Growing the AlGaN electron barrier layer under the condition of Mg, wherein the thickness of the AlGaN layer is 40-60nm, and the Mg doping concentration is 1E19-1E20atoms/cm3。
Preferably, the specific process for growing the Mg-doped P-type GaN layer is as follows:
keeping the pressure of the reaction cavity at 400-320-100sccm of TMGa, 100-2And 1000-Cp of 3000sccm2Mg, continuously growing a P-type GaN layer doped with Mg with the concentration of 50-200nm, wherein the doping concentration of Mg is 1E19-1E20atoms/cm3。
Preferably, the specific process of cooling down is as follows:
cooling to 650 plus 680 ℃, preserving the temperature for 20-30min, closing the heating system and the gas supply system, and cooling along with the furnace.
Compared with the traditional growth method, the LED epitaxial quantum well growth method achieves the following effects:
1. in the growth process of the multi-quantum well layer, In doping pretreatment is firstly carried out, so that the surface of a GaN potential barrier is rough, the growth of an InGaN potential well is influenced, the transverse growth of InGaN is inhibited, the three-dimensional growth of the InGaN is promoted, the number of quantum dots In the InGaN is increased, and the luminous efficiency of an LED chip is improved. The temperature is controlled to be uniformly increased In the In doping pretreatment process, so that In atoms are prevented from being gathered to form metal droplets In the InGaN growth process, more In atoms are made to participate In atomic bonds and reactions, and the growth quality of the material can be effectively improved.
2. The multiple quantum well layer of the invention regrows Ga after growing InGaN well layer2O3Layer capable of increasing the number of electrons in the active region of quantum well, increasing the overlap integral of wave functions of electrons and holes, and increasing the recombination of electrons and holesEfficiency, the internal quantum efficiency of the LED is improved. Growing Ga2O3Ga before layer2O3The layer is pre-grown, and the molar content of O atoms is uniformly increased in the process, so that the subsequent growth of Ga is promoted2O3The film quality of the layer can be changed, the surface appearance of the material can be changed, the surface mobility of In atoms can be improved, the optical quality can be improved, and therefore the luminous efficiency of the LED can be improved. By annealing, Ga can be increased2O3Light transmittance of the layer, Ga is reduced2O3The resistance of the layer, and thus more conducive to spreading the current.
3. In is inserted into the multi-quantum well layer before the GaN barrier layer is grownxAlyMg(1-x-y-z)NzThe layer can obviously improve the lattice periodicity and the material interface characteristics of the epitaxial wafer material, thereby improving the performance of the LED. By uniformly reducing and then uniformly increasing the doping concentration of Mg, the distribution central axes of holes and electrons in the multiple quantum wells can be overlapped, and the efficiency of transition from the electrons to the holes is improved, so that the luminous efficiency of the LED chip is improved.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the invention and not to limit the invention. In the drawings:
FIG. 1 is a schematic structural diagram of an LED epitaxy prepared by the method of the present invention;
FIG. 2 is a schematic structural diagram of an LED epitaxy prepared by a conventional method;
the GaN-based light-emitting diode comprises a sapphire substrate 1, a low-temperature GaN buffer layer 2, a non-doped GaN layer 3, an N-type GaN layer 4, a multi-quantum well layer 5, an AlGaN electron barrier layer 6, a P-type GaN layer 7, an InGaN well layer 51, an InGaN well layer 52 and Ga2O3Layer, 53, InxAlyMg(1-x-y-z)NzLayer 54, GaN barrier layer.
Detailed Description
As used in the specification and in the claims, certain terms are used to refer to particular components. As one skilled in the art will appreciate, manufacturers may refer to a component by different names. This specification and claims do not intend to distinguish between components that differ in name but not function. In the following description and in the claims, the terms "include" and "comprise" are used in an open-ended fashion, and thus should be interpreted to mean "include, but not limited to. "substantially" means within an acceptable error range, and a person skilled in the art can solve the technical problem within a certain error range to substantially achieve the technical effect. The description which follows is a preferred embodiment of the present application, but is made for the purpose of illustrating the general principles of the application and not for the purpose of limiting the scope of the application. The protection scope of the present application shall be subject to the definitions of the appended claims.
Furthermore, the present description does not limit the components and method steps disclosed in the claims to those of the embodiments. In particular, the dimensions, materials, shapes, structural and adjacent orders, manufacturing methods, and the like of the components described in the embodiments are merely illustrative examples, and the scope of the present invention is not limited thereto, unless otherwise specified. The sizes and positional relationships of the structural members shown in the drawings are exaggerated for clarity of illustration.
The present application will be described in further detail below with reference to the accompanying drawings, but the present application is not limited thereto.
Example 1
In this embodiment, the LED epitaxial quantum well growth method provided by the present invention is adopted, MOCVD is adopted to grow GaN-based LED epitaxial wafer, and high purity H is adopted2Or high purity N2Or high purity H2And high purity N2The mixed gas of (2) is used as a carrier gas, high-purity NH3As the N source, a metal organic source, trimethyl gallium (TMGa) as the gallium source, trimethyl indium (TMIn) as the indium source, and an N-type dopant, Silane (SiH)4) Trimethylaluminum (TMAl) as the aluminum source and magnesium diclomelate (CP) as the P-type dopant2Mg), the reaction pressure is between 70mbar and 600 mbar. The specific growth method is as follows (please refer to fig. 1 for the epitaxial structure):
the LED epitaxial quantum well growth method sequentially comprises the following steps: processing a sapphire substrate 1, growing a low-temperature GaN buffer layer 2, growing a non-doped GaN layer 3, growing an N-type GaN layer 4 doped with Si, growing a multi-quantum well layer 5, growing an AlGaN electronic barrier layer 6 and growing a P-type GaN layer 7 doped with Mg, and cooling; wherein,
step 1: the sapphire substrate 1 is processed.
Specifically, the step 1 further includes:
introducing 100-130L/min H at the temperature of 1000-1100 ℃ and the pressure of the reaction cavity of 100-300mbar2The sapphire substrate was processed for 5 to 10 minutes under the conditions of (1).
Step 2: and growing the low-temperature GaN buffer layer 2, and forming irregular islands on the low-temperature GaN buffer layer 2.
Specifically, the step 2 further includes:
introducing 10000-20000sccm NH into the reaction chamber at the temperature of 500-600 ℃ and the pressure of 300-600mbar3TMGa 50-100sccm, H100-130L/min2Growing the low-temperature GaN buffer layer 2 on the sapphire substrate 1 under the condition (1), wherein the thickness of the low-temperature GaN buffer layer 2 is 20-40 nm;
introducing NH of 30000-40000sccm at the temperature of 1000-1100 ℃ and the pressure of the reaction chamber of 300-600mbar3And H of 100-2Under the condition of (1), keeping the temperature for 300-.
And step 3: an undoped GaN layer 3 is grown.
Specifically, the step 3 further includes:
introducing NH of 30000-40000sccm at the temperature of 1000-1200 ℃ and the pressure of the reaction chamber of 300-600mbar3200-400sccm TMGa and 100-130L/min H2The non-doped GaN layer 3 grown under the condition of (a); the thickness of the undoped GaN layer 3 is 2-4 μm.
And 4, step 4: a Si doped N-type GaN layer 4 is grown.
Specifically, the step 4 is further:
the pressure of the reaction cavity is kept at 300-,NH with the flow rate of 30000-3200-400sccm TMGa, 100-130L/min H2And 20-50sccm SiH4Continuously growing a 3-4 μm Si-doped N-type GaN layer 4 in which the Si doping concentration is 5E18-1E19atoms/cm3。
And 5: the multiple quantum well layer 5 is grown.
The multiple quantum well layer 5 is further grown by:
A. controlling the pressure of the reaction cavity at 200-280mbar, controlling the temperature of the reaction cavity at 700 ℃, and introducing NH3And TMIn, carrying out In-doping pretreatment for 10-20 seconds, and controlling the temperature to be uniformly increased from 700 ℃ to 760 ℃ In the In-doping pretreatment process;
B. keeping the pressure of the reaction cavity unchanged, raising the temperature of the reaction cavity to 800-3An InGaN well layer 51 grown to a thickness of 3-5 nm;
C. keeping the pressure of the reaction cavity unchanged, reducing the temperature of the reaction cavity to 660-680 ℃, and introducing NH3、TMGa、O2And N2Ga is carried out for 30-40 seconds2O3Pre-growing, wherein the molar content of O atoms is uniformly increased from 5% to 10% in the pre-growing process;
D. keeping the pressure of the reaction cavity unchanged, raising the temperature of the reaction cavity to 900-950 ℃, and introducing NH3、TMGa、O2And N2Growing Ga with a thickness of 10-15nm2O3A layer 52;
E. keeping the pressure of the reaction cavity unchanged, reducing the temperature of the reaction cavity to 650-680 ℃, and introducing O2And N2Annealing for 60-80S with the flow ratio of the introduced gas being N2:O2＝100:30sccm；
F. The temperature of the reaction chamber is increased to 850 ℃, the pressure of the reaction chamber is increased to 300mbar, NH is introduced3、TMIn、Cp2Mg, TMAl and N2Growing 10-15nm of InxAlyMg(1-x-y-z)NzThe layer 53, x ranges from 0.08 to 0.2, y ranges from 0.15 to 0.40, z ranges from 0.1 to 0.2, and the doping concentration of Mg is controlled to be 2E21atom/cm firstly in the growth process3Uniformly reduced to 1E20atom/cm3And then 1E20atom/cm3Uniformly increased to 1E22atom/cm3；
G. The temperature is reduced to 700 ℃, the pressure of the reaction cavity is kept at 300-320-100sccm of TMGa and 100-130L/min of N2Growing a 10nm GaN barrier layer 54;
repeating the steps A-G, periodically and sequentially carrying out In-doping pretreatment, growing an InGaN well layer 51 and Ga2O3Pre-growth of Ga2O3Layer 52, anneal, grow InxAlyMg(1-x-y-z)NzThe number of cycles of the layer 53 and the step of growing the GaN barrier layer 54 is 2-12.
Step 6: an AlGaN electron blocking layer 6 is grown.
Specifically, the step 6 further includes:
introducing NH of 50000-70000sccm at the temperature of 900-950 ℃ and the pressure of the reaction chamber of 200-400mbar3TMGa 30-60sccm, H100-130L/min2100-TMAl of 130sccm and 1000-Cp of 1300sccm2Growing the AlGaN electron barrier layer 6 under the condition of Mg, wherein the thickness of the AlGaN layer 6 is 40-60nm, and the Mg doping concentration is 1E19-1E20atoms/cm3。
And 7: a P-type GaN layer 7 doped with Mg is grown.
Specifically, the step 7 is further:
introducing NH of 50000-70000sccm at the temperature of 950-1000 ℃ and the pressure of the reaction chamber of 400-900mbar320-100sccm of TMGa, 100-21000-Cp of 3000sccm2Growing a P-type GaN layer 7 doped with Mg with a thickness of 50-200nm under the condition of Mg, wherein the Mg doping concentration is 1E19-1E20atoms/cm3。
And 8: keeping the temperature for 20-30min at 650-680 ℃, then closing the heating system and the gas supply system, and cooling along with the furnace.
Example 2
A comparative example, a method for growing a conventional LED epitaxial structure, is provided below (see fig. 2 for an epitaxial structure).
Step 1: introducing 100-130L/min H at the temperature of 1000-1100 ℃ and the pressure of the reaction cavity of 100-300mbar2The sapphire substrate was processed for 5 to 10 minutes under the conditions of (1).
Step 2: and growing the low-temperature GaN buffer layer 2, and forming irregular islands on the low-temperature GaN buffer layer 2.
Specifically, the step 2 further includes:
introducing 10000-20000sccm NH into the reaction chamber at the temperature of 500-600 ℃ and the pressure of 300-600mbar3TMGa 50-100sccm, H100-130L/min2Growing the low-temperature GaN buffer layer 2 on the sapphire substrate 1 under the condition (1), wherein the thickness of the low-temperature GaN buffer layer 2 is 20-40 nm;
introducing NH of 30000-40000sccm at the temperature of 1000-1100 ℃ and the pressure of the reaction chamber of 300-600mbar3100-130L/min H2Under the condition of (1), keeping the temperature for 300-.
And step 3: an undoped GaN layer 3 is grown.
Specifically, the step 3 further includes:
introducing NH of 30000-40000sccm at the temperature of 1000-1200 ℃ and the pressure of the reaction chamber of 300-600mbar3200-400sccm TMGa and 100-130L/min H2Under the conditions of (a), growing the undoped GaN layer; the thickness of the undoped GaN layer 3 is 2-4 μm.
And 4, step 4: a Si doped N-type GaN layer 4 is grown.
Specifically, the step 4 is further:
introducing NH of 30000-60000sccm at the temperature of 1000-1200 ℃ and the pressure of the reaction chamber of 300-600mbar3200-400sccm TMGa, 100-130L/min H220-50sccm SiH4Under the conditions of (1) growing a Si-doped N-type GaN layer 4, the thickness of the N-type GaN layer 4 being 3-4 μm, the concentration of Si doping being 5E18-1E19atoms/cm3。
And 5: an InGaN/GaN MQW layer 5 is grown.
Specifically, the multiple quantum well layer 5 is further grown by:
keeping the pressure of the reaction cavity at 300-320-40sccm of TMGa, 10000-2Growing an In-doped InGaN well layer 51 with a thickness of 3 nm;
raising the temperature to 800 ℃, keeping the pressure of the reaction cavity at 300-320-100sccm of TMGa and 100-130L/min of N2Growing a 10nm GaN barrier layer 54;
and repeatedly and alternately growing the InGaN well layer 51 and the GaN barrier layer 54 to obtain the InGaN/GaN multi-quantum well light-emitting layer, wherein the number of the alternate growth cycles of the InGaN well layer 51 and the GaN barrier layer 54 is 7-13.
Step 6: an AlGaN electron blocking layer 6 is grown.
Specifically, the step 6 further includes:
introducing NH of 50000-70000sccm at the temperature of 900-950 ℃ and the pressure of the reaction chamber of 200-400mbar3TMGa 30-60sccm, H100-130L/min2100 TMAl with 130sccm, 1000 Cp with 1300sccm2Growing the AlGaN electron barrier layer 6 under the condition of Mg, wherein the thickness of the AlGaN layer 6 is 40-60nm, and the Mg doping concentration is 1E19-1E20atoms/cm3。
And 7: a P-type GaN layer 7 doped with Mg is grown.
Specifically, the step 7 is further:
introducing NH of 50000-70000sccm at the temperature of 950-1000 ℃ and the pressure of the reaction chamber of 400-900mbar320-100sccm of TMGa, 100-21000-Cp of 3000sccm2Growing a P-type GaN layer 7 doped with Mg with a thickness of 50-200nm under the condition of Mg, wherein the Mg doping concentration is 1E19-1E20atoms/cm3。
And 8: keeping the temperature for 20-30min at 650-680 ℃, then closing the heating system and the gas supply system, and cooling along with the furnace.
Samples 1 and 2 were prepared according to the above examples 1 and 2, respectively, and samples 1 and 2 were coated with an ITO layer of about 150nm under the same pre-process conditions, and were identicalPlating Cr/Pt/Au electrode about 1500nm under the same condition, and plating protective layer SiO under the same condition2About 100nm, the sample was then ground and cut under the same conditions into 635 μm by 635 μm (25mil by 25mil) chip particles, and then 1000 dies were individually picked at the same position for sample 1 and sample 2, and packaged into a white LED under the same packaging process. The photoelectric properties of sample 1 and sample 2 were tested using an integrating sphere at a drive current of 350 mA.
TABLE 1 comparison of electrical parameters of sample 1 and sample 2
Figure BDA0002921256070000101
The data obtained by the integrating sphere are analyzed and compared, and as can be seen from table 1, the luminous efficiency of the LED (sample 1) prepared by the LED epitaxial quantum well growth method provided by the invention is obviously improved, and the electrical parameters of other LEDs such as voltage, reverse voltage, leakage, antistatic ability and the like become better, because the technical scheme of the patent improves the quality of epitaxial wafer materials, the luminous efficiency of the LED is improved, and the photoelectric properties of other LEDs are improved.
The LED epitaxial quantum well growth method achieves the following effects:
1. in the growth process of the multi-quantum well layer, In doping pretreatment is firstly carried out, so that the surface of a GaN potential barrier is rough, the growth of an InGaN potential well is influenced, the transverse growth of InGaN is inhibited, the three-dimensional growth of the InGaN is promoted, the number of quantum dots In the InGaN is increased, and the luminous efficiency of an LED chip is improved. The temperature is controlled to be uniformly increased In the In doping pretreatment process, so that In atoms are prevented from being gathered to form metal droplets In the InGaN growth process, more In atoms are made to participate In atomic bonds and reactions, and the growth quality of the material can be effectively improved.
2. The multiple quantum well layer of the invention regrows Ga after growing InGaN well layer2O3The layer can increase the quantity of quantum well active region electrons, improves the overlapping integral of electron and hole wave functions, improves the recombination efficiency of electrons and holes, and improves the internal quantum efficiency of the LED. Growing Ga2O3Ga before layer2O3The layer is pre-grown, and the molar content of O atoms is uniformly increased in the process, so that the subsequent growth of Ga is promoted2O3The film quality of the layer can be changed, the surface appearance of the material can be changed, the surface mobility of In atoms can be improved, the optical quality can be improved, and therefore the luminous efficiency of the LED can be improved. By annealing, Ga can be increased2O3Light transmittance of the layer, Ga is reduced2O3The resistance of the layer, and thus more conducive to spreading the current.
3. In is inserted into the multi-quantum well layer before the GaN barrier layer is grownxAlyMg(1-x-y-z)NzThe layer can obviously improve the lattice periodicity and the material interface characteristics of the epitaxial wafer material, thereby improving the performance of the LED. By uniformly reducing and then uniformly increasing the doping concentration of Mg, the distribution central axes of holes and electrons in the multiple quantum wells can be overlapped, and the efficiency of transition from the electrons to the holes is improved, so that the luminous efficiency of the LED chip is improved.
Since the method has already been described in detail in the embodiments of the present application, the expanded description of the structure and method corresponding parts related to the embodiments is omitted here, and will not be described again. The description of specific contents in the structure may refer to the contents of the method embodiments, which are not specifically limited herein.
The foregoing description shows and describes several preferred embodiments of the present application, but as aforementioned, it is to be understood that the application is not limited to the forms disclosed herein, but is not to be construed as excluding other embodiments and is capable of use in various other combinations, modifications, and environments and is capable of changes within the scope of the application as described herein, commensurate with the above teachings, or the skill or knowledge of the relevant art. And that modifications and variations may be effected by those skilled in the art without departing from the spirit and scope of the application, which is to be protected by the claims appended hereto.

Claims (8)

1. An LED epitaxial quantum well growth method sequentially comprises the following steps: processing a substrate, growing a low-temperature GaN buffer layer, growing a non-doped GaN layer, growing a Si-doped N-type GaN layer, growing a multi-quantum well layer, and growing AlA GaN electron blocking layer, a P-type GaN layer doped with Mg is grown, and the temperature is reduced and cooled; wherein growing the multiple quantum well layer comprises, in order: in doping pretreatment, growing InGaN well layer and Ga2O3Pre-growth of Ga2O3Layer, annealing treatment, In growthxAlyMg(1-x-y-z)NzLayer and growth GaN barrier layer, the concrete steps are:
A. controlling the pressure of the reaction cavity at 200-280mbar, controlling the temperature of the reaction cavity at 700 ℃, and introducing NH3And TMIn, carrying out In-doping pretreatment for 10-20 seconds, and controlling the temperature to be uniformly increased from 700 ℃ to 760 ℃ In the In-doping pretreatment process;
B. keeping the pressure of the reaction cavity unchanged, raising the temperature of the reaction cavity to 800-3TMGa and TMIn, and growing an InGaN well layer with the thickness of 3-5 nm;
C. keeping the pressure of the reaction cavity unchanged, reducing the temperature of the reaction cavity to 660-680 ℃, and introducing NH3、TMGa、O2And N2Ga is carried out for 30-40 seconds2O3Pre-growing, wherein the molar content of O atoms is uniformly increased from 5% to 10% in the pre-growing process;
D. keeping the pressure of the reaction cavity unchanged, raising the temperature of the reaction cavity to 900-950 ℃, and introducing NH3、TMGa、O2And N2Growing Ga with a thickness of 10-15nm2O3A layer;
E. keeping the pressure of the reaction cavity unchanged, reducing the temperature of the reaction cavity to 650-680 ℃, and introducing O2And N2Annealing for 60-80S with the flow ratio of the introduced gas being N2:O2＝100:30sccm；
F. The temperature of the reaction chamber is increased to 850 ℃, the pressure of the reaction chamber is increased to 300mbar, NH is introduced3、TMIn、Cp2Mg, TMAl and N2Growing 10-15nm of InxAlyMg(1-x-y-z)NzThe value range of x is 0.08-0.2, the value range of y is 0.15-0.40, the value range of z is 0.1-0.2, and the doping concentration of Mg is controlled to be 2E21atom/cm firstly in the growth process3The uniformity change is reduced to 1E20atom/cm3Then from 1 toE20atom/cm3Increase to 1E22atom/cm uniformly3；
G. The temperature is reduced to 700 ℃, the pressure of the reaction cavity is kept at 300-320-100sccm of TMGa and 100-130L/min of N2Growing a 10nm GaN barrier layer;
repeating the steps A-G, periodically and sequentially carrying out In-doping pretreatment, growing an InGaN well layer and Ga2O3Pre-growth of Ga2O3Layer, annealing treatment, In growthxAlyMg(1-x-y-z)NzAnd growing the GaN barrier layer, wherein the cycle number is 2-12.
2. The LED epitaxial quantum well growth method of claim 1, wherein 100-2And processing the sapphire substrate for 5-10min by keeping the pressure of the reaction chamber at 100-.
3. The LED epitaxial quantum well growth method according to claim 2, wherein the specific process for growing the low-temperature GaN buffer layer is as follows:
cooling to 500-3TMGa of 50-100sccm and H of 100-2Growing a low-temperature GaN buffer layer with the thickness of 20-40nm on the sapphire substrate;
raising the temperature to 1000-3And H of 100-2And preserving the heat for 300-500s to etch the low-temperature GaN buffer layer into an irregular island shape.
4. The LED epitaxial quantum well growth method according to claim 1, wherein the specific process of growing the undoped GaN layer is as follows:
raising the temperature to 1000-3200-400sccm TMGa and 100-130L/min H2And continuously growing the 2-4 mu m undoped GaN layer.
5. The LED epitaxial quantum well growth method according to claim 1, wherein the specific process for growing the Si-doped N-type GaN layer is as follows:
the pressure of the reaction chamber is kept at 300-3200-400sccm TMGa, 100-130L/min H2And 20-50sccm SiH4Continuously growing a 3-4 μm Si-doped N-type GaN layer, wherein the doping concentration of Si is 5E18-1E19atoms/cm3。
6. The LED epitaxial quantum well growth method according to claim 1, wherein the specific process for growing the AlGaN electron blocking layer is as follows:
introducing NH of 50000-70000sccm at the temperature of 900-950 ℃ and the pressure of the reaction chamber of 200-400mbar3TMGa 30-60sccm, H100-130L/min2100-TMAl of 130sccm and 1000-Cp of 1300sccm2Growing the AlGaN electron barrier layer under the condition of Mg, wherein the thickness of the AlGaN layer is 40-60nm, and the doping concentration of Mg is 1E19-1E20atoms/cm3。
7. The LED epitaxial quantum well growth method according to claim 1, wherein the specific process for growing the Mg-doped P-type GaN layer is as follows:
keeping the pressure of the reaction cavity at 400-320-100sccm of TMGa, 100-2And 1000-Cp of 3000sccm2Mg, continuously growing a P-type GaN layer doped with Mg with the concentration of 50-200nm, wherein the doping concentration of Mg is 1E19-1E20atoms/cm3。
8. The LED epitaxial quantum well growth method according to claim 1, wherein the specific cooling process comprises:
cooling to 650 plus 680 ℃, preserving the temperature for 20-30min, closing the heating system and the gas supply system, and cooling along with the furnace.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113540296A (en) * 2021-07-20 2021-10-22 湘能华磊光电股份有限公司 Manufacturing method of LED epitaxial wafer suitable for small-spacing display screen
CN116014041A (en) * 2023-03-23 2023-04-25 江西兆驰半导体有限公司 Light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5210051A (en) * 1990-03-27 1993-05-11 Cree Research, Inc. High efficiency light emitting diodes from bipolar gallium nitride
WO2011024385A1 (en) * 2009-08-24 2011-03-03 パナソニック株式会社 Gallium nitride compound semiconductor light-emitting device
WO2012029292A1 (en) * 2010-08-31 2012-03-08 住友化学株式会社 Semiconductor substrate, insulated gate field effect transistor, and method for manufacturing semiconductor substrate
CN208655681U (en) * 2018-07-26 2019-03-26 广东省半导体产业技术研究院 A kind of deep ultraviolet LED structure
CN110629197A (en) * 2019-09-24 2019-12-31 湘能华磊光电股份有限公司 LED epitaxial structure growth method
KR20200046624A (en) * 2018-10-25 2020-05-07 한국세라믹기술원 MANUFACTURING METHOD OF α-Ga2O3 THIN FILM GROWN BY PULSE MODE USING HALIDE VAPOR PHASE EPITAXY GROWTH
CN111952420A (en) * 2020-08-21 2020-11-17 湘能华磊光电股份有限公司 LED epitaxial growth method suitable for manufacturing small-spacing display screen
CN112687770A (en) * 2020-12-24 2021-04-20 湘能华磊光电股份有限公司 LED epitaxial growth method

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5210051A (en) * 1990-03-27 1993-05-11 Cree Research, Inc. High efficiency light emitting diodes from bipolar gallium nitride
WO2011024385A1 (en) * 2009-08-24 2011-03-03 パナソニック株式会社 Gallium nitride compound semiconductor light-emitting device
WO2012029292A1 (en) * 2010-08-31 2012-03-08 住友化学株式会社 Semiconductor substrate, insulated gate field effect transistor, and method for manufacturing semiconductor substrate
CN208655681U (en) * 2018-07-26 2019-03-26 广东省半导体产业技术研究院 A kind of deep ultraviolet LED structure
KR20200046624A (en) * 2018-10-25 2020-05-07 한국세라믹기술원 MANUFACTURING METHOD OF α-Ga2O3 THIN FILM GROWN BY PULSE MODE USING HALIDE VAPOR PHASE EPITAXY GROWTH
CN110629197A (en) * 2019-09-24 2019-12-31 湘能华磊光电股份有限公司 LED epitaxial structure growth method
CN111952420A (en) * 2020-08-21 2020-11-17 湘能华磊光电股份有限公司 LED epitaxial growth method suitable for manufacturing small-spacing display screen
CN112687770A (en) * 2020-12-24 2021-04-20 湘能华磊光电股份有限公司 LED epitaxial growth method

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
GIACOMO MICELI等: "Migration of Mg and other interstitial metal dopants in GaN", 《PHYS. STATUS SOLIDI RRL》, vol. 11, no. 7, pages 1 - 5 *

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113540296A (en) * 2021-07-20 2021-10-22 湘能华磊光电股份有限公司 Manufacturing method of LED epitaxial wafer suitable for small-spacing display screen
CN113540296B (en) * 2021-07-20 2024-05-14 湘能华磊光电股份有限公司 Manufacturing method of LED epitaxial wafer suitable for small-space display screen
CN116014041A (en) * 2023-03-23 2023-04-25 江西兆驰半导体有限公司 Light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode
CN116014041B (en) * 2023-03-23 2023-05-23 江西兆驰半导体有限公司 Light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode

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