CN113540296B - Manufacturing method of LED epitaxial wafer suitable for small-space display screen - Google Patents

Manufacturing method of LED epitaxial wafer suitable for small-space display screen Download PDF

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CN113540296B
CN113540296B CN202110820277.9A CN202110820277A CN113540296B CN 113540296 B CN113540296 B CN 113540296B CN 202110820277 A CN202110820277 A CN 202110820277A CN 113540296 B CN113540296 B CN 113540296B
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CN113540296A (en
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徐平
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Xiangneng Hualei Optoelectrical Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H01L27/153Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier

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Abstract

The application discloses a manufacturing method of an LED epitaxial wafer suitable for a small-space display screen, which sequentially comprises the following steps: the method comprises the steps of processing a substrate, growing a low-temperature GaN buffer layer, growing an undoped GaN layer, growing an N-type GaN layer doped with Si, growing a multi-quantum well layer, growing an AlGaN electron blocking layer and growing a P-type GaN layer doped with Mg, and cooling, wherein the growing of the multi-quantum well layer sequentially comprises the steps of introducing a TMIn source, growing MQWs1 and growing MQWs2, the growing of the MQWs1 comprises the steps of sequentially growing an InGaN well layer and an In xAlyMg(1‑x‑y) layer, and the growing of the MQWs2 comprises the steps of sequentially growing a GaO layer and a GaN barrier layer. The application reduces the blue shift of the wavelength and improves the brightness of the LED by adopting a novel manufacturing method of the LED epitaxial wafer, and is particularly suitable for manufacturing a small-space display screen.

Description

Manufacturing method of LED epitaxial wafer suitable for small-space display screen
Technical Field
The invention belongs to the technical field of LEDs, and particularly relates to a manufacturing method of an LED epitaxial wafer suitable for a small-space display screen.
Background
A Light-Emitting Diode (LED) is a semiconductor electronic device that converts electrical energy into Light energy. When current flows through the LED, electrons and holes in the LED are recombined in the multiple quantum wells of the LED to emit monochromatic light. The LED is used as a novel efficient, environment-friendly and green solid-state lighting source, and is widely applied to traffic lights, automobile lights, indoor and outdoor lighting and small-space display screens besides being widely used as indoor and outdoor lighting at present.
In the current LED quantum well growth method, the forbidden bandwidth of the material is limited, the ground state in the quantum well is raised, and the light-emitting wavelength of the LED is easy to move to the short wave direction, namely blue shift occurs. When currents with different magnitudes are injected into the small-space display screen to change the luminous intensity, larger differences can occur in the blue shift quantity of the luminous wavelengths of the LEDs, and the application requirements of the small-space display screen cannot be met.
In view of the above, there is an urgent need to develop a new method for manufacturing an LED chip, which reduces the wavelength blue shift and improves the brightness of the LED, so as to meet the application requirements of the small-pitch display screen.
Disclosure of Invention
The invention reduces the blue shift of the wavelength and improves the brightness of the LED by adopting a novel manufacturing method of the LED epitaxial wafer.
The invention relates to a manufacturing method of an LED epitaxial wafer suitable for a small-space display screen, which sequentially comprises the following steps: treating a substrate, growing a low-temperature GaN buffer layer, growing an undoped GaN layer, growing an N-type GaN layer doped with Si, growing a multi-quantum well layer, growing an AlGaN electron blocking layer, growing a P-type GaN layer doped with Mg, cooling,
The growing multiple quantum well layer sequentially comprises: introducing TMIn source, growing MQWs1 and growing MQWs2; wherein,
The TMIn source is introduced, specifically:
Controlling the pressure of the reaction cavity at 300-320mbar, controlling the temperature of the reaction cavity at 680-700 ℃, and introducing a TMIn source of 600-700sccm for 10-20s;
The growing of the MQWs1 comprises the sequential growth of an InGaN well layer and an In xAlyMg(1-x-y) layer, and specifically comprises the following steps:
The pressure of the reaction cavity is kept unchanged, the temperature of the reaction cavity is increased to 900-950 ℃, NH 3, TMGa and TMIn are introduced, an InGaN well layer with the thickness of D 1 is grown by periodically interrupting an In source and a Ga source, in the growth process of the InGaN well layer, the time for interrupting the TMIn and introducing the reaction cavity is 6s and 3s respectively, and the time for interrupting the TMGa and introducing the reaction cavity is 10s and 15s respectively;
The pressure of the reaction cavity is kept unchanged, the temperature of the reaction cavity is reduced to 700-720 ℃, TMIn, cp 2 Mg, TMAL and H 2 are introduced, an In xAlyMg(1-x-y) layer with the thickness of D 2 is grown on the InGaN well layer, the value range of x is 0.1-0.2, and the value range of y is 0.3-0.45;
the growing of the MQWs2 comprises the steps of sequentially growing a GaO layer and a GaN barrier layer, and specifically comprises the following steps:
Keeping the pressure of the reaction cavity unchanged, reducing the temperature of the reaction cavity to 620-640 ℃, introducing N 2 and H 2 as carrier gas, simultaneously introducing NH 3, TMGa and O 2 for 18-28s, fully cracking TMGa and O 2, combining the cracked Ga and O atoms on the In xAlyMg(1-x-y) layer to generate a GaO layer with the thickness of D 3, increasing the molar content of Ga atoms from 20% to 40% In the cracking process, and simultaneously conveying the cracked H, N, C atoms to a tail pipe along with the carrier gas to be discharged out of the reaction chamber;
Raising the temperature of the reaction cavity to 800-820 ℃, raising the pressure of the reaction cavity to 400-440mbar, introducing NH 3, TMGa and N 2, periodically interrupting a Ga source to grow a GaN barrier layer with the thickness of D 4 on the GaO layer, wherein in the growth process of the GaN barrier layer, the time for interrupting the TMGa and introducing the reaction cavity is 8s and 4s respectively;
wherein D 3+D4=1.5(D1+D2);
the steps of feeding TMIn source, growing MQWs1 and growing MQWs2 are carried out periodically and sequentially, and the number of periods is 2-11.
Preferably, the specific process of processing the substrate is as follows:
And (3) introducing H 2 of 100-130L/min at the temperature of 1000-1100 ℃, maintaining the pressure of the reaction cavity at 100-300mbar, and treating the sapphire substrate for 5-10min.
Preferably, the specific process of growing the low-temperature GaN buffer layer is as follows:
Cooling to 500-600 ℃, maintaining the pressure of the reaction cavity at 300-600mbar, introducing NH 3 with the flow rate of 10000-20000sccm, TMGa with the flow rate of 50-100sccm and H 2 with the flow rate of 100-130L/min, and growing a low-temperature GaN buffer layer with the thickness of 20-40nm on the sapphire substrate;
Raising the temperature to 1000-1100 ℃, maintaining the pressure of the reaction cavity at 300-600mbar, introducing NH 3 with the flow rate of 30000-40000sccm and H 2 with the flow rate of 100-130L/min, preserving heat for 300-500s, and corroding the low-temperature GaN buffer layer into an irregular island shape.
Preferably, the specific process of growing the undoped GaN layer is as follows:
Raising the temperature to 1000-1200 ℃, keeping the pressure of the reaction cavity at 300-600mbar, introducing NH 3 with the flow rate of 30000-40000sccm, TMGa with the flow rate of 200-400sccm and H 2 with the flow rate of 100-130L/min, and continuously growing a 2-4 mu m undoped GaN layer.
Preferably, the specific process of growing the Si-doped GaN layer is as follows:
Maintaining the pressure of the reaction cavity at 300-600mbar, maintaining the temperature at 1000-1200 ℃, introducing NH 3 with the flow rate of 30000-60000sccm, TMGa with the flow rate of 200-400sccm, H 2 with the flow rate of 100-130L/min and SiH 4 with the flow rate of 20-50sccm, and continuously growing an N-type GaN layer doped with Si with the doping concentration of 3m-4 μm, wherein the doping concentration of Si is 5E18-5E19atoms/cm 3.
Preferably, the specific process of growing the AlGaN electron blocking layer is as follows:
and growing the AlGaN electron blocking layer under the conditions of 900-950 ℃ and reaction cavity pressure of 200-400mbar, introducing 50000-70000sccm of NH 3, 30-60sccm of TMGa, 100-130L/min of H 2, 100-130sccm of TMAL and 1000-1300sccm of Cp 2 Mg, wherein the thickness of the AlGaN layer is 40-60nm, and the doping concentration of Mg is 1E19-1E20atoms/cm 3.
Preferably, the specific process of growing the P-type GaN layer doped with Mg is as follows:
Maintaining the pressure of the reaction cavity at 400-900mbar and the temperature at 950-1000 ℃, introducing NH 3 with the flow rate of 50000-70000sccm, TMGa with the flow rate of 20-100sccm, H 2 with the flow rate of 100-130L/min and Cp 2 Mg with the flow rate of 1000-3000sccm, and continuously growing a 50-200nm P-type GaN layer doped with Mg, wherein the doping concentration of Mg is 1E19-1E20atoms/cm 3.
Preferably, the specific process of cooling is as follows:
Cooling to 650-680 deg.C, maintaining the temperature for 20-30min, closing the heating system, closing the gas supply system, and cooling with furnace.
Compared with the traditional growth method, the manufacturing method of the LED epitaxial wafer suitable for the small-space display screen achieves the following effects:
1. According to the invention, the TMIn source is introduced before the InGaN quantum well is grown, so that the rough interface of the InGaN quantum well is repaired, and the formation of defects such as V-shaped pits, in clusters and the like In the InGaN quantum well is inhibited, thereby improving the growth quality of the quantum well.
2. According to the invention, the InGaN well layer is grown by adopting a method of periodically interrupting an In source and a Ga source, so that the luminous intensity of the LED is obviously improved, which can be explained as that In clusters, in drops and the like are easily formed at a growth interface due to insufficient N source In the process of growing the InGaN quantum well by adopting a traditional method, and In the process of interrupting the growth of the In source and the Ga source, the InGaN quantum well layer is thermally decomposed and continuously supplied by the N source, so that the defects of the In clusters, the In drops and the like on the surface are eliminated, the quality of the quantum well is improved, and the photoelectric property of the LED is improved.
3. According to the invention, a cracking method is adopted to introduce a growth GaO layer into a quantum well layer, and the molar content of Ga atoms in the cracking process is controlled to be increased from 20% to 40%, so that the mass centers of Ga atom sets and N atom sets in the multi-quantum well layer are enabled to coincide, a dipole is formed, spontaneous polarization is generated in a layer material, a built-in electric field is formed, the built-in electric field is capable of promoting injection of carriers in the quantum well, reducing the quantum confinement Stark effect, enabling energy bands to be smooth, and reducing wavelength blue shift.
4. According to the invention, an In xAlyMg(1-x-y) layer is inserted behind the InGaN well layer, and because Al atoms have lower main quantum numbers and wider orbit energy gaps than In atoms, an Al-In bond (or an In-Mg-Al bond) can be formed In InGaN xAlyMg(1-x-y) by the linear combination effect of atomic orbitals, so that the forbidden band width of InGaN can be increased, the ground state In the quantum well is promoted to be reduced, the movement of the luminous wavelength of an LED to a short wave direction is reduced, and the blue shift of the wavelength is reduced.
5. The invention divides the active region quantum well structure into two groups, wherein the thickness of MQWs2 is 1.5 times of the thickness of MQWs1, and the lattice periodicity and the material interface characteristic of the epitaxial wafer material can be improved, thereby improving the performance of the LED, and further promoting the overlapping of the distribution central axes of holes and electrons in the multi-quantum well, improving the efficiency of electron-hole transition, and further improving the luminous efficiency of the LED chip.
6. According to the method, the GaN barrier layer is grown by adopting the method of periodically interrupting the Ga source, so that the material growth defect can be effectively reduced, the crystal quality of the critical luminescence MQWs2 is improved, and the method can improve the brightness by about 1.5% compared with the traditional GaN barrier layer growth method.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the invention and do not constitute a limitation on the invention. In the drawings:
FIG. 1 is a schematic diagram of an LED epitaxy structure prepared by the method of the present invention;
fig. 2 is a schematic structural diagram of an LED epitaxy prepared by a conventional method;
The semiconductor device comprises a sapphire substrate, a low-temperature GaN buffer layer, a non-doped GaN layer, a 4-N-type GaN layer, a 5-multiple quantum well layer, a 6-AlGaN electron blocking layer, a 7-P-type GaN layer, a 51-InGaN well layer, a 52-In xAlyMg(1-x-y) layer, a 53-GaO layer, a 54-GaN barrier layer, and a sapphire substrate.
Detailed Description
Certain terms are used throughout the description and claims to refer to particular components. Those of skill in the art will appreciate that a hardware manufacturer may refer to the same component by different names. The description and claims do not take the form of an element differentiated by name, but rather by functionality. As used throughout the specification and claims, the word "comprise" is an open-ended term, and thus should be interpreted to mean "include, but not limited to. By "substantially" is meant that within an acceptable error range, a person skilled in the art is able to solve the technical problem within a certain error range, substantially achieving the technical effect. The description hereinafter sets forth a preferred embodiment for practicing the application, but is not intended to limit the scope of the application, as the description is given for the purpose of illustrating the general principles of the application. The scope of the application is defined by the appended claims.
In addition, the present specification does not limit the components and method steps disclosed in the claims to the components and method steps of the embodiments. In particular, the dimensions, materials, shapes, the structural order, the adjacent order, the manufacturing method, and the like of the structural members described in the embodiments are merely illustrative examples without limiting the scope of the present invention. The size and positional relationship of the structural components shown in the drawings are exaggerated for clarity of illustration.
The present application will be described in further detail below with reference to the drawings, but is not limited thereto.
Example 1
According to the manufacturing method of the LED epitaxial wafer suitable for the small-space display screen, provided by the invention, the GaN-based LED epitaxial wafer is grown by MOCVD, high-purity H 2 or high-purity N 2 or mixed gas of high-purity H 2 and high-purity N 2 is used as carrier gas, high-purity NH 3 is used as an N source, metal organic source trimethylgallium (TMGa) is used as a gallium source, trimethylindium (TMIn) is used as an indium source, N-type dopant is silane (SiH 4), trimethylaluminum (TMAL) is used as an aluminum source, and P-type dopant is magnesium-cyclopentadienyl (CP 2 Mg), wherein the reaction pressure is between 70mbar and 600 mbar. The specific growth mode is as follows (see fig. 1 for epitaxial structure):
the manufacturing method of the LED epitaxial wafer suitable for the small-space display screen sequentially comprises the following steps of: treating a sapphire substrate 1, growing a low-temperature GaN buffer layer 2, growing an undoped GaN layer 3, growing an Si-doped N-type GaN layer 4, growing a multi-quantum well layer 5, growing an AlGaN electron blocking layer 6, growing an Mg-doped P-type GaN layer 7, and cooling; wherein,
Step 1: the sapphire substrate 1 is processed.
Specifically, the step 1 is further that:
The sapphire substrate is processed for 5 to 10 minutes under the conditions that the temperature is 1000 to 1100 ℃, the pressure of a reaction cavity is 100to 300mbar and H 2 of 100to 130L/min is introduced.
Step 2: and growing a low-temperature GaN buffer layer 2, and forming irregular islands on the low-temperature GaN buffer layer 2.
Specifically, the step 2 is further that:
Under the conditions that the temperature is 500-600 ℃, the pressure of a reaction cavity is 300-600mbar, 10000-20000sccm of NH 3, 50-100sccm of TMGa and 100-130L/min of H 2 are introduced, the low-temperature GaN buffer layer 2 is grown on the sapphire substrate 1, and the thickness of the low-temperature GaN buffer layer 2 is 20-40nm;
And under the conditions that the temperature is 1000-1100 ℃, the pressure of a reaction cavity is 300-600mbar, NH 3 with the concentration of 30000-40000sccm and H 2 with the concentration of 100-130L/min are introduced, the temperature is kept for 300-500 seconds, and the irregular islands are formed on the low-temperature GaN buffer layer 2.
Step 3: an undoped GaN layer 3 is grown.
Specifically, the step 3 is further:
The undoped GaN layer 3 is grown under the conditions that the temperature is 1000-1200 ℃, the pressure of a reaction cavity is 300-600mbar, and 30000-40000sccm of NH 3, 200-400sccm of TMGa and 100-130L/min of H 2 are introduced; the thickness of the undoped GaN layer 3 is 2-4 μm.
Step 4: a Si doped N-type GaN layer 4 is grown.
Specifically, the step 4 is further:
The pressure of the reaction cavity is kept at 300-600mbar, the temperature is kept at 1000-1200 ℃, NH 3 with the flow rate of 30000-60000sccm, TMGa with the flow rate of 200-400sccm, H 2 with the flow rate of 100-130L/min and SiH 4 with the flow rate of 20-50sccm are introduced, and an N-type GaN layer 4 doped with Si with the doping concentration of 3-4 μm is continuously grown, wherein the doping concentration of Si is 5E18-1E19atoms/cm 3.
Step 5: a multiple quantum well layer 5 is grown.
The growing multiple quantum well layer sequentially comprises: introducing TMIn source, growing MQWs1 and growing MQWs2; wherein,
The TMIn source is introduced, specifically:
Controlling the pressure of the reaction cavity at 300-320mbar, controlling the temperature of the reaction cavity at 680-700 ℃, and introducing a TMIn source of 600-700sccm for 10-20s;
The growing of the MQWs1 comprises sequentially growing an InGaN well layer 51 and an In xAlyMg(1-x-y) layer 52, specifically:
The pressure of the reaction cavity is kept unchanged, the temperature of the reaction cavity is increased to 900-950 ℃, NH 3, TMGa and TMIn are introduced, an InGaN well layer 51 with the thickness of D 1 is periodically interrupted by an In source and a Ga source, in the growth process of the InGaN well layer 51, the time for interrupting the TMIn and introducing the reaction cavity is 6s and 3s respectively, and the time for interrupting the TMGa and introducing the reaction cavity is 10s and 15s respectively;
The pressure of the reaction cavity is kept unchanged, the temperature of the reaction cavity is reduced to 700-720 ℃, TMIn, cp 2 Mg, TMAL and H 2 are introduced, an In xAlyMg(1-x-y) layer 52 with the thickness of D 2 is grown on the InGaN well layer 51, the value range of x is 0.1-0.2, and the value range of y is 0.3-0.45;
the growing of the MQWs2 comprises the sequential growth of a GaO layer 53 and a GaN barrier layer 54, specifically:
Maintaining the pressure of the reaction cavity unchanged, reducing the temperature of the reaction cavity to 620-640 ℃, introducing N 2 and H 2 as carrier gas, simultaneously introducing NH 3, TMGa and O 2 for 18-28s, fully cracking TMGa and O 2, combining the cracked Ga and O atoms on the In xAlyMg(1-x-y) layer 52 to generate a GaO layer 53 with the thickness of D 3, increasing the molar content of Ga atoms from 20% to 40% In the cracking process, and simultaneously conveying the cracked H, N, C atoms to a tail pipe along with the carrier gas to be discharged out of the reaction chamber;
Raising the temperature of the reaction chamber to 800-820 ℃, raising the pressure of the reaction chamber to 400-440mbar, introducing NH 3, TMGa and N 2, periodically interrupting the Ga source to grow a GaN barrier layer 54 with the thickness of D 4 on the GaO layer 53, wherein the time for interrupting the TMGa and introducing the reaction chamber is 8s and 4s respectively in the growth process of the GaN barrier layer 54;
Wherein d3+d4=1.5 (d1+d2);
the steps of feeding TMIn source, growing MQWs1 and growing MQWs2 are carried out periodically and sequentially, and the number of periods is 2-11.
Step 6: an AlGaN electron blocking layer 6 is grown.
Specifically, the step 6 is further:
The AlGaN electron blocking layer 6 is grown under the conditions that the temperature is 900-950 ℃, the pressure of a reaction cavity is 200-400mbar, NH 3 with the concentration of 50000-70000sccm, TMGa with the concentration of 30-60sccm, H 2 with the concentration of 100-130L/min, TMAL with the concentration of 100-130sccm and Cp 2 Mg with the concentration of 1000-1300sccm are introduced, the thickness of the AlGaN layer 6 is 40-60nm, and the doping concentration of Mg is 1E19-1E20atoms/cm 3.
Step 7: a Mg doped P-type GaN layer 7 is grown.
Specifically, the step 7 is further:
Under the conditions of temperature of 950-1000 ℃, reaction cavity pressure of 400-900mbar, NH 3 with 500-70000 sccm, TMGa with 20-100sccm, H 2 with 100-130L/min and Cp 2 Mg with 1000-3000sccm, a P-type GaN layer 7 doped with Mg with thickness of 50-200nm is grown, and the doping concentration of Mg is 1E19-1E20atoms/cm 3.
Step 8: preserving heat at 650-680 deg.C for 20-30min, closing heating system, closing gas supply system, and cooling with furnace.
Example 2
A comparative example, a conventional method of growing an LED epitaxial structure (see fig. 2 for an epitaxial structure), is provided below.
Step 1: the sapphire substrate is processed for 5 to 10 minutes under the conditions that the temperature is 1000 to 1100 ℃, the pressure of a reaction cavity is 100 to 300mbar and H 2 of 100 to 130L/min is introduced.
Step 2: and growing a low-temperature GaN buffer layer 2, and forming irregular islands on the low-temperature GaN buffer layer 2.
Specifically, the step 2 is further that:
Under the conditions that the temperature is 500-600 ℃, the pressure of a reaction cavity is 300-600mbar, 10000-20000sccm of NH 3, 50-100sccm of TMGa and 100-130L/min of H 2 are introduced, the low-temperature GaN buffer layer 2 is grown on the sapphire substrate 1, and the thickness of the low-temperature GaN buffer layer 2 is 20-40nm;
And under the conditions that the temperature is 1000-1100 ℃, the pressure of a reaction cavity is 300-600mbar, NH 3 with the concentration of 30000-40000sccm and H 2 with the concentration of 100-130L/min are introduced, the temperature is kept for 300-500 seconds, and the irregular islands are formed on the low-temperature GaN buffer layer 2.
Step 3: an undoped GaN layer 3 is grown.
Specifically, the step 3 is further:
Introducing 30000-40000sccm of NH 3, 200-400sccm of TMGa and 100-130L/min of H 2 into a reaction chamber at 1000-1200 ℃ under the pressure of 300-600 mbar; the thickness of the undoped GaN layer 3 is 2-4 μm.
Step 4: a Si doped N-type GaN layer 4 is grown.
Specifically, the step 4 is further:
And growing the Si doped N-type GaN layer 4 under the conditions that the temperature is 1000-1200 ℃, the pressure of a reaction cavity is 300-600mbar, 30000-60000sccm of NH 3, 200-400sccm of TMGa, 100-130L/min of H 2 and 20-50sccm of SiH 4 are introduced, the thickness of the N-type GaN layer 4 is 3-4 mu m, and the Si doping concentration is 5E18-1E19atoms/cm 3.
Step 5: an InGaN/GaN multiple quantum well layer 5 is grown.
Specifically, the growing multiple quantum well layer 5 is further:
Maintaining the pressure of the reaction cavity at 300-400mbar and the temperature at 720 ℃, introducing NH 3 with the flow rate of 50000-70000sccm, TMGa with the flow rate of 20-40sccm, TMIn with the flow rate of 10000-15000sccm and N 2 with the flow rate of 100-130L/min, and growing an InGaN well layer 51 with the thickness of 3nm doped with In;
raising the temperature to 800 ℃, keeping the pressure of the reaction cavity at 300-400mbar, introducing NH 3 with the flow rate of 50000-70000sccm, TMGa with the flow rate of 20-100sccm and N 2 with the flow rate of 100-130L/min, and growing a GaN barrier layer 54 with the flow rate of 10 nm;
and repeatedly and alternately growing the InGaN well layer 51 and the GaN barrier layer 54 to obtain the InGaN/GaN multi-quantum well light-emitting layer, wherein the number of the alternately growing periods of the InGaN well layer 51 and the GaN barrier layer 54 is 7-13.
Step 6: an AlGaN electron blocking layer 6 is grown.
Specifically, the step 6 is further:
The AlGaN electron blocking layer 6 is grown under the conditions that the temperature is 900-950 ℃, the pressure of a reaction cavity is 200-400mbar, 50000-70000sccm of NH 3, 30-60sccm of TMGa, 100-130L/min of H 2, 100-130sccm of TMAL and 1000-1300sccm of Cp 2 Mg are introduced, the thickness of the AlGaN layer 6 is 40-60nm, and the doping concentration of Mg is 1E19-1E20atoms/cm 3.
Step 7: a Mg doped P-type GaN layer 7 is grown.
Specifically, the step 7 is further:
Under the conditions of temperature of 950-1000 ℃, reaction cavity pressure of 400-900mbar, NH 3 with 500-70000 sccm, TMGa with 20-100sccm, H 2 with 100-130L/min and Cp 2 Mg with 1000-3000sccm, a P-type GaN layer 7 doped with Mg with thickness of 50-200nm is grown, and the doping concentration of Mg is 1E19-1E20atoms/cm 3.
Step 8: preserving heat at 650-680 deg.C for 20-30min, closing heating system, closing gas supply system, and cooling with furnace.
Sample 1 and sample 2 were prepared according to the above examples 1 and 2, respectively, with the ITO layer plated at about 150nm under the same pre-process conditions, the Cr/Pt/Au electrode plated at about 1500nm under the same conditions, the protective layer plated at about 100nm of SiO 2 under the same conditions, then the samples were ground and cut into 635 μm (25 mil) chip particles under the same conditions, after which the sample 1 and sample 2 were each picked up at 1000 grains at the same position and packaged into white LEDs under the same packaging process. The photoelectric properties of sample 1 and sample 2 were tested using an integrating sphere under a drive current of 350 mA.
Table 1 results of comparing electrical parameters of samples 1 and 2
The data obtained by the integrating sphere are analyzed and compared, and as can be seen from the table 1, the luminous efficiency of the LED (sample 1) prepared by the LED chip manufacturing method provided by the invention is obviously improved, the blue shift of the wavelength is smaller, and the electrical parameters of other LEDs such as voltage, reverse voltage, antistatic capability and the like are also better.
The manufacturing method of the LED epitaxial wafer suitable for the small-space display screen achieves the following effects:
1. According to the invention, the TMIn source is introduced before the InGaN quantum well is grown, so that the rough interface of the InGaN quantum well is repaired, and the formation of defects such as V-shaped pits, in clusters and the like In the InGaN quantum well is inhibited, thereby improving the growth quality of the quantum well.
2. According to the invention, the InGaN well layer is grown by adopting a method of periodically interrupting an In source and a Ga source, so that the luminous intensity of the LED is obviously improved, which can be explained as that In clusters, in drops and the like are easily formed at a growth interface due to insufficient N source In the process of growing the InGaN quantum well by adopting a traditional method, and In the process of interrupting the growth of the In source and the Ga source, the InGaN quantum well layer is thermally decomposed and continuously supplied by the N source, so that the defects of the In clusters, the In drops and the like on the surface are eliminated, the quality of the quantum well is improved, and the photoelectric property of the LED is improved.
3. According to the invention, a cracking method is adopted to introduce a growth GaO layer into a quantum well layer, and the molar content of Ga atoms in the cracking process is controlled to be increased from 20% to 40%, so that the mass centers of Ga atom sets and N atom sets in the multi-quantum well layer are enabled to coincide, a dipole is formed, spontaneous polarization is generated in a layer material, a built-in electric field is formed, the built-in electric field is capable of promoting injection of carriers in the quantum well, reducing the quantum confinement Stark effect, enabling energy bands to be smooth, and reducing wavelength blue shift.
4. According to the invention, an In xAlyMg(1-x-y) layer is inserted behind the InGaN well layer, and because Al atoms have lower main quantum numbers and wider orbit energy gaps than In atoms, an Al-In bond (or an In-Mg-Al bond) can be formed In InGaN xAlyMg(1-x-y) by the linear combination effect of atomic orbitals, so that the forbidden band width of InGaN can be increased, the ground state In the quantum well is promoted to be reduced, the movement of the luminous wavelength of an LED to a short wave direction is reduced, and the blue shift of the wavelength is reduced.
5. The invention divides the active region quantum well structure into two groups, wherein the thickness of MQWs2 is 1.5 times of the thickness of MQWs1, and the lattice periodicity and the material interface characteristic of the epitaxial wafer material can be improved, thereby improving the performance of the LED, and further promoting the overlapping of the distribution central axes of holes and electrons in the multi-quantum well, improving the efficiency of electron-hole transition, and further improving the luminous efficiency of the LED chip.
6. According to the method, the GaN barrier layer is grown by adopting the method of periodically interrupting the Ga source, so that the material growth defect can be effectively reduced, the crystal quality of the critical luminescence MQWs2 is improved, and the method can improve the brightness by about 1.5% compared with the traditional GaN barrier layer growth method.
Since the method section has already described the embodiments of the present application in detail, the description of the structures and the corresponding parts of the methods related in the embodiments is omitted, and the description is omitted. Reference is made to the description of the method embodiments for specific details of construction and are not specifically defined herein.
While the foregoing description illustrates and describes the preferred embodiments of the present application, it is to be understood that the application is not limited to the forms disclosed herein, but is not to be construed as limited to other embodiments, and is capable of numerous other combinations, modifications and environments and is capable of changes or modifications within the scope of the inventive concept as expressed herein, either as a result of the foregoing teachings or as a result of the knowledge or technology of the relevant art. And that modifications and variations which do not depart from the spirit and scope of the application are intended to be within the scope of the appended claims.

Claims (8)

1. The manufacturing method of the LED epitaxial wafer suitable for the small-space display screen is characterized by comprising the following steps of: treating a substrate, growing a low-temperature GaN buffer layer, growing an undoped GaN layer, growing an N-type GaN layer doped with Si, growing a multi-quantum well layer, growing an AlGaN electron blocking layer, growing a P-type GaN layer doped with Mg, cooling,
The growing multiple quantum well layer sequentially comprises: introducing TMIn source, growing MQWs1 and growing MQWs2; wherein,
The TMIn source is introduced, specifically:
Controlling the pressure of the reaction cavity at 300-320mbar, controlling the temperature of the reaction cavity at 680-700 ℃, and introducing a TMIn source of 600-700sccm for 10-20s;
The growing of the MQWs1 comprises the sequential growth of an InGaN well layer and an In xAlyMg(1-x-y) layer, and specifically comprises the following steps:
The pressure of the reaction cavity is kept unchanged, the temperature of the reaction cavity is increased to 900-950 ℃, NH 3, TMGa and TMIn are introduced, an InGaN well layer with the thickness of D 1 is grown by periodically interrupting an In source and a Ga source, in the growth process of the InGaN well layer, the time for interrupting the TMIn and introducing the reaction cavity is 6s and 3s respectively, and the time for interrupting the TMGa and introducing the reaction cavity is 10s and 15s respectively;
The pressure of the reaction cavity is kept unchanged, the temperature of the reaction cavity is reduced to 700-720 ℃, TMIn, cp 2 Mg, TMAL and H 2 are introduced, an In xAlyMg(1-x-y) layer with the thickness of D 2 is grown on the InGaN well layer, the value range of x is 0.1-0.2, and the value range of y is 0.3-0.45;
the growing of the MQWs2 comprises the steps of sequentially growing a GaO layer and a GaN barrier layer, and specifically comprises the following steps:
Keeping the pressure of the reaction cavity unchanged, reducing the temperature of the reaction cavity to 620-640 ℃, introducing N 2 and H 2 as carrier gas, simultaneously introducing NH 3, TMGa and O 2 for 18-28s, cracking TMGa and O 2, combining the cracked Ga and O atoms on the In xAlyMg(1-x-y) layer to generate a GaO layer with the thickness of D 3, increasing the molar content of Ga atoms from 20% to 40% In the cracking process, and simultaneously conveying the cracked H, N, C atoms to a tail pipe along with the carrier gas to be discharged out of the reaction chamber;
Raising the temperature of the reaction cavity to 800-820 ℃, raising the pressure of the reaction cavity to 400-440mbar, introducing NH 3, TMGa and N 2, periodically interrupting a Ga source to grow a GaN barrier layer with the thickness of D 4 on the GaO layer, wherein in the growth process of the GaN barrier layer, the time for interrupting the TMGa and introducing the reaction cavity is 8s and 4s respectively;
wherein D 3+D4=1.5(D1+D2);
the steps of feeding TMIn source, growing MQWs1 and growing MQWs2 are carried out periodically and sequentially, and the number of periods is 2-11.
2. The method for manufacturing the LED epitaxial wafer suitable for the small-space display screen, according to claim 1, is characterized in that at the temperature of 1000-1100 ℃, H 2 with the concentration of 100-130L/min is introduced, the pressure of a reaction cavity is kept at 100-300mbar, and a sapphire substrate is processed for 5-10min.
3. The method for manufacturing the LED epitaxial wafer suitable for the small-pitch display screen according to claim 2, wherein the specific process of growing the low-temperature GaN buffer layer is as follows:
Cooling to 500-600 ℃, maintaining the pressure of the reaction cavity at 300-600mbar, introducing NH 3 with the flow rate of 10000-20000sccm, TMGa with the flow rate of 50-100sccm and H 2 with the flow rate of 100-130L/min, and growing a low-temperature GaN buffer layer with the thickness of 20-40nm on the sapphire substrate;
Raising the temperature to 1000-1100 ℃, maintaining the pressure of the reaction cavity at 300-600mbar, introducing NH 3 with the flow rate of 30000-40000sccm and H 2 with the flow rate of 100-130L/min, preserving heat for 300-500s, and corroding the low-temperature GaN buffer layer into an irregular island shape.
4. The method for manufacturing the LED epitaxial wafer suitable for the small-pitch display screen according to claim 1, wherein the specific process of growing the undoped GaN layer is as follows:
Raising the temperature to 1000-1200 ℃, keeping the pressure of the reaction cavity at 300-600mbar, introducing NH 3 with the flow rate of 30000-40000sccm, TMGa with the flow rate of 200-400sccm and H 2 with the flow rate of 100-130L/min, and continuously growing a 2-4 mu m undoped GaN layer.
5. The method for manufacturing the LED epitaxial wafer suitable for the small-pitch display screen according to claim 1, wherein the specific process of growing the Si-doped N-type GaN layer is as follows:
Maintaining the pressure of the reaction cavity at 300-600mbar, maintaining the temperature at 1000-1200 ℃, introducing NH 3 with the flow rate of 30000-60000sccm, TMGa with the flow rate of 200-400sccm, H 2 with the flow rate of 100-130L/min and SiH 4 with the flow rate of 20-50sccm, and continuously growing an N-type GaN layer doped with Si with the doping concentration of 3-4 mu m, wherein the doping concentration of Si is 5E18-1E19atoms/cm 3.
6. The method for manufacturing the LED epitaxial wafer suitable for the small-space display screen according to claim 1, wherein the specific process of growing the AlGaN electron blocking layer is as follows:
and growing the AlGaN electron blocking layer under the conditions of the temperature of 900-950 ℃, the pressure of a reaction cavity of 200-400mbar, NH 3 with the concentration of 50000-70000sccm, TMGa with the concentration of 30-60sccm, H 2 with the concentration of 100-130L/min, TMAL with the concentration of 100-130sccm and Cp 2 Mg with the concentration of 1000-1300sccm, wherein the thickness of the AlGaN layer is 40-60nm, and the doping concentration of Mg is 1E19-1E20atoms/cm 3.
7. The method for manufacturing the LED epitaxial wafer suitable for the small-pitch display screen according to claim 1, wherein the specific process of growing the Mg-doped P-type GaN layer is as follows:
Maintaining the pressure of the reaction cavity at 400-900mbar and the temperature at 950-1000 ℃, introducing NH 3 with the flow rate of 50000-70000sccm, TMGa with the flow rate of 20-100sccm, H 2 with the flow rate of 100-130L/min and Cp 2 Mg with the flow rate of 1000-3000sccm, and continuously growing a 50-200nm P-type GaN layer doped with Mg, wherein the doping concentration of Mg is 1E19-1E20atoms/cm 3.
8. The method for manufacturing the LED epitaxial wafer suitable for the small-space display screen according to claim 1, wherein the specific process of cooling is as follows:
Cooling to 650-680 deg.C, maintaining the temperature for 20-30min, closing the heating system, closing the gas supply system, and cooling with furnace.
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