CN113539137B - Novel display device and display system - Google Patents

Novel display device and display system Download PDF

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Publication number
CN113539137B
CN113539137B CN202010273834.5A CN202010273834A CN113539137B CN 113539137 B CN113539137 B CN 113539137B CN 202010273834 A CN202010273834 A CN 202010273834A CN 113539137 B CN113539137 B CN 113539137B
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Prior art keywords
module
display device
gamma
driving module
circuit board
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CN113539137A (en
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师俊
陈宥烨
行浩
刘子涵
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Xianyang Caihong Optoelectronics Technology Co Ltd
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Xianyang Caihong Optoelectronics Technology Co Ltd
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Priority to CN202010273834.5A priority Critical patent/CN113539137B/en
Priority to EP21867892.8A priority patent/EP4086985A4/en
Priority to PCT/CN2021/000081 priority patent/WO2021203778A1/en
Publication of CN113539137A publication Critical patent/CN113539137A/en
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09FDISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/35Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being liquid crystals
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

The embodiment of the disclosure discloses a novel display device, comprising: a display panel; the driving module is electrically connected with the display panel and comprises a source electrode driving module and a grid electrode driving module; a horizontal direction circuit board (XB) electrically connecting the source driver circuit and the gate driver circuit; a system board electrically connected to the horizontal direction circuit board, having a System On Chip (SOC) thereon; the functional module comprises a gamma module, a power module, a small time sequence control chip (ST IC) and a level conversion module; the ST IC is located on the XB and used for converting the P2P or VBO high-speed signals output by the SOC into mini-LVDS signals. Through single-row wire plugging, ST IC is increased, control boards are reduced, mini-LVDS interfaces are used, and cost is effectively reduced; the ST IC not only can generate a time signal required by the display panel and effectively reduce the SOC debugging period, but also can contain a new technology IP unit, thereby being beneficial to technical optimization.

Description

Novel display device and display system
Technical Field
The disclosure relates to the field of display, and in particular relates to a novel display device and a novel display system.
Background
The general liquid crystal display device mainly includes a source driving circuit, a gate driving circuit, a horizontal direction circuit board (X-board, abbreviated as XB board) disposed On a liquid crystal Panel (Panel), a System On Chip (SOC), a Timing Controller (TCON), and a flexible flat cable (Flexible Flat Cable, abbreviated as FFC) disposed On a System board or a motherboard (MB board), wherein the System On Chip receives an image data signal to be transmitted and outputs the image data signal to be transmitted, and then processes an input signal through a row expansion module and a column expansion module, and transmits the processed data to the Timing controller, which transmits the received data to the source driving circuit and the gate driving circuit through the horizontal direction circuit board, thereby driving the Panel to display.
Along with the release of productivity of each liquid crystal panel factory, the large-size liquid crystal panel has strong competition and high price descending pressure. The manufacturers of large-size televisions gradually change from Normal type (design including Control Board (CB)) to TCONLESS type liquid crystal panels for reducing cost. In the related technology of the TCONLESS type liquid crystal panel, all or part of functions of the TCON are realized by a system-on-chip (SOC) on a system board (MB board), and the area of the SOC on the MB board can be kept unchanged after the SOC is increased by the TCON function; the ST IC is called as Small TCON IC, has a signal conversion function, and can convert, for example, a P2P signal into a mini-LVDS (mini low voltage differential signaling) signal for output.
The existing P2P protocols are more, such as ISP, USIT, CHPI, CSPI, CMPI, CEDS, and are applied to different panel manufacturers, different P2P protocols are used, and the image data format and the tracking mode between TX RX are different, which results in different Source Driver (S/D) supporting different P2P protocols, so that the system board needs to make different designs according to different P2P protocols, and the system board has poor universality.
In addition, as shown in fig. 1, the data (data) transmission path in the Normal design of the current panel structure is: SOC- & gt CB- & gtXB- & gt panel, wherein the SOC and a TCON IC on the CB transmit control data and data of a liquid crystal panel through a VBYONE (V-by-One or VBO) protocol, the TCON IC converts the received data into mini-LVDS format and transmits the mini-LVDS format to the XB, and meanwhile, the TCON IC also comprises optical adjustment functions such as white balance (ACC), overvoltage Drive (OD), demura (eliminating uneven display of the panel) and the like; and a data transmission path SOC- & gtXB- & gtPanel designed by TCON-less, wherein the SOC and XB transmit liquid crystal panel control data and data through a P2P interface protocol.
The VBO interface of the current Normal (XB+CB) architecture only transmits control data and data of images, and the optical adjustment part is completed by a TCON IC, so that the CB cost is high; the S/D of the traditional TCON-less architecture needs to be matched with a P2P interface, so that the manufacturing and testing cost is increased compared with the S/D of a mini-LVDS interface; because of no TCON, panel Timing is generated by SOC, and SOC is needed for matching between debugging and board modification, the difficult period of SOC board modification is long, and the cost is high; is unfavorable for the development of the new technology of Panel; the required time signals of a panel of a COF (Chip-On-Film) model and a GOA (Gate On Array) model are different, and the SOC compatibility is poor; different panel GOA circuit designs are different, the required time signals are different, and the SOC compatibility is poor.
Disclosure of Invention
To overcome at least some of the drawbacks and disadvantages of the related art, embodiments of the present disclosure provide a novel display device, display system.
The present disclosure first provides a novel display device including:
a display Panel (Panel);
the driving module is electrically connected with the display panel and comprises a source electrode driving module and a grid electrode driving module;
a horizontal direction circuit board (XB) electrically connecting the source driver circuit and the gate driver circuit;
a system board (MB) electrically connected to the horizontal circuit board, having a system-on-chip (SOC) thereon;
the functional module comprises a Gamma (GM) module, a power supply (DC-DC) module and a small time sequence control chip (ST IC) module;
the small time sequence control chip (ST IC) is arranged on the horizontal direction circuit board (XB) and used for high-speed signal conversion, and has no optical adjustment function.
In one embodiment of the present invention, the Source driving module has a COF type Source driver (Source COF) thereon; the Gamma module is used for generating Gamma voltage; the power module is used for generating a power signal required by the circuit; the small time sequence control chip (ST IC) is used for converting high-speed signals such as P2P or VBO output by the system-in-chip into mini-LVDS signals.
In one embodiment of the present invention, the Gate driving module is a COF type Gate driver (Gate COF); the ST IC is also used to output control signals required for the COF type gate driver.
In one embodiment of the invention, the gamma module, power module is disposed on the MB.
In one embodiment of the present invention, the gamma module and the power module are not all disposed on the XB.
In one embodiment of the present invention, the functional module further includes a Level shift (Level Shifter) module; the level conversion module is used for generating a time sequence control signal of the grid driving module; the grid driving module is GOA.
In one embodiment of the present invention, the GM module, the DC-DC module, and the Level shift module are disposed on the MB.
In one embodiment of the present invention, the GM module, the DC-DC module, and the Level shift module are not all disposed on the XB.
In one embodiment of the present invention, the Level shift module is disposed on the XB; the power module is arranged on the main board and provides a power signal required by the Level shift module.
Embodiments of the present invention also provide a display system employing the display device as described in the foregoing.
According to the scheme, the display device changes the connection between MB and XB from double-row wire plug to single-row wire plug, so that the loss caused by the wire plug is reduced by half, and the cost can be effectively reduced; compared with a Normal architecture, the CB is reduced, and the cost can be effectively reduced; compared with the traditional TCON-less architecture, ST IC is added on XB, and S/D uses mini-LVDS interface, so that the cost of S/D can be reduced; when the power supply voltage and Gamma voltage required by Panel driving can be generated by MB, ST IC can generate Timing required by Panel, and SOC debugging period can be effectively reduced; the ST IC can also contain a new technology IP unit, which is beneficial to panel technology optimization; in addition, the GM module, the DC-DC module, the Level shift module and the like are respectively and reasonably arranged on the MB or the XB, so that the overall scientificity and compatibility are improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings required for the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present disclosure, and other drawings may be obtained according to these drawings without inventive effort for a person of ordinary skill in the art.
Fig. 1 is a schematic structural diagram of a display device in the prior art.
Fig. 2 is a schematic structural diagram of a display device according to an embodiment of the disclosure.
Fig. 3 is a schematic structural diagram of another display device according to an embodiment of the disclosure.
Fig. 4 is a schematic diagram of a functional module and signal flow in another embodiment of the disclosure.
Fig. 5 is a schematic structural diagram of a display device according to another embodiment of the disclosure.
Fig. 6 is a schematic diagram of a functional module and signal flow in another embodiment of the disclosure.
Fig. 7 is a schematic structural diagram of a display device according to another embodiment of the disclosure.
Fig. 8 is a schematic diagram of a functional module and signal flow in another embodiment of the disclosure.
Detailed Description
For the purposes of making the objects, technical solutions and advantages of the embodiments of the present disclosure more apparent, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present disclosure, and it is apparent that the described embodiments are some embodiments of the present disclosure, but not all embodiments. Based on the embodiments in this disclosure, all other embodiments that a person of ordinary skill in the art would obtain without making any inventive effort are within the scope of protection of this disclosure.
The following description of the embodiments refers to the accompanying drawings, which illustrate specific embodiments in which the disclosure may be practiced. The directional terms mentioned in this disclosure, such as "up", "down", "front", "back", "left", "right", "inside", "outside", "side", etc., refer only to the directions of the attached drawings. Accordingly, directional terms are used to illustrate and understand the present disclosure, not to limit the present disclosure.
The drawings and description are to be regarded as illustrative in nature, and not as restrictive. In the drawings, like structural elements are denoted by like reference numerals. In addition, for the sake of understanding and convenience of description, the size and thickness of each component shown in the drawings are arbitrarily shown, but the present disclosure is not limited thereto.
In addition, in the description, unless explicitly described to the contrary, the word "comprising" will be understood to mean comprising the recited component, but not excluding any other components. Further, in the specification, "above" means above or below the target assembly, and does not mean necessarily on top based on the direction of gravity.
In order to further describe the technical means and effects adopted by the present disclosure to achieve the preset disclosure purpose, the following description refers to a novel display device, a novel display system, a novel display structure, a novel display system specific implementation, a novel display structure, a novel display system specific feature and a novel display system specific effect according to the present disclosure, and the novel display device, the novel display system specific feature and the novel display system are described in detail below.
Example 1
As shown in fig. 2, a novel display device 10 provided in this embodiment includes: a display Panel (Panel) 111; a driving module electrically connected to the display panel 111, including a source driving module 1115 and a gate driving module 1113; a horizontal direction circuit board (XB) 113 electrically connecting the source driving module 1115 and the gate driving module 1113; a system board (MB) 13 electrically connected to the horizontal direction circuit board 113, having a System On Chip (SOC) 131a thereon; a functional module 1130 including a Gamma (GM) module, a power supply (DC-DC) module, and a small-sized timing control chip (ST IC); the small timing control chip (ST IC) is disposed on the horizontal circuit board (XB) 113, and is used for high-speed signal conversion, and has no optical adjustment function.
In the display device 10 shown in fig. 2, four frame line modules in the function module 1130 are only examples, and do not limit GM, DC-DC, and L/S to XB.
Further, the Source driving module 1115 has a COF Source driver (Source COF) 1115S thereon; the Gamma module is used for generating Gamma voltage; the power module is used for generating a power signal required by the circuit; the small time sequence control chip (ST IC) is used for converting the P2P or VBO high-speed signals output by the system-in-chip into mini-LVDS signals.
Further, the Gate driving module is a COF type Gate driver (Gate COF); the ST IC is also used to output control signals required for the COF type gate driver.
Further, the gamma module and the power module are respectively arranged on the MB.
Specifically, as shown in fig. 3, based on the foregoing architecture, the present embodiment proposes a TCON-less architecture for Gate COF models, defining ST IC on XB, DC-DC, gamma on system factory MB; the number of XB is not limited by the ST IC on XR or XL; under the system architecture of this embodiment, each functional module and signal flow in the implementation are shown in fig. 4.
Further, for example, the novel TCONLESS panel structure or display device of the present embodiment has a data (data) transmission path as follows: MB→XB→Source COF→panel, including SOC, gamma voltage GM module, DC-DC module for generating power signal required by circuit, ST IC for high-speed signal conversion, level shift module for generating GOA time sequence control signal and other peripheral elements. The ST IC is positioned on the XB, the function is high-speed signal conversion, input is high-speed signals such as P2P, VBO and the like output by the SOC, and output is mini-LVDS signals; other functions such as a new technology related IP block, generating a source or gate IC required sequence signal, etc., are not limited herein. In addition, the ST IC does not include an optical adjustment function such as Demura (display unevenness elimination)/OD (over-voltage drive)/ACC (white balance).
Alternatively, for example, the panel architecture of Gate cof+tconless proposed in this embodiment, MB is composed of SOC, GM module for generating Gamma voltage, DC-DC module for generating power signal required by circuit, and other peripheral components; the XB consists of an ST IC and other peripheral elements, and is matched with a Source driver IC of mini LVDS and a Gate driver IC in the scanning direction; the ST IC outputs control signals such as stv\cpv required for Gate COF.
According to the display device, the connection between MB and XB is changed from double-row wire plug to single-row wire plug, so that the loss caused by the wire plug is reduced by half, and the cost can be effectively reduced; compared with a Normal architecture, the CB is reduced, and the cost can be effectively reduced; compared with the traditional TCON-less architecture, ST IC is added on XB, and S/D uses mini-LVDS interface, so that the cost of S/D can be reduced; when the power supply voltage and Gamma voltage required by Panel driving can be generated by MB, ST IC can generate Timing required by Panel, and SOC debugging period can be effectively reduced; the ST IC can also contain a new technology IP unit, which is beneficial to panel technology optimization; in addition, the GM module, the DC-DC module, the Level shift module and the like are respectively and reasonably arranged on the MB or the XB, so that the overall scientificity and compatibility are improved.
Example two
As shown in fig. 2, a novel display device 10 provided in this embodiment includes: a display Panel (Panel) 111; a driving module electrically connected to the display panel 111, including a source driving module 1115 and a gate driving module 1113; a horizontal direction circuit board (XB) 113 electrically connecting the source driving module 1115 and the gate driving module 1113; a system board (MB) 13 electrically connected to the horizontal direction circuit board 113, having a System On Chip (SOC) 131a thereon; a functional module 1130 including a Gamma (GM) module, a power supply (DC-DC) module, and a small-sized timing control chip (ST IC); the small timing control chip (ST IC) is disposed on the horizontal circuit board (XB) 113, and is used for high-speed signal conversion, and has no optical adjustment function.
In the display device 10 shown in fig. 2, four frame line modules in the function module 1130 are only examples, and do not limit GM, DC-DC, and L/S to XB.
Further, the Source driving module 1115 has a COF Source driver (Source COF) 1115S thereon; the Gamma module is used for generating Gamma voltage; the power module is used for generating a power signal required by the circuit; the small time sequence control chip (ST IC) is used for converting the P2P or VBO high-speed signals output by the system-in-chip into mini-LVDS signals.
Further, the Gate driving module is a COF type Gate driver (Gate COF); the ST IC is also used to output control signals required for the COF type gate driver.
Further, the gamma module and the power module may not be disposed On the horizontal circuit board, and for this Gate type, the Source Driver IC may be disposed On a Source COF (Chip On Film), and the Gate Driver IC may be disposed On a Gate COF.
Specifically, for example, the novel TCONLESS panel architecture or display device of the present embodiment has a data (data) transmission path as follows: MB→XB→Source COF→panel, including SOC, gamma voltage GM module, DC-DC module for generating power signal required by circuit, ST IC for high-speed signal conversion, level shift module for generating GOA time sequence control signal and other peripheral elements. The ST IC is positioned on the XB, the function is high-speed signal conversion, input is high-speed signals such as P2P, VBO and the like output by the SOC, and output is mini-LVDS signals; other functions such as a new technology related IP block, generating a source or gate IC required sequence signal, etc., are not limited herein. In addition, the ST IC does not include an optical adjustment function such as Demura (display unevenness elimination)/OD (over-voltage drive)/ACC (white balance).
Alternatively, for example, the present embodiment proposes a panel architecture of Gate cof+tconless: the MB consists of an SOC, a DC-DC module for generating power signals required by the circuit and other peripheral elements; the XB consists of an ST IC, a GM module for generating Gamma voltage and other peripheral elements, and is matched with a Source driver IC of mini LVDS and a Gate driver IC in the scanning direction; the ST IC also outputs control signals such as STV\CPV and the like required by the Gate COF; (DC-DC on MB outputs power such as VDD required by the GM module).
Still alternatively, for example, the present embodiment proposes a panel architecture of Gate cof+tconless: the MB consists of an SOC, a module for generating Gamma voltage GM and other peripheral elements; the XB consists of an ST IC, a DC-DC module for generating power signals required by a circuit and other peripheral elements, and is matched with a Source driver IC of mini LVDS and a Gate driver IC in a scanning direction; the ST IC outputs control signals such as stv\cpv required for Gate COF.
According to the display device, the connection between MB and XB is changed from double-row wire plug to single-row wire plug, so that the loss caused by the wire plug is reduced by half, and the cost can be effectively reduced; compared with a Normal architecture, the CB is reduced, and the cost can be effectively reduced; compared with the traditional TCON-less architecture, ST IC is added on XB, and S/D uses mini-LVDS interface, so that the cost of S/D can be reduced; ST IC can generate Timing required by Panel, and can effectively reduce SOC debugging period; the ST IC can also contain a new technology IP unit, which is beneficial to panel technology optimization; in addition, the GM module, the DC-DC module, the Level shift module and the like are respectively and reasonably arranged on the MB or the XB, so that the overall scientificity and compatibility are improved.
Example III
As shown in fig. 2, a novel display device 10 provided in this embodiment includes: a display Panel (Panel) 111; a driving module electrically connected to the display panel 111, including a source driving module 1115 and a gate driving module 1113; a horizontal direction circuit board (XB) 113 electrically connecting the source driving module 1115 and the gate driving module 1113; a system board (MB) 13 electrically connected to the horizontal direction circuit board 113, having a System On Chip (SOC) 131a thereon; a function module 1130 including a Gamma (GM) module, a power supply (DC-DC) module, a small timing control chip (ST IC), and a Level shift (Level Shifter) module; the small timing control chip (ST IC) is disposed on the horizontal circuit board (XB) 113, and is used for high-speed signal conversion, and has no optical adjustment function.
In the display device 10 shown in fig. 2, four frame line modules in the function module 1130 are only examples, and do not limit GM, DC-DC, and L/S to XB.
Further, the Source driving module 1115 has a COF Source driver (Source COF) 1115S thereon; the Gamma module is used for generating Gamma voltage; the power module is used for generating a power signal required by the circuit; the small time sequence control chip (ST IC) is used for converting the P2P or VBO high-speed signals output by the system-in-chip into mini-LVDS signals.
Further, the functional module further comprises a level conversion module; the level conversion module generates a time sequence control signal of the grid driving module based on the small time sequence control chip; the grid driving module is GOA.
Further, the gamma module, the power module and the level conversion module are arranged on the system board. For example, the present embodiment proposes a panel architecture or display device of goa+tconless, which is composed of SOC, module for generating Gamma voltage GM, DC-DC module for generating power signal required by circuit, level shift module for generating GOA control signal, and other peripheral components; the XB consists of an ST IC and other peripheral elements, and is matched with a Source driver IC of mini LVDS and a GOA circuit in the scanning direction.
Specifically, as shown in fig. 5, for example, the present embodiment proposes a new TCON-less architecture or display device for GOA models, defining ST IC on XB, DC-DC, gamma, L/S compatible on system factory MB; the number of XB is not limited by the ST IC on XR or XL; under the system architecture of this embodiment, functional modules and signal flows in the implementation process are shown in fig. 6.
The display device of the embodiment can also change the connection between MB and XB from double-row wire plug to single-row wire plug, thereby reducing the loss caused by the wire plug by half and effectively reducing the cost; compared with a Normal architecture, the CB is reduced, and the cost can be effectively reduced; compared with the traditional TCON-less architecture, ST IC is added on XB, and S/D uses mini-LVDS interface, so that the cost of S/D can be reduced; when the power supply voltage and Gamma voltage required by Panel driving can be generated by MB, ST IC can generate Timing required by Panel, and SOC debugging period can be effectively reduced; the ST IC can also contain a new technology IP unit, which is beneficial to panel technology optimization; in addition, the GM module, the DC-DC module, the Level shift module and the like are respectively and reasonably arranged on the MB or the XB, so that the overall scientificity and compatibility are improved.
Example IV
As shown in fig. 2, a novel display device 10 provided in this embodiment includes: a display Panel (Panel) 111; a driving module electrically connected to the display panel 111, including a source driving module 1115 and a gate driving module 1113; a horizontal direction circuit board (XB) 113 electrically connecting the source driving module 1115 and the gate driving module 1113; a system board (MB) 13 electrically connected to the horizontal direction circuit board 113, having a System On Chip (SOC) 131a thereon; a function module 1130 including a Gamma (GM) module, a power supply (DC-DC) module, a small timing control chip (ST IC), and a Level shift (Level Shifter) module; the small timing control chip (ST IC) is disposed on the horizontal circuit board (XB) 113, and is used for high-speed signal conversion, and has no optical adjustment function.
In the display device 10 shown in fig. 2, four frame line modules in the function module 1130 are only examples, and do not limit GM, DC-DC, and L/S to XB.
Further, the Source driving module 1115 has a COF Source driver (Source COF) 1115S thereon; the Gamma module is used for generating Gamma voltage; the power module is used for generating a power signal required by the circuit; the small time sequence control chip (ST IC) is used for converting the P2P or VBO high-speed signals output by the system-in-chip into mini-LVDS signals.
Further, the functional module further comprises a level conversion module; the level conversion module generates a time sequence control signal of the grid driving module based on the small time sequence control chip; the grid driving module is GOA. For this GOA model, gate On Array has no Gate COF, i.e., no Gate Dirver IC, and has an L/S-level conversion module.
Further, the gamma module, the power module and the level conversion module are not all arranged on the horizontal direction circuit board. For example, the panel structure or the display device of goa+tconless proposed in the present embodiment is composed of SOC, module for generating Gamma voltage GM, DC-DC module for generating power signal required by circuit, and other peripheral components on MB; the XB consists of an ST IC, a Level shift module for generating GOA control signals and other peripheral elements, and is matched with a Source driver IC of mini LVDS and a GOA circuit in the scanning direction.
Specifically, for example, the present embodiment proposes a panel architecture or display device of goa+tconless, which is composed of SOC, gamma voltage GM module, level shift module for generating GOA control signal, and other peripheral components; the XB consists of an ST IC, a DC-DC module for generating power signals required by the circuit, other peripheral elements, a Source driver IC matched with mini LVDS and a GOA circuit in the scanning direction.
Still alternatively, for example, the present embodiment proposes a panel architecture or display device of goa+tconless, which is composed of SOC, DC-DC module for generating power signal required by the circuit, level shift module for generating GOA control signal, and other peripheral components; the XB consists of an ST IC, a GM module for generating Gamma voltage, and other peripheral elements, and is matched with a Source driver IC of mini LVDS and a GOA circuit in the scanning direction; DC-DC on MB outputs power such as VDD required by GM module.
Still alternatively, for example, the present embodiment proposes a panel architecture or display device of goa+tconless, which is composed of SOC, level shift module for generating GOA control signal, and other peripheral components on MB; the XB consists of an ST IC, a module for generating Gamma voltage GM, a DC-DC module for generating power signals required by a circuit, other peripheral elements, a Source driver IC matched with mini LVDS and a GOA circuit in the scanning direction.
Still alternatively, for example, the present embodiment proposes a panel structure or display device of goa+tconless, wherein the MB of the panel structure or display device is composed of SOC, a module for generating Gamma voltage GM, and other peripheral components; the XB consists of an ST IC, a Level shift module for generating GOA control signals, a DC-DC module for generating power signals required by a circuit, other peripheral elements, a Source driver IC for mini LVDS and a GOA circuit in the scanning direction.
Still alternatively, for example, the present embodiment proposes a panel architecture or display device of goa+tconless, which is composed of SOC, DC-DC module for generating power signal required by the circuit, and other peripheral components on MB; the XB consists of an ST IC, a Gamma voltage GM module, a Level shift module for generating GOA control signals and other peripheral elements, and is matched with a Source driver IC of mini LVDS and a GOA circuit in the scanning direction.
According to the display device, the connection between MB and XB is changed from double-row wire plug to single-row wire plug, so that the loss caused by the wire plug is reduced by half, and the cost can be effectively reduced; compared with a Normal architecture, the CB is reduced, and the cost can be effectively reduced; compared with the traditional TCON-less architecture, ST IC is added on XB, and S/D uses mini-LVDS interface, so that the cost of S/D can be reduced; ST IC can generate Timing required by Panel, and can effectively reduce SOC debugging period; the ST IC can also contain a new technology IP unit, which is beneficial to panel technology optimization; in addition, the GM module, the DC-DC module, the Level shift module and the like are respectively and reasonably arranged on the MB or the XB, so that the overall scientificity and compatibility are improved.
Example five
As shown in fig. 2, a novel display device 10 provided in this embodiment includes: a display Panel (Panel) 111; a driving module electrically connected to the display panel 111, including a source driving module 1115 and a gate driving module 1113; a horizontal direction circuit board (XB) 113 electrically connecting the source driving module 1115 and the gate driving module 1113; a system board (MB) 13 electrically connected to the horizontal direction circuit board 113, having a System On Chip (SOC) 131a thereon; a function module 1130 including a Gamma (GM) module, a power supply (DC-DC) module, a small timing control chip (ST IC), and a Level shift (Level Shifter) module; the small timing control chip (ST IC) is disposed on the horizontal circuit board (XB) 113, and is used for high-speed signal conversion, and has no optical adjustment function.
In the display device 10 shown in fig. 2, four frame line modules in the function module 1130 are only examples, and do not limit GM, DC-DC, and L/S to XB.
Further, the Source driving module 1115 has a COF Source driver (Source COF) 1115S thereon; the Gamma module is used for generating Gamma voltage; the power module is used for generating a power signal required by the circuit; the small time sequence control chip (ST IC) is used for converting the P2P or VBO high-speed signals output by the system-in-chip into mini-LVDS signals.
Further, the functional module further comprises a level conversion module; the level conversion module generates a time sequence control signal of the grid driving module based on the small time sequence control chip; the grid driving module is GOA. For this GOA model, gate On Array has no Gate COF, i.e., no Gate Dirver IC, and has an L/S-level conversion module.
Further, the gamma module, the power module, and the level conversion module are not all disposed on the horizontal direction circuit board, for example, the level conversion module is disposed on the horizontal direction circuit board; the power module is arranged on the main board and provides power signals required by the level conversion module. For example, the panel structure or the display device of goa+tconless proposed in the present embodiment is composed of SOC, module for generating Gamma voltage GM, DC-DC module for generating power signal required by circuit, and other peripheral components on MB; the XB consists of an ST IC, a Level shift module for generating GOA control signals and other peripheral elements, and is matched with a Source driver IC of mini LVDS and a GOA circuit in the scanning direction.
Specifically, as shown in fig. 7, an optimization scheme is proposed based on the foregoing embodiment, where the L/S is limited to the XB, and the MB only needs to provide the power required by the L/S, so that different GOA panels can be effectively compatible, i.e. the MB-XB interface definition is optimized, and the MB compatibility can also be improved. The scheme limits ST IC, L/S on XB, DC-DC, gamma are compatible on MB of the system factory; ST IC and L/S are not limited on XR/XL, and XB quantity is not limited; in the implementation of the system architecture, each functional module and signal flow are shown in fig. 8.
According to the display device, the connection between MB and XB is changed from double-row wire plug to single-row wire plug, so that the loss caused by the wire plug is reduced by half, and the cost can be effectively reduced; compared with a Normal architecture, the CB is reduced, and the cost can be effectively reduced; compared with the traditional TCON-less architecture, ST IC is added on XB, and S/D uses mini-LVDS interface, so that the cost of S/D can be reduced; ST IC can generate Timing required by Panel, and can effectively reduce SOC debugging period; the ST IC can also contain a new technology IP unit, which is beneficial to panel technology optimization; in addition, the GM module, the DC-DC module, the Level shift module and the like are respectively and reasonably arranged on the MB or the XB, so that the overall scientificity and compatibility are improved.
Another embodiment of the present invention also provides a display system, which adopts the display device described in the foregoing embodiments, and other related technologies are not important to the present invention, and are not repeated here.
The terms "in some embodiments" and "in various embodiments" and the like are used repeatedly. The term generally does not refer to the same embodiment; but it may also refer to the same embodiment. The terms "comprising," "having," "including," and the like are synonymous, unless the context clearly dictates otherwise.
While the present disclosure has been described with respect to the preferred embodiments, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the disclosure, and that any such changes and modifications as described in the foregoing embodiments are intended to be within the scope of the disclosure.

Claims (9)

1. A novel display device, comprising:
a display panel;
the driving module is electrically connected with the display panel and comprises a source electrode driving module and a grid electrode driving module;
the horizontal direction circuit board is electrically connected with the source electrode driving module and the grid electrode driving module;
a system board electrically connected to the horizontal direction circuit board, having a system-on-chip thereon;
the functional module comprises a gamma module, a power module and a small time sequence control chip;
the small time sequence control chip is arranged on the horizontal direction circuit board and used for high-speed signal conversion, and has no optical adjustment function;
wherein, the source electrode driving module is provided with a COF source driver;
the Gamma module is used for generating Gamma voltage;
the power supply module is used for generating a power supply signal required by the circuit;
the small time sequence control chip is used for converting the P2P or VBO high-speed signals output by the system-in-chip into mini-LVDS signals.
2. The novel display device of claim 1, wherein,
the grid driving module is a COF type grid driver;
the small timing control chip is also used for outputting control signals required by the COF type gate driver.
3. The novel display device of claim 2, wherein,
the gamma module and the power module are arranged on the system board.
4. The novel display device of claim 2, wherein,
the gamma module and the power module are not fully arranged on the horizontal circuit board.
5. The novel display device of claim 1, wherein,
the functional module further comprises a level conversion module;
the level conversion module generates a time sequence control signal of the grid driving module based on the small time sequence control chip;
the grid driving module is GOA.
6. The novel display device of claim 5, wherein,
the gamma module, the power module and the level conversion module are arranged on the system board.
7. The novel display device of claim 5, wherein,
the gamma module, the power module and the level conversion module are not all arranged on the horizontal circuit board.
8. The novel display device of claim 7, wherein,
the level conversion module is arranged on the horizontal circuit board;
the power module is arranged on the system board and provides power signals required by the level conversion module.
9. A display system employing a display device as claimed in any one of claims 1 to 8.
CN202010273834.5A 2020-04-09 2020-04-09 Novel display device and display system Active CN113539137B (en)

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