CN113489493A - Time-sharing multiplexing control system and time-sharing multiplexing method for analog-to-digital converter - Google Patents
Time-sharing multiplexing control system and time-sharing multiplexing method for analog-to-digital converter Download PDFInfo
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- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
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- H03M1/122—Shared using a single converter or a part thereof for multiple channels, e.g. a residue amplifier for multiple stages
- H03M1/1225—Shared using a single converter or a part thereof for multiple channels, e.g. a residue amplifier for multiple stages using time-division multiplexing
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Abstract
The invention discloses an analog-digital converter time-sharing multiplexing control system and a time-sharing multiplexing method thereof, which can reduce the occupied chip area and reduce the power consumption and the cost, wherein the control system comprises a CPU, an analog-digital converter, a system bus and a control circuit, the control circuit comprises a selector, a register and a hardware control circuit, the analog-digital converter is connected with the CPU through the system bus, the selector is respectively connected with the analog-digital converter, a data acquisition device, the system bus and the hardware control circuit, one end of the register is connected with the CPU through the system bus, the other end is connected with the selector, and the time-sharing multiplexing method comprises the following steps: the method comprises the steps of collecting data information, selecting a corresponding control signal of a working mode of an analog-to-digital converter, selecting the data information, enabling the analog-to-digital converter to be in a hardware automatic control mode if the data information is real-time data, and enabling a CPU (Central processing Unit) to control the analog-to-digital converter to be in a software control mode within the interval time if the data information is other data.
Description
Technical Field
The invention relates to the technical field of integrated circuits, in particular to an analog-to-digital converter time-sharing multiplexing control system and a time-sharing multiplexing method thereof.
Background
Analog-to-digital converter (ADC) chips are currently classified into two general categories: general MCU, application specific integrated circuit. The analog-to-digital converter of the general MCU is mainly used for processing infrequent analog-to-digital conversion requirements such as current and voltage conversion and the like, and can be matched with the sensor to measure parameters such as pressure, temperature and humidity and perform data conversion; application specific integrated circuits including analog-to-digital converters are typically used in situations with more frequent processing requirements, such as real-time monitoring of temperature, humidity, pressure acquisition and data conversion.
In the prior art, in the process of collecting or testing data such as temperature, humidity, pressure, current, voltage and the like by using a circuit, if some metering data needs to be monitored and converted in real time and other data conversion requirements occasionally exist, the method is usually realized by adopting a multi-mode digital converter, one analog-to-digital converter is specially used for real-time detection and conversion, other conversion is realized by using another analog-to-digital converter, the control of each analog-to-digital converter is realized by a corresponding hardware control circuit, the use of a plurality of analog-to-digital converters not only occupies more chip area, but also a plurality of LDOs (low dropout linear regulators), PGA (programmable gain amplifiers) and the like need to be simultaneously configured for voltage data adjustment and amplification processing, the occupation of the chip area is further increased, and the use of a plurality of LDOs, PGA and ADCs increases the power consumption of the whole chip, the cost is increased.
Disclosure of Invention
The invention provides an analog-digital converter time-sharing multiplexing control system and a time-sharing multiplexing method thereof, aiming at the problems of complex structure, large occupied chip area, high power consumption and high cost of the prior art which adopts a plurality of analog-digital converters to meet the requirements of real-time data conversion and other data conversion.
In order to achieve the purpose, the invention adopts the following technical scheme:
a time-sharing multiplexing control system of an analog-to-digital converter comprises a CPU, the analog-to-digital converter, a system bus and a control circuit, wherein the control circuit comprises a hardware control circuit, and is characterized in that the control circuit also comprises a selector and a register, the analog-to-digital converter is connected with the CPU through the system bus, the selector is respectively connected with the analog-to-digital converter, a data acquisition device, the system bus and the hardware control circuit, one end of the register is connected with the CPU through the system bus, the other end of the register is connected with the selector, and a signal input end of the CPU is connected with a request source signal;
the data acquisition equipment is used for acquiring data information, and the data information comprises real-time data and other data;
the register is used for temporarily storing the working mode of the analog-to-digital converter and the priority of different working modes, wherein the working modes comprise a hardware automatic control mode and a software control mode;
the running time of the analog-to-digital converter comprises first working time and gap time, when the analog-to-digital converter is in the hardware automatic control mode, the running time of the analog-to-digital converter is the first working time, and when other data needs to be converted, the analog-to-digital converter starts the software control mode in the gap time;
the selector is used for selecting data information and corresponding control signals of different working modes.
The method is further characterized in that the real-time data is data needing real-time monitoring, and the other data is data not needing real-time monitoring;
the real-time data includes, but is not limited to, temperature, humidity, pressure;
the other data includes, but is not limited to, current, voltage;
preferably, the registers include at least two;
preferably, the register includes a state control register and a priority register, the state control register is used for temporarily storing the working mode of the analog-to-digital converter, and the priority register is used for temporarily storing the priority of different working modes of the analog-to-digital converter;
preferably, the selector includes at least two;
preferably, the selector includes a data selector and a signal selector, the data selector is respectively connected to the data acquisition device and the analog-to-digital converter, the data selector is configured to select data to be converted of the analog-to-digital converter, the data to be converted is the data information, the signal selector is respectively connected to the system bus and the hardware control circuit, and the signal selector is configured to select corresponding control signals of different working modes of the analog-to-digital converter;
preferably, the analog-to-digital conversion module includes but is not limited to a Flash type analog-to-digital conversion module, an SAR type analog-to-digital conversion module, and a sigma-delta type analog-to-digital conversion module;
preferably, the system bus includes, but is not limited to, an AXI bus, an ACE bus, an AHB bus, a CHI bus, an ATB bus, an ASB bus, and an APB bus.
A time-sharing multiplexing method of an analog-to-digital converter is realized based on the time-sharing multiplexing control system, and is characterized by comprising the following steps: a1, collecting real-time data;
a2, converting the real-time data by an analog-to-digital converter;
a3, collecting other data, and sending a request source signal to a signal input end of a CPU;
a4, the CPU reads and writes the value of the status register after receiving the request source signal;
a5, sending the other data and software control signals of the software control mode to the analog-to-digital converter through a selector;
a6, the analog-to-digital converter starts the software control mode to convert the other data in the gap time;
and A7, after the analog-to-digital converter finishes converting the other data, automatically recovering to a hardware automatic control mode to continue converting the real-time data, and repeating from the step A1 in a circulating manner.
A time-sharing multiplexing method of an analog-to-digital converter is realized based on the time-sharing multiplexing control system, and is characterized by comprising the following steps: b1, collecting other data;
b2, converting the other data by the analog-to-digital converter in a software control mode;
b3, after the analog-to-digital converter completes the conversion of the other data, automatically recovering to a hardware automatic control mode; and after the analog-to-digital converter is restored to the hardware automatic control mode, sequentially circulating the steps A1-A7.
It is further characterized in that the method further comprises the steps of,
if the analog-to-digital converter is in a hardware automatic control mode, the real-time data are sent to the analog-to-digital converter through the data selector, meanwhile, a hardware control signal of a hardware control circuit is sent to the analog-to-digital converter through the signal selector, the analog-to-digital converter converts the real-time data to obtain real-time conversion information and sends the real-time conversion information to a CPU, and at the moment, the analog-to-digital converter is in a first working time;
if the analog-to-digital converter is in a software control mode, the other data are sent to the analog-to-digital converter through the data selector, meanwhile, a software control signal sent by the CPU through a system bus is sent to the analog-to-digital converter through the signal selector, the analog-to-digital converter converts the other data into the software control mode within the interval time to obtain other conversion information, and the other conversion information is sent to the CPU;
when the analog-to-digital converter receives the requests of the hardware automatic control mode and the software control mode at the same time, the analog-to-digital conversion request with low priority level is suspended or discarded in an arbitration mode, and the analog-to-digital conversion request with high priority level is preferentially executed;
other data request sources received by the CPU include two types: when the request source received by the CPU is sent by the external register, the CPU polls the value of the state control register, if the request source received by the CPU is an interrupt, and when an analog-to-digital conversion request exists, the current process of the CPU is interrupted to respond to the analog-to-digital conversion request;
by adopting the structure of the invention, the following beneficial effects can be achieved: the working mode of the analog-to-digital converter comprises a hardware automatic control mode and a software control mode, the running time comprises first working time and gap time, when real-time data needs to be converted, the analog-to-digital converter is in the hardware automatic control mode and is in the first working time, when other data needs to be converted, the analog-to-digital converter is converted into the software control mode in the gap time, time division multiplexing of the analog-to-digital converter is achieved, time division multiplexing control over the analog-to-digital converter based on a register, a selector and the like can be achieved, the requirements of real-time data conversion and other data conversion can be met by using one analog-to-digital converter, a plurality of analog-to-digital converters do not need to be configured, a plurality of LDOs and PGAs (Low drop-out pins) do not need to be configured, the structure is simple, the occupied area of a chip is reduced, and the power consumption and the investment cost are reduced.
The first working time of the analog-digital converter is used for real-time data conversion, the clearance time of the analog-digital converter is used in a software control mode, the clearance time is the idle time of the analog-digital converter between two times of data conversion, the CPU controls the digital converter to be in the software control mode in the clearance time through the system bus to convert other data, the effective utilization of the clearance time of the analog-digital converter is achieved, the power consumption and the cost are reduced, and the conversion efficiency is improved.
Drawings
FIG. 1 is a block diagram of the system architecture of the present invention;
FIG. 2 is a flow chart of a time division multiplexing method of the present invention;
FIG. 3 is a diagram illustrating state transitions under various conditions of the present invention.
Detailed Description
Referring to fig. 1, the control system includes a CPU 1, an analog-to-digital converter 2, a control circuit, a system bus 6, and a data acquisition device 7, the control circuit includes a hardware control circuit 3, a register 4, and a selector 5, the analog-to-digital converter includes, but is not limited to, a Flash analog-to-digital conversion module, an SAR analog-to-digital conversion module, and a sigma-delta analog-to-digital conversion module, the analog-to-digital converter 2 is connected with the CPU 1 through the system bus 6, the register 4 is respectively connected with the system bus 6, the selector 5, and the hardware control circuit 3, and the selector 5 is respectively connected with the analog-to-digital converter 2, the data acquisition device 7, and the register 4, and is connected with the CPU 1 through the system bus 6. In this embodiment, a signal input end of the CPU is connected to a request source signal, where the request source signal includes an interrupt request source signal INT and a request source signal regs sent by an external register.
The data acquisition device 7 is used for acquiring data information, in this embodiment, the data acquisition device includes, but is not limited to, a temperature sensor, a humidity sensor, and a pressure sensor, the data information includes real-time data, and other data, the real-time data includes, but is not limited to, temperature, humidity, and pressure, the other data includes, but is not limited to, voltage and current, the temperature sensor is used for acquiring temperature data in real time, the humidity sensor is used for acquiring humidity data in real time, and the pressure sensor is used for acquiring pressure data in real time. The register 4 comprises a state control register and a priority register, the state control register is used for temporarily storing working modes, the working modes comprise a hardware automatic control mode and a software control mode, the hardware automatic control mode refers to that the data conversion of the analog-digital converter is controlled by adopting the existing hardware control circuit, the software control mode refers to that a corresponding program for controlling the analog-digital converter is arranged in a CPU, and the CPU switches the analog-digital converter from the hardware automatic control mode to the software control mode according to the corresponding program.
The selector 5 comprises a signal selector 51 and a data selector 52, the signal selector 51 sends a hardware control signal of a hardware control circuit or a software control signal transmitted by a system bus to the analog-to-digital converter, and the data selector 52 sends the data to be converted: real-time data or other data is sent to the analog-to-digital converter. The register 4 includes a status control register 41 and a priority register 42, wherein the status control register 41 is used for temporarily storing the working mode of the analog-to-digital converter, the working mode is represented by numerical values "1" and "0", wherein "1" represents the hardware automatic control mode, and "0" represents the software control mode, the working states of the selector and the hardware automatic controller are determined based on the value of the status control register, the priority of different working modes of the analog-to-digital converter is temporarily stored in the priority register, the priority is configured according to the actual requirement, when the analog-to-digital converter receives the analog-to-digital conversion requests of the hardware automatic control mode and the software control mode at the same time, the arbitration mode is adopted to suspend or discard the analog-to-digital conversion request with low level, the analog-to-digital conversion request with high level is preferentially executed, wherein the suspend means execute the analog-to-digital conversion request with high level after the analog-to-digital conversion request with high level is completely executed, and automatically returning to the analog-to-digital conversion process with a low level, wherein the discarding means discarding the request for executing the analog-to-digital conversion with the low level.
The working mode of the analog-digital converter 2 is switched based on the value of a state control register in the control circuit, the CPU changes the value of the state control register according to the request source signal of an interrupt or an external register, the state control register and a priority register can be accessed (read and written) by the CPU through a system bus in a hardware automatic control mode and a software control mode, the analog-digital converter works in different modes according to different values in the state control register, when the mode converter is in the hardware control circuit control mode, in the control circuit, other registers except the state control register and the priority register can be accessed by the CPU, the working mode of the analog-digital converter is controlled by corresponding control signals, when the analog-digital converter is in the software control mode, all registers of the control circuit can be accessed by the CPU, the working mode of the analog-digital converter performs corresponding operation according to the value of the state control register, the effect of controlling the mode converter is achieved by the CPU through controlling the register in the control circuit.
In this embodiment, the running time of the analog-to-digital converter 2 includes a first working time and a gap time, and when the analog-to-digital converter 2 is in the hardware automatic control mode, the running time of the analog-to-digital converter 2 is the first working time. The first working time is the time for the analog-to-digital converter 2 to convert the real-time data in the hardware automatic control mode, and the gap time is the time for the analog-to-digital converter to be in an idle state in the hardware automatic control mode. In most real-time monitoring systems of the prior art, the conversion requirements of the analog-to-digital converter 2 are not always present, but only once conversion at a certain time, so that the analog-to-digital converter 2 has a certain time to be idle and in a non-working state between two consecutive conversions, for example, the analog-to-digital converter 2 needs to perform data conversion every 100ms, whereas the actual conversion time of the ADC block 1 is 1ms, the following 99ms may be used for system data processing etc., within the 99ms, the adc 2 is in an idle state, and other adc can be performed, and the state transition situation is shown in 3a in fig. 3, and the application uses the idle state time (idle state time, i.e. gap time) of the adc 2, based on the idea, therefore, a single analog-to-digital converter 2 can be used for real-time monitoring application and can meet the conversion requirements of other data in idle time.
Referring to fig. 2, a time-sharing multiplexing method for an analog-to-digital converter is implemented based on the time-sharing multiplexing control system, and includes at least three state transition modes, in a real-time monitoring system, the analog-to-digital converter 2 is in a hardware automatic control mode for converting real-time data most of the time, and when there is a conversion request for other data occasionally, the following time-sharing multiplexing method is adopted, and the method includes the specific steps: a1, collecting real-time data through data collection equipment; real-time data is sent to the analog-to-digital converter through the data selector, and meanwhile, a hardware control signal of the hardware control circuit is sent to the analog-to-digital converter through the signal selector, so that the analog-to-digital converter is in a hardware automatic control mode;
a2, converting the real-time data by an analog-to-digital converter;
when other signal conversion requests exist, the following steps are adopted: a3, acquiring other data through data acquisition equipment, and sending a request source signal to a signal input end of a CPU;
a4, after receiving the request source signal, the CPU reads and writes the value of the state control register;
a5, other data are sent to the analog-to-digital converter through the data selector, and the software control signal of the software control mode is sent to the analog-to-digital converter through the signal selector;
a6, starting a software control mode by the analog-to-digital converter in the gap time to convert other data;
and A7, after the analog-to-digital converter finishes the conversion of the other data, automatically recovering to a hardware automatic control mode to continue to convert the real-time data, returning to the step A1 to circulate, and realizing the time-sharing multiplexing of the analog-to-digital converter. The steps a 1-a 7 are mainly used when the hardware automatic control mode request and the software control mode request do not overlap, and the state transition is shown in fig. 3 a.
In the time-sharing multiplexing method, if the analog-to-digital converter is in a hardware automatic control mode, real-time data are sent to the analog-to-digital converter through the data selector, meanwhile, a hardware control signal of the hardware control circuit is sent to the analog-to-digital converter through the signal selector, the analog-to-digital converter converts the real-time data, real-time conversion information is obtained, the real-time conversion information is sent to the CPU, and at the moment, the analog-to-digital converter is in a first working time. If the analog-to-digital converter is in a software control mode, other data are sent to the analog-to-digital converter through the data selector, meanwhile, a software control signal sent by the CPU through the system bus is sent to the analog-to-digital converter through the signal selector, the analog-to-digital converter converts the other data into the software control mode within the interval time to obtain other conversion information, and the other conversion information is sent to the CPU.
As another embodiment of the foregoing time division multiplexing method, if the adc is in the software control mode and has a request of the hardware automatic control mode in the conversion process of other data, or the adc is in the hardware automatic control mode and has a request of the software control mode, that is, when a situation that a request of the hardware automatic control mode and a request of the software control mode overlap occurs in the conversion process of real-time data, the adc request with a low priority level is suspended or discarded in the arbitration mode, and the adc request with a high priority level is preferentially executed. Whether two requests overlap or do not overlap, other data request sources received by the CPU include at least two types: when the request source received by the CPU is sent by the external register, the CPU polls the value of the state control register, if the request source received by the CPU is an interrupt, and when an analog-to-digital conversion request exists, the current process of the CPU is interrupted to respond to the analog-to-digital conversion request.
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments.
Referring to fig. 1, a schematic diagram of a time-division multiplexing system of an analog-to-digital converter is provided in the embodiment of the present invention, where the analog-to-digital converter interacts with a system bus through a control circuit and also serves as a part of a real-time monitoring circuit, when a working mode of the analog-to-digital converter is a hardware automatic control mode, except that a status control register and a priority register can be accessed by a CPU, other registers cannot be accessed by the CPU, interaction between the analog-to-digital converter and the system bus fails, and the analog-to-digital converter repeatedly and intermittently performs mode conversion of the real-time monitoring circuit as a submodule of the real-time monitoring circuit; when the working mode of the analog-to-digital converter is a software control mode, the function of the analog-to-digital converter as a real-time monitoring circuit submodule fails, and the analog-to-digital converter as a basic peripheral is controlled by a system bus and a related register. The value of the state control register can be accessed by the bus, so that the working mode of the analog-digital converter is changed, and the control signal of the analog-digital converter and the data to be converted are selected by the data selector.
Fig. 3 is a diagram illustrating state transition under different conditions. Other data analog-to-digital conversion requests of other parts of the system are received by the CPU, and then the value of the state control register is changed through a system bus, so that the working state of the analog-to-digital converter is changed, and other data analog-to-digital conversion request sources of other parts received by the CPU comprise two types: registers and interrupts. If some peripheral equipment needs to request analog-to-digital conversion, a relevant register is set, and in the situation, a CPU (central processing unit) needs to poll the value of the register to prevent the analog-to-digital conversion request from being not responded; the other request source is an interrupt, when an analog-to-digital conversion request exists, the current process of the CPU is directly interrupted to respond to the analog-to-digital conversion request, and the request source can obtain a more timely response. Fig. 3a shows a data conversion state transition diagram in which no overlapping request occurs between the hardware automatic control mode and the software control mode, fig. 3b shows a data conversion state transition diagram in which there is another data conversion request when the analog-to-digital converter is in the hardware automatic control mode to convert the real-time data, fig. 3c shows a data conversion state transition diagram in which there is a real-time data conversion request when the analog-to-digital converter is in the software control mode to convert the other data, where "hard" in 3a, 3b, and 3c in fig. 3 denotes the hardware automatic control mode and "soft": software control mode, "mode": mode, "trans": analog-to-digital conversion, "finish": analog-to-digital conversion is completed, "S": initially, "W": wait, "r 1": monitoring data analog-to-digital conversion request, "r 2": the analog-to-digital conversion requests of other parts of the system, the 'p 1' monitoring data analog-to-digital conversion request has high priority, and the 'p 2' other data analog-to-digital conversion requests of other parts of the system have high priority.
Referring to fig. 1, 2, and 3, the description of the test example is made, where the analog-to-digital converter of the chip after being powered on is in a hardware automatic mode, the analog-to-digital converter waits for a real-time data conversion request and performs real-time data conversion, and when the analog-to-digital converter in the hardware automatic control mode is in a non-working state (i.e., in a gap time), the analog-to-digital converter can receive analog-to-digital conversion requests from other parts of the system and adjust the working mode to a software control mode, then respond to the analog-to-digital conversion, and after the conversion is completed, adjust the working mode to the hardware automatic control mode again, and wait for a monitoring data conversion request or analog-to-digital conversion requests from other parts again. Generally, data conversion is not frequently required in other parts of the system, and conversion can be completed between two real-time data conversions. For the whole system, the analog-to-digital converter works in a hardware automatic control mode most of the time, and when other parts of the system have other data conversion requests at a certain time, the CPU changes the value of the state control register to convert the working state of the analog-to-digital converter.
The following are two state transition situations when the hardware automatic control mode and the software control mode are overlapped: referring to 3b in fig. 3, when monitoring data is undergoing analog-to-digital conversion, an analog-to-digital converter arbitration occurs when receiving an analog-to-digital conversion request of other data, at this time, it needs to determine which analog-to-digital conversion has a high priority according to a value of a priority register, if the priority of a hardware automatic control mode is high, a data conversion request of other parts of the system is temporarily suspended, after the real-time data analog-to-digital conversion is completed, other data conversion of other parts of the system is performed, after the other data conversion is completed, a state control register is automatically changed, and the system is restored to the hardware automatic control mode. If the priority of the system software control mode is high, the ongoing real-time data conversion is immediately stopped (namely, an analog-digital conversion request with low priority is discarded), the analog-digital converter immediately performs analog-digital conversion of other data, the real-time data conversion is not effective any more, similarly, after the analog-digital conversion of other data is completed, the state control register is automatically changed, and the system is restored to the hardware automatic control mode. On the other hand, as shown in fig. 3c, when the adc is in the software control mode, performing other data adc, and if a real-time data conversion request is sent, the response process at this time is slightly different from the above situation, first, the value of the status control register changes, and if the priority of other data adc of other parts is high, the real-time data adc request is invalid, and the adc continues to complete the ongoing adc of other parts of the system, and if the priority of the hardware automatic control mode is high, the ongoing adc of other parts of the system immediately stops, and the adc immediately performs real-time data conversion, and at this time, other data conversion is no longer valid. If the two types of analog-to-digital conversion do not have time overlap, when other data analog-to-digital conversion requests of other parts of the system occur, the analog-to-digital converter is changed from a hardware automatic control mode to a software control mode for a short time, and the hardware automatic control mode is recovered after the conversion is completed, as shown in fig. 3 a. Therefore, the purpose of time-sharing multiplexing is achieved through switching of the working modes of the analog-to-digital converter.
The above is only a preferred embodiment of the present application, and the present invention is not limited to the above embodiments. It is to be understood that other modifications and variations directly derived or suggested to those skilled in the art without departing from the spirit and scope of the invention are to be considered as included within the scope of the invention.
Claims (10)
1. A time-sharing multiplexing control system of an analog-to-digital converter comprises a CPU, the analog-to-digital converter, a system bus and a control circuit, wherein the control circuit comprises a hardware control circuit, and is characterized in that the control circuit also comprises a selector and a register, the analog-to-digital converter is connected with the CPU through the system bus, the selector is respectively connected with the analog-to-digital converter, a data acquisition device, the system bus and the hardware control circuit, one end of the register is connected with the CPU through the system bus, the other end of the register is connected with the selector, and a signal input end of the CPU is connected with a request source signal;
the data acquisition equipment is used for acquiring data information, and the data information comprises real-time data and other data;
the register is used for temporarily storing the working mode of the analog-to-digital converter and the priority of different working modes, wherein the working modes comprise a hardware automatic control mode and a software control mode;
the running time of the analog-to-digital converter comprises first working time and gap time, when the analog-to-digital converter is in the hardware automatic control mode, the running time of the analog-to-digital converter is the first working time, and when other data needs to be converted, the analog-to-digital converter starts the software control mode in the gap time;
the selector is used for selecting data information and corresponding control signals of different working modes.
2. The time-division multiplexing control system of an analog-to-digital converter according to claim 1, wherein the real-time data is data that needs to be monitored in real time, and the other data is data that does not need to be monitored in real time; the real-time data includes, but is not limited to, temperature, humidity, pressure, and the other data includes, but is not limited to, current, voltage.
3. The analog-to-digital converter time-division multiplexing control system according to claim 1 or 2, wherein the registers include at least two; the registers comprise a state control register and a priority register, wherein the state control register is used for temporarily storing the working mode of the analog-to-digital converter, and the priority register is used for temporarily storing the priority of different working modes of the analog-to-digital converter; the selector comprises at least two; the selector comprises a data selector and a signal selector, the data selector is respectively connected with the data acquisition equipment and the analog-to-digital converter, the data selector is used for selecting data to be converted of the analog-to-digital converter, the data to be converted is the data information, the signal selector is respectively connected with the system bus and the hardware control circuit, and the signal selector is used for selecting corresponding control signals of different working modes of the analog-to-digital converter.
4. The time-sharing multiplexing control system of claim 3, wherein the analog-to-digital conversion module comprises but is not limited to a Flash type analog-to-digital conversion module, a SAR type analog-to-digital conversion module, a sigma-delta type analog-to-digital conversion module; the system bus includes, but is not limited to, an AXI bus, an ACE bus, an AHB bus, a CHI bus, an ATB bus, an ASB bus, and an APB bus.
5. A time-division multiplexing method of an analog-to-digital converter, which is implemented based on the time-division multiplexing control system of claim 1, wherein the method comprises: a1, collecting real-time data;
a2, converting the real-time data by an analog-to-digital converter;
a3, collecting other data, and sending a request source signal to a signal input end of a CPU;
a4, the CPU reads and writes the value of the status register after receiving the request source signal;
a5, sending the other data and software control signals of the software control mode to the analog-to-digital converter through a selector;
a6, the analog-to-digital converter starts the software control mode to convert the other data in the gap time;
and A7, after the analog-to-digital converter finishes converting the other data, automatically recovering to a hardware automatic control mode to continue converting the real-time data, and repeating from the step A1 in a circulating manner.
6. A time-division multiplexing method of an analog-to-digital converter, which is implemented based on the time-division multiplexing control system of claim 1, wherein the method comprises: b1, collecting other data;
b2, converting the other data by the analog-to-digital converter in a software control mode;
b3, after the analog-to-digital converter completes the conversion of the other data, automatically recovering to a hardware automatic control mode; and after the analog-to-digital converter is restored to the hardware automatic control mode, sequentially circulating the steps A1-A7.
7. The time-sharing multiplexing method of the analog-to-digital converter according to claim 5 or 6, wherein if the analog-to-digital converter is in a hardware automatic control mode, the real-time data is sent to the analog-to-digital converter through the data selector, and simultaneously, a hardware control signal of a hardware control circuit is sent to the analog-to-digital converter through the signal selector, the analog-to-digital converter converts the real-time data to obtain real-time conversion information and sends the real-time conversion information to a CPU, and at this time, the analog-to-digital converter is in a first working time.
8. The time-sharing multiplexing method of the analog-to-digital converter according to claim 7, wherein if the analog-to-digital converter is in a software control mode, the other data is sent to the analog-to-digital converter through the data selector, and meanwhile, a software control signal sent by the CPU through a system bus is sent to the analog-to-digital converter through the signal selector, and the analog-to-digital converter converts the other data in a software control mode within a gap time to obtain other conversion information and sends the other conversion information to the CPU.
9. The time-division multiplexing method of claim 8, wherein when the adc receives the requests of the hardware-controlled mode and the software-controlled mode simultaneously, the adc suspends or discards the requests of the low priority level and preferentially executes the requests of the high priority level.
10. The time-division multiplexing method of the analog-to-digital converter according to claim 9, wherein the other data request sources received by the CPU include two types: when the request source received by the CPU is sent by the external register, the CPU polls the value of the state control register, if the request source received by the CPU is an interrupt, and when an analog-to-digital conversion request exists, the current process of the CPU is interrupted to respond to the analog-to-digital conversion request.
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