CN213402824U - Power supply control integrated circuit and electronic device - Google Patents

Abstract

The embodiment of the application provides a power control integrated circuit and electronic equipment. The power control integrated circuit comprises a plurality of groups of control circuits, wherein one group of control circuits controls one power supply; wherein, a set of control circuit includes: an analog-to-digital converter, a processor, and a PWM generator. This eliminates the need to switch the input power supply, and allows a high throughput to be achieved, and thus, various power supplies can be controlled in a timely manner at a high control frequency.

Description

Power supply control integrated circuit and electronic device

Technical Field

The present application relates to the field of power control technologies, and in particular, to a power control integrated circuit and an electronic device.

Background

Currently, a plurality of power supplies are often mounted on electronic equipment, and for example, in-vehicle equipment has power supplies for various purposes. There is a high demand for miniaturization of power supplies of various potentials required for in-vehicle equipment. A multi-output Integrated Power Management apparatus capable of realizing Power miniaturization may be referred to as a Power control Integrated Circuit (IC) or a Power Management Integrated Circuit (PMIC).

The power control integrated circuit may calculate the inherent voltage or current, etc. for the electronic device. In addition, a system monitoring function and a power management function can be realized. In a general power control integrated circuit, a plurality of Analog input power supplies are sequentially converted by an Analog Digital Converter (ADC) by switching Analog switches.

It should be noted that the above background description is provided only for the sake of clarity and complete description of the technical solutions of the present application, and for the understanding of those skilled in the art. Such solutions are not considered to be known to the person skilled in the art merely because they have been set forth in the background section of the present application.

SUMMERY OF THE UTILITY MODEL

However, the inventors found that: in the conventional power supply control integrated circuit, since a changeover switch is used, it is necessary to arrange timing at which each analog input power supply is switched and in which order of priority. Therefore, there is a problem that throughput is poor, and the degree of freedom for switching timing is low. This imposes a large constraint on the multi-output integrated power management that is desired to control a plurality of power sources in a timely manner at a high control frequency.

In order to solve at least one of the above problems, embodiments of the present application provide a power control integrated circuit and an electronic device. The input power supply does not need to be switched, the throughput is high, and the various power supplies can be controlled in time at a high control frequency.

According to an aspect of the embodiments of the present application, there is provided a power control integrated circuit for controlling a plurality of power supplies, the power control integrated circuit including a plurality of sets of control circuits, wherein one set of control circuits controls one power supply of the plurality of power supplies; the set of control circuits includes:

an analog-to-digital converter that detects a potential of the one power supply and converts the potential into a digital signal;

a processor that determines on and/or off times for pulse width modulating the one power supply based on the digital signal; and

a PWM generator that generates a pulse width modulation signal according to a result of the processor.

In some embodiments, one of the sets of control circuits controls the respective power supply independently of the other sets of control circuits.

In some embodiments, the analog-to-digital converter is a successive comparison type analog-to-digital converter.

In some embodiments, the analog-to-digital converter samples the potential of the one power supply all the time other than the time of conversion.

In some embodiments, the analog-to-digital converter directly detects the potential of the one power supply, and there is no switching means between the analog-to-digital converter and the one power supply for switching the input signal.

In some embodiments, the processor has a core including a pipeline structure including an instruction fetch section, a decode operation section, and a result storage section.

In some embodiments, at least an instruction storing section and an instruction holding section are included in the instruction obtaining section; the instruction holding unit holds the acquired instruction when the waiting instruction is executed.

In some embodiments, the decode operation section acquires the held instruction from the instruction holding section and continues the decode operation according to the held instruction when the wait cancellation signal is received.

In some embodiments, the power control integrated circuit further comprises:

a main processor controlling the plurality of sets of control circuits.

According to another aspect of embodiments of the present application, there is provided an electronic device including a plurality of power sources, the electronic device further including:

the power control integrated circuit as described above; and

and the power converter comprises a switching element which is switched on and/or switched off according to the pulse width modulation signal output by the power supply control integrated circuit.

One of the beneficial effects of the embodiment of the application lies in: the power control integrated circuit comprises a plurality of groups of control circuits, and one group of control circuits controls one power supply; wherein, a set of control circuit includes: an analog-to-digital converter, a processor, and a PWM generator. This eliminates the need to switch the input power supply, and allows a high throughput to be achieved, and thus, various power supplies can be controlled in a timely manner at a high control frequency.

Specific embodiments of the present application are disclosed in detail with reference to the following description and drawings, indicating the manner in which the principles of the application may be employed. It should be understood that the embodiments of the present application are not so limited in scope. The embodiments of the application include many modifications, variations and equivalents within the spirit and scope of the appended claims.

Drawings

The accompanying drawings, which are included to provide a further understanding of the embodiments of the application, are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain the principles of the application. It is obvious that the drawings in the following description are only some embodiments of the application, and that for a person skilled in the art, other drawings can be derived from them without inventive effort. In the drawings:

FIG. 1 is a schematic diagram of a power control integrated circuit according to an embodiment of the present application;

FIG. 2 is a schematic diagram of the pipeline structure of the processor in the embodiment of the present application;

FIG. 3 is an exemplary diagram of pipeline processing while waiting in a coherent processor mechanism;

FIG. 4 is a diagram illustrating an example of pipe processing while waiting in the processor mechanism according to an embodiment of the present application.

Detailed Description

The foregoing and other features of the present application will become apparent from the following description, taken in conjunction with the accompanying drawings. In the description and drawings, particular embodiments of the application are disclosed in detail as being indicative of some of the embodiments in which the principles of the application may be employed, it being understood that the application is not limited to the described embodiments, but, on the contrary, is intended to cover all modifications, variations, and equivalents falling within the scope of the appended claims.

In the embodiments of the present application, the terms "first", "second", "1", "2", and the like are used for distinguishing between different elements by nomenclature, but do not denote a spatial arrangement, a temporal order, or the like of the elements, and the elements should not be limited by these terms. The term "and/or" includes any and all combinations of one or more of the associated listed terms. The terms "comprising," "having," and the like, refer to the presence of stated features, elements, components, and do not preclude the presence or addition of one or more other features, elements, components, and/or groups thereof.

In the embodiments of the present application, the singular forms "a", "an", and the like may include the plural forms and should be interpreted broadly as "a" or "an" and not limited to the meaning of "a" or "an"; furthermore, the term "comprising" should be understood to include both the singular and the plural, unless the context clearly dictates otherwise. Further, the term "according to" should be understood as "at least partially according to … …" unless the context clearly dictates otherwise.

Embodiments of the present application will be described below with reference to the drawings. In the present embodiment, the plurality of power supplies may have different potentials; in addition, the plurality of power supplies may be respectively located in a plurality of power devices independent from each other, or may be integrated into one power device, and the embodiment of the present application is not limited to a specific form thereof.

Embodiments of the first aspect

The embodiment of the application provides a power control integrated circuit which controls a plurality of power supplies. Fig. 1 is a schematic diagram of a power control integrated circuit according to an embodiment of the present disclosure, and as shown in fig. 1, the power control integrated circuit 100 controls a plurality of power sources in a power device 110.

As shown in fig. 1, the plurality of power sources includes, for example: power supply 1 (shown as 0.8V, 2.2A), power supply 2 (shown as 1.8V, 1.2A), power supply 3 (shown as 0.9V, 0.8A), power supply 4 (shown as 1.2V, 0.8A), power supply 5 (shown as 3.3V, 0.5A), power supply 6 (shown as 5.0V, 0.2A), and power supply 7 (shown as 20V, 0.01A). The power supply of the embodiment of the present application has been described above only by way of example, and the present application is not limited thereto.

As shown in fig. 1, the power control integrated circuit 100 includes a plurality of sets of control circuits 101, each set of control circuits 101 (including 101-1 … …) controlling one of a plurality of power supplies. For example, the control circuit 101-1 controls the power supply 1, … …. As another example, the plurality of sets of control circuits 101 are included in a Micro Controller Unit (MCU).

As shown in fig. 1, each set of control circuits (taking 101-1 as an example) includes:

an analog-to-digital converter (ADC)111 that detects a potential of one power source (e.g., power source 1) and converts the potential into a digital signal;

a processor 112 determining an ON (ON) and/or OFF (OFF) time for Pulse Width Modulation (PWM) of the one power supply according to the digital signal; and

a PWM generator 113 that generates a pulse width modulation signal according to the result of the processor.

In the embodiment of the present application, specific contents of PWM control and PWM signals (ON/OFF width, etc.) can refer to related technologies, and are not described herein again. Thus, the user does not need to consider the content of the switching schedule, does not need to switch the input power supply, has high throughput, and can control a plurality of types of power supplies in time at a high control frequency.

In some embodiments, one of the sets of control circuits controls the respective power supply independently of the other sets of control circuits. For example, the control circuit 101-1 is capable of independent control of the power supply 1 relative to other control circuits, … ….

Thus, the power supply control integrated circuit according to the embodiment of the present invention can independently start a/D conversion at any time when necessary, and can further increase the control frequency. Further, it is possible to realize that a plurality of power supply control, system management, and monitoring are performed without interfering with each other.

In some embodiments, as shown in fig. 1, the power control integrated circuit 100 further includes:

a main processor 102 that controls the plurality of sets of control circuits 101.

It should be noted that fig. 1 only schematically illustrates the power control integrated circuit of the present application, but the present application is not limited thereto; for example, other components or devices may be provided, and specific reference may be made to the related art, and the description thereof will be omitted. Reference may be made to the related art for elements or components not specifically identified in fig. 1, which are not intended to be limiting in this application.

In some embodiments, analog-to-digital converter 111 is a successive comparison type analog-to-digital converter. For example, the analog-to-digital converter 111 samples the potential of the one power supply all the time except the timing of performing conversion. The sampled information may be held, and the comparison and conversion may be performed at the time when the conversion is performed.

This makes it possible to obtain the result of the a/D conversion in a short time and to further increase the control frequency. However, the present application is not limited to this, and for example, other types of ADCs are also possible, and reference may be made to the related art for details of the ADC or the successive comparison ADC.

In some embodiments, the analog-to-digital converter 111 directly detects the potential of the one power supply, and there is no switching component between the analog-to-digital converter 111 and the one power supply for switching the input signal. Thus, the ADC can be provided in a one-to-one manner for an analog input to be voltage-monitored.

The analog-to-digital converter is schematically described above, and the processor is schematically described below.

In some embodiments, processor 112 has a core that includes a pipeline (pipeline) structure that includes an instruction fetch section, a decode operation section, and a result storage section.

Fig. 2 is a schematic diagram of a pipeline structure of a processor core in the embodiment of the present application, and as shown in fig. 2, a pipeline structure 200 includes an instruction obtaining portion 201, a decode operation portion 202, and a result storage portion 203. As shown in fig. 2, instruction fetch section 201 includes at least an instruction storage section 2011 (e.g., an instruction register) and an instruction holding section 2012; the instruction holding unit 2012 holds the instruction that has been fetched when a wait (wait) instruction is executed.

FIG. 3 is a diagram of an example of pipeline processing in a coherent processor mechanism, such as that shown in FIG. 3, in which the processor discards (drop) an fetched corresponding instruction when it executes wait after executing instruction 1. Upon receiving the wait release signal, the processor will re-execute the instruction (e.g., as indicated by FE of instruction 3).

Fig. 4 is a diagram illustrating an example of pipeline processing during a wait in the processor mechanism according to the embodiment of the present application, and as shown in fig. 4, when the processor executes wait after executing instruction 1, the processor stops executing the corresponding instruction, and instruction holder 2012 holds the instruction that has been fetched during the wait for execution (wait).

As shown in fig. 4, in the embodiment of the present application, when receiving the wait release signal, the decode operation unit 202 may obtain the held instruction (for example, as shown in DE of instruction 3) from the instruction holding unit 2012 without re-executing the instruction, and continue the decode operation according to the held instruction.

Thus, the pipeline-structured processor of the embodiments of the present application is able to respond to the event signal from the ADC in minimal time. That is, the processor does not need to acquire the instruction again when the wait is released by keeping the instruction information in the pipeline in the wait event state; thus, the embodiment of the application can respond to the event earlier than the relevant processor mechanism.

It should be noted that fig. 2 to 4 only schematically illustrate the processor of the present application, but the present application is not limited thereto; for example, other components or devices may be provided, and specific reference may be made to the related art, and the description thereof will be omitted. Reference may be made to the related art for elements or components not specifically identified in fig. 2 through 4, which are not intended to be limited by the present application.

In the embodiment of the present application, the Processor 112 in each set of the control circuit 101 may be a Digital Signal Processor (DSP) or the like, but the present application is not limited thereto, and may also be, for example, an EPU or the like. The power control integrated circuit 100 may be integrated in a Micro Controller Unit (MCU).

In some embodiments, by digitally controlling the power supply, in addition to quick load response and high efficiency, functions required on the vehicle, such as communication with the Host computer (Host), abnormality detection, noise removal, and EMI countermeasure, can be realized using both hardware and software.

In some embodiments, the power control integrated circuit 100 may have 1 host processor (e.g., the host processor 120 shown in fig. 1) and a plurality of dedicated cores (e.g., the processor 112 shown in fig. 1) built in for multiple outputs, and may be capable of digitally controlling a plurality of power supplies independently and in time.

The above embodiments are merely illustrative of the embodiments of the present application, but the present application is not limited thereto, and appropriate modifications may be made on the basis of the above embodiments. For example, the above-described embodiments may be used alone, or one or more of the above-described embodiments may be combined.

In the above embodiment, the power control integrated circuit includes a plurality of sets of control circuits, and one set of control circuits controls one power supply; wherein, a set of control circuit includes: an analog-to-digital converter, a processor, and a PWM generator. This eliminates the need to switch the input power supply, and allows a high throughput to be achieved, and thus, various power supplies can be controlled in a timely manner at a high control frequency.

Embodiments of the second aspect

An embodiment of the present application further provides an electronic device, and the same contents as those in the embodiment of the first aspect are not repeated.

As shown in fig. 1, the electronic apparatus 10 includes a plurality of power supplies having different potentials, for example, a plurality of power supplies (power supply 1, power supply 2 … …) in the power device 110. As shown in fig. 1, the electronic device 10 further includes a power control integrated circuit 100 according to an embodiment of the first aspect; and a power converter 120 (e.g., a plurality).

The power converter 120 includes a switching element 121, and the switching element 121 is turned on and/or off according to a Pulse Width Modulation (PWM) signal output from the power control integrated circuit 100. For details of the power converter (or may also be referred to as a power converter), reference may be made to the related art.

As shown in fig. 1, the main processor 102 in the power control integrated circuit 100 can also perform data communication with an external device (e.g., the host 20 shown in fig. 1), and can also control other power supplies (e.g., the power supply 8 shown by 5.0V and 0.7A, and the power supply 9 shown by 3.3V and 0.6A) through a Low Dropout regulator (LDO).

The above embodiments are merely illustrative of the embodiments of the present application, but the present application is not limited thereto, and appropriate modifications may be made on the basis of the above embodiments. For example, the above-described embodiments may be used alone, or one or more of the above-described embodiments may be combined.

The present application has been described in conjunction with specific embodiments, but it should be understood by those skilled in the art that these descriptions are intended to be illustrative, and not limiting. Various modifications and adaptations of the present application may occur to those skilled in the art based on the spirit and principles of the application and are within the scope of the application.

Preferred embodiments of the present application are described above with reference to the accompanying drawings. The many features and advantages of the embodiments are apparent from the detailed specification, and thus, it is intended by the appended claims to cover all such features and advantages of the embodiments that fall within the true spirit and scope thereof. Further, since numerous modifications and variations will readily occur to those skilled in the art, it is not desired to limit the embodiments of the present application to the exact construction and operation illustrated and described, and accordingly, all suitable modifications, variations and equivalents may be resorted to, falling within the scope thereof.

Claims (10)

1. A power control integrated circuit for controlling a plurality of power sources, the power control integrated circuit comprising a plurality of sets of control circuits, wherein a set of control circuits controls one of the plurality of power sources; the set of control circuits includes:

an analog-to-digital converter that detects a potential of the one power supply and converts the potential into a digital signal;

a processor that determines on and/or off times for pulse width modulating the one power supply based on the digital signal; and

a PWM generator that generates a pulse width modulation signal according to a result of the processor.

2. The power control integrated circuit of claim 1, wherein one of the sets of control circuits independently controls the respective power supply relative to the other sets of control circuits.

3. The power control integrated circuit of claim 1, wherein the analog-to-digital converter is a successive approximation analog-to-digital converter.

4. A power control integrated circuit as claimed in claim 3, wherein the analogue to digital converter samples the potential of the one power supply at all times other than when conversion is taking place.

5. The power control integrated circuit of claim 1, wherein the analog-to-digital converter directly detects the potential of the one power supply, and there is no switching component between the analog-to-digital converter and the one power supply for switching the input signal.

6. The power control integrated circuit according to claim 1, wherein the processor has a core including a pipeline structure including an instruction fetch section, a decode operation section, and a result storage section.

7. The power control integrated circuit according to claim 6, wherein the instruction acquisition section includes at least an instruction storage section and an instruction holding section; the instruction holding unit holds the acquired instruction when the waiting instruction is executed.

8. The power supply control integrated circuit according to claim 7, wherein the decode operation unit acquires the held instruction from the instruction holding unit and continues the decode operation based on the held instruction when receiving the wait cancellation signal.

9. The power control integrated circuit according to any one of claims 1 to 8, further comprising:

a main processor controlling the plurality of sets of control circuits.

10. An electronic device comprising a plurality of power sources, the electronic device further comprising:

the power control integrated circuit of any of claims 1 to 9; and

and the power converter comprises a switching element which is switched on and/or switched off according to the pulse width modulation signal output by the power supply control integrated circuit.

Images