CN108205371B - Power supply chip, power supply and electric energy supply method - Google Patents

Power supply chip, power supply and electric energy supply method Download PDF

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Publication number
CN108205371B
CN108205371B CN201611185251.7A CN201611185251A CN108205371B CN 108205371 B CN108205371 B CN 108205371B CN 201611185251 A CN201611185251 A CN 201611185251A CN 108205371 B CN108205371 B CN 108205371B
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power supply
power
voltage
chip
control signal
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CN108205371A (en
Inventor
付玉堂
段向阳
封葳
班卫全
王玺
王文静
王雪松
赵金栓
刘亮
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ZTE Corp
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ZTE Corp
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Priority to PCT/CN2017/111658 priority patent/WO2018113464A1/en
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/266—Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/28—Supervision thereof, e.g. detecting power-supply failure by out of limits supervision
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0016—Inter-integrated circuit (I2C)

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)
  • Direct Current Feeding And Distribution (AREA)

Abstract

The embodiment of the invention provides a power supply chip, which comprises a chip body and M bus interfaces arranged on the power supply chip body; each power bus interface supports S types of power buses, and M, S is a positive integer; the power supply chip is used for outputting a first control signal comprising a voltage control signal. The embodiment of the invention also provides a power supply and an electric energy supply method.

Description

Power supply chip, power supply and electric energy supply method
Technical Field
The invention relates to the field of power supplies, in particular to a power supply chip, a power supply and an electric energy supply method.
Background
At present, power supply design is required in circuit board design of many devices such as communication electronic equipment and Information Technology (IT) servers, and the power supply to be designed is often large in power requirement and various in voltage. The current common power supply design is divided into an independent power supply design and an on-board power supply design.
For the on-board power supply design, an existing power supply design scheme is introduced by Texas Instruments (TI) chip manufacturers, and the scheme is based on a System Management Bus (SMBus), and outputs square wave driving Metal Oxide Semiconductor (MOS) tubes with different duty ratios through the control of a CPU to output a set voltage.
Disclosure of Invention
In view of this, embodiments of the present invention provide a power chip, a power supply, and an electric energy providing method, which can avoid the problem of complicated circuit design caused by various voltages, large differences, and different power-on time sequences required by a target chip, and facilitate subsequent circuit debugging and maintenance.
The technical scheme of the embodiment of the invention is realized as follows:
a power chip comprises a power chip body and M power bus interfaces arranged on the power chip body; each power bus interface supports S types of power buses, and M, S is a positive integer;
the power supply chip is used for outputting a first control signal, wherein the first control signal comprises a voltage control signal.
As described above, the first control signal further includes a timing control signal.
The power supply chip is further configured to obtain a voltage feedback signal and output a second control signal according to the voltage feedback signal; wherein the second control signal comprises a voltage adjustment signal.
As described above, when the power supply chip is used, each of the power supply bus interfaces is connected to at least one power supply conversion unit through any one of the S types of power supply buses;
the power supply chip is specifically configured to output a first control signal to the power supply conversion unit.
The power supply chip is specifically configured to obtain a voltage feedback signal output by the power supply conversion unit, and output a second control signal to the power supply conversion unit according to the voltage feedback signal.
The power chip as described above, the power chip body includes:
the MCU is connected with the signal output unit;
the MCU is used for acquiring a voltage value of the voltage required by the power bus according to the type of the power bus and outputting a voltage control signal to the signal output unit;
the signal output unit is used for outputting a first control signal according to the voltage control signal.
The power supply chip is characterized in that the MCU is further used for acquiring a power-on time sequence of the voltage required by the power supply bus according to the type of the power supply bus and outputting a time sequence control signal to the signal output unit;
the signal output unit is further configured to output a first control signal according to the voltage control signal and the timing control signal.
As described above, the power chip body further includes:
the power supply monitoring unit is connected with the MCU;
the power supply monitoring unit is used for acquiring a voltage feedback signal, acquiring a feedback voltage value according to the voltage feedback signal and outputting the feedback voltage value to the MCU;
the MCU is also used for comparing the feedback voltage value with the voltage value of the voltage required by the power bus to obtain a voltage adjusting signal and outputting the voltage adjusting signal to the signal output unit;
the signal output unit is further configured to output the second control signal according to the voltage adjustment signal.
In the power chip, the power monitoring unit includes a resistor voltage dividing network unit and an analog-to-digital conversion AD sampling unit;
the resistance voltage division network unit is connected with the AD sampling unit;
the resistance voltage division network unit is used for acquiring a voltage feedback signal and performing voltage division processing on a first feedback voltage value corresponding to the voltage feedback signal to obtain a second feedback voltage value;
and the AD sampling unit is used for sampling the second feedback voltage value to obtain the feedback voltage value and outputting the feedback voltage value to the MCU.
As described above for the power supply chip, the M power bus interfaces are configured through the IO pin of the power supply chip, or through the I2C interface.
As described above, each of the M power bus interfaces is configured to support a power bus interface of one of the S types of power buses.
The power supply chip further comprises a power supply conversion unit, wherein the power supply conversion unit is integrated in the power supply chip, and when the power supply chip is used, the power supply conversion unit is connected with a target chip supporting a corresponding type of power supply bus through any one of S types of power supply buses;
and the power supply conversion unit is used for providing electric energy for the target chip according to the first control signal.
The power supply chip and the power supply conversion unit are further configured to obtain the voltage feedback signal output by the target chip; and providing electric energy for the target chip according to the second control signal.
A power supply comprises a power supply chip and N power supply conversion units;
the power supply chip comprises a power supply chip body and M power supply bus interfaces arranged on the power supply chip body; each power bus interface in the M power bus interfaces supports S types of power buses and is connected with the N power conversion units through any M types of power buses in the S types; when the power supply is used, the N power supply conversion units are connected with a target chip supporting the power supply bus of the corresponding type through any M types of power supply buses in the S types; n, M, S are all positive integers;
the power supply chip is used for outputting first control signals to the N power supply conversion units; wherein the first control signal comprises a voltage control signal;
and the power supply conversion unit is used for outputting electric energy to the target chip according to the first control signal.
As with the power supply described above, the first control signal further comprises a timing control signal.
In the above power supply, the power supply chip is further configured to obtain voltage feedback signals output by the N power conversion units, and output second control signals to the N power conversion units according to the voltage feedback signals; wherein the second control signal comprises a voltage adjustment signal;
the power supply conversion unit is further used for acquiring a voltage feedback signal output by the target chip and outputting the voltage feedback signal to the power supply chip; and outputting electric energy to the target chip according to the second control signal.
As described above, the power conversion units are connected to the target chip supporting the power bus of the corresponding type through any M types of power buses among the S types, and include:
Nithe power supply conversion unit is connected with a target chip supporting the ith type of power supply bus through the ith type of power supply bus; wherein the ith type of power bus is any one of the S types of power buses, NiThe number of voltage value types equal to the voltage required by the ith type of power bus; wherein i is 1, 2 … M, N1+N2+…+NM＝N，N1、N2…NMAre all positive integers.
As described above, the power conversion unit includes: the MOS transistor unit comprises a metal oxide semiconductor MOS transistor unit and an inductance unit;
the MOS tube unit is used for controlling a power supply to charge the inductance unit according to the first control signal;
and the inductance unit is used for outputting electric energy to the target chip according to the first control signal.
The power supply and the MOS transistor unit are further configured to control the power supply to charge the inductance unit according to the second control signal;
the inductance unit is further used for acquiring a voltage feedback signal output by the target chip and outputting the voltage feedback signal to the power supply chip; and outputting electric energy to the target chip according to the second control signal.
An electrical energy providing method comprising:
the power supply chip acquires a voltage value of voltage required by the power supply bus according to the type of the power supply bus to obtain a voltage control signal;
and the power supply chip outputs a first control signal according to the voltage control signal.
The method as described above, further comprising:
the power supply chip acquires a power-on time sequence of the voltage required by the power supply bus according to the type of the power supply bus to obtain a time sequence control signal;
correspondingly, the power chip outputs a first control signal according to the voltage control signal, and the method includes:
and the power supply chip outputs the first control signal according to the voltage control signal and the time sequence control signal.
The method as described above, further comprising:
the power supply chip acquires a voltage feedback signal;
and the power supply chip outputs a second control signal according to the voltage feedback signal, wherein the second control signal comprises a voltage adjusting signal.
As described above, the method in which the power chip outputs the second control signal according to the voltage feedback signal includes:
the power supply chip acquires a feedback voltage value according to the voltage feedback signal;
the power supply chip compares the feedback voltage value with a voltage value of the voltage required by the power supply bus to obtain a voltage adjusting signal;
and the power supply chip outputs the second control signal according to the voltage adjusting signal.
In the method, the obtaining, by the power chip, the feedback voltage value according to the voltage feedback signal includes:
the power supply chip performs voltage division processing on a first feedback voltage value corresponding to the voltage feedback signal to obtain a second feedback voltage value;
and the power supply chip samples the second feedback voltage value to obtain the feedback voltage value.
The power supply chip provided by the embodiment of the invention comprises a chip body and M power supply bus interfaces arranged on the power supply chip body; each power bus interface supports S types of power buses, and M, S is a positive integer; a power supply chip for outputting a first control signal including a voltage control signal; therefore, the problem of complicated circuit design caused by various voltages required by the target chip, large difference and different power-on time sequences is solved, and the subsequent circuit debugging and maintenance are facilitated.
Drawings
Fig. 1 is a schematic structural diagram of a power chip according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a connection between a power chip and a power conversion unit according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a power chip according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of another power chip according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a power monitoring unit according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of a power supply according to an embodiment of the present invention;
FIG. 7 is a schematic diagram of another power supply according to an embodiment of the present invention;
FIG. 8 is a schematic diagram of a connection structure between a power supply and a target chip according to an embodiment of the present invention;
FIG. 9 is a schematic diagram of another exemplary power supply and target chip connection configuration according to the present invention;
FIG. 10 is a schematic diagram of a connection structure between a power supply and a target chip according to another embodiment of the present invention;
FIG. 11 is a schematic diagram illustrating a connection structure between a power supply and a target chip according to another embodiment of the present invention;
fig. 12 is a schematic structural diagram of a power conversion unit according to an embodiment of the present invention;
FIG. 13 is a schematic diagram of a connection structure between a power supply and a target chip according to another embodiment of the present invention;
FIG. 14 is a schematic diagram illustrating a connection structure between a power supply and a target chip according to another embodiment of the present invention;
fig. 15 is a schematic flow chart of a power supply method according to an embodiment of the present invention;
fig. 16 is a schematic flow chart of another power supply method provided by the embodiment of the invention;
fig. 17 is a schematic flow chart of another power supply method according to an embodiment of the present invention;
fig. 18 is a schematic flow chart of another power supply method according to an embodiment of the present invention;
fig. 19 is a schematic flow chart illustrating a power supply operating method according to an embodiment of the present invention.
Detailed Description
Fig. 1 is a schematic structural diagram of a power chip according to an embodiment of the present invention, and as shown in fig. 1, the power chip provided in this embodiment includes a power chip body and M power interfaces disposed on the power chip body; wherein each power interface supports S types of power buses, M, S being a positive integer.
The power supply chip is used for outputting a first control signal, wherein the first control signal comprises a voltage control signal.
Specifically, the voltage control signal carries information of a voltage value of the required output voltage of the power bus, where the required voltage value may be one or more.
It should be noted that the S-type power buses are all types of power buses, and each power bus interface can support the S-type power buses, that is, each power bus interface can support all types of power buses, but each power bus interface can only be connected with one type of power bus, that is, each power bus interface can perform type configuration of an independent power bus. After the M power bus interfaces are determined to be connected to a certain type of power bus, the M power bus interfaces need to be configured to power bus interfaces adapted to the power bus of the corresponding type, specifically, the M bus interfaces may be configured through an IO pin of a power chip, or through an I2C Interface, or through a Serial Peripheral Interface (SPI), a universal asynchronous Receiver/Transmitter (UART) communication Interface, or the like, to configure an on-chip register. The I2C interface, SPI, and UART communication interface are all media for configuring the bus interface, and the media for configuring the bus interface according to the present invention includes, but is not limited to, these interfaces.
It should be further noted that, according to an actual application scenario, the bus-type power chip may be designed into multiple versions, where one simplified version is to configure each of the M power bus interfaces as a power bus interface supporting one type of power bus in the S type of power bus, that is, directly set the power bus interface on the power chip as a power bus interface corresponding to a power bus of a certain type, and only need to connect with a corresponding target chip through the power bus when in use.
The power chip provided by the embodiment comprises a chip body and M power bus interfaces arranged on the power chip body; wherein each power bus interface supports S types of power buses; the power supply chip is used for outputting a first control signal comprising a voltage control signal, so that various power supply schemes are realized, and the problem of complicated circuit design caused by various types, large differences and different power-on time sequences of the required voltage of the target chip is solved.
Further, the first control signal further includes a timing control signal.
It should be noted that the timing control signal carries voltage sequence information of the output voltage required by the power bus.
It should be further noted that the power chip may complete voltage timing control through internal processing, so that only the first control signal including the voltage control signal needs to be output, or both the voltage timing control and the voltage control may be implemented by other devices without internal processing, and the specific implementation process may be as described in this embodiment to output the first control signal including the voltage control signal and the timing control signal.
Further, the power supply chip is further configured to obtain a voltage feedback signal, and output a second control signal according to the voltage feedback signal, where the second control signal includes a voltage adjustment signal.
Specifically, during actual output, even if the electric energy is output according to the voltage control signal, a certain negative deviation exists between the actual voltage value of the output electric energy and the voltage value required by the power bus, the actual voltage value of the output electric energy received by the target chip can be obtained according to the voltage feedback signal, the second control signal including the voltage adjustment signal is output according to the voltage feedback signal, and then the voltage value of the output electric energy is adjusted according to the second control signal to reach the voltage value required by the power bus.
The power chip provided by the embodiment comprises a chip body and M power bus interfaces arranged on the power chip body; wherein each power bus interface supports S types of power buses; the power supply chip is used for outputting a first control signal comprising a voltage control signal and a time sequence control signal and obtaining a voltage feedback signal, and outputting a second control signal comprising a voltage adjusting signal according to the voltage feedback signal, so that various power supply schemes are realized more accurately, the problem of complex circuit design caused by various voltages, large differences and different power-on time sequences required by a target chip is avoided, and the subsequent circuit test and maintenance are facilitated.
Further, fig. 2 is a schematic structural diagram of a connection between a power chip and a power conversion unit according to an embodiment of the present invention. As shown in fig. 2, when the power supply chip is used, each power bus interface is connected to at least one power conversion unit through any one of S types of power buses.
And the power supply chip is specifically used for outputting the first control signal to the power supply conversion unit.
Specifically, when the power supply chip is used, the power supply chip is required to be connected with at least one power supply conversion unit through a power supply bus, the at least one power supply conversion unit is connected with a class of target chips through the power supply bus, and the power supply chip and the power supply conversion unit are used in combination to provide functions for the target chips, wherein the number of the connected power supply conversion units depends on the number of voltage types required by the target chips connected with the power supply conversion unit, and the number of the connected class of target chips can be one target chip or a plurality of target chips with total power consumption not exceeding the maximum value of the power supply chip.
It should be noted that the first control signal may include a voltage control signal, and may further include a voltage control signal and a timing control signal.
The power chip provided by the embodiment comprises a chip body and M power bus interfaces arranged on the power chip body; each power bus interface supports S types of power buses and is connected with at least one power conversion unit through any one of the S types of power buses; the power supply chip outputs a first control signal to the power supply conversion unit; therefore, multiple power supply schemes are realized, and the problem of complicated circuit design caused by multiple types and large differences of voltages required by a target chip and different power-on time sequences is solved.
Further, the power supply chip is specifically configured to obtain a voltage feedback signal output by the power supply conversion unit, and output a second control signal to the power supply conversion unit according to the voltage feedback signal.
The power chip provided by the embodiment comprises a chip body and M power bus interfaces arranged on the power chip body; each power bus interface supports S types of power buses and is connected with at least one power conversion unit through any one of the S types of power buses; the power supply chip outputs a first control signal to the power supply conversion unit, acquires a voltage feedback signal output by the power supply conversion unit, and outputs a second control signal comprising a voltage regulation signal to the power supply conversion unit according to the voltage feedback signal; therefore, various power supply schemes are realized more accurately, the problem of complicated circuit design caused by various voltages required by the target chip, large difference and different power-on time sequences is avoided, and the subsequent circuit test and maintenance are facilitated.
Further, fig. 3 is a schematic structural diagram of a power chip according to an embodiment of the present invention. As shown in fig. 3, the power chip body provided in this embodiment includes:
the device comprises a Micro Control Unit (MCU) and a signal output Unit, wherein the MCU is connected with the signal output Unit.
And the MCU is used for acquiring the voltage value of the voltage required by the power bus according to the type of the power bus and outputting a voltage control signal to the signal output unit.
And the signal output unit is used for outputting a first control signal according to the voltage control signal.
It should be noted that the signal output unit integrates the voltage control signals to form the first control signal and outputs the first control signal.
In the power chip provided by the embodiment, the M bus interfaces are arranged on the power chip body, and each bus interface supports S types of power buses; the MCU of the power supply chip obtains a voltage control signal according to the type of the power bus, and the signal output unit of the power supply chip outputs a first control signal according to the voltage control signal, so that electric energy can be provided for various target chips according to the voltage values of the voltages required by the various target chips and the requirement of power-on time sequences, the problem of complex circuit design caused by various voltages required by the target chips, large differences and different power-on time sequences is avoided, and the subsequent circuit test and maintenance are facilitated.
Further, the MCU is also used for acquiring the power-on time sequence of the voltage required by the power bus according to the type of the power bus and outputting a time sequence control signal to the signal output unit.
And the signal output unit is also used for outputting a first control signal according to the voltage control signal and the time sequence control signal.
The signal output unit integrates the voltage control signal and the timing control signal to form a first control signal and outputs the first control signal.
In the power chip provided by the embodiment, the M bus interfaces are arranged on the power chip body, and each bus interface supports S types of power buses; the MCU of the power supply chip obtains a voltage control signal and a time sequence control signal according to the type of a power bus, and a signal output unit of the power supply chip outputs a first control signal according to the voltage control signal and the time sequence control signal, so that electric energy can be provided for various target chips according to the voltage value of the voltage required by the various target chips and the requirement of power-on time sequences, the problem of complex circuit design caused by various power-on time sequences due to various types of the voltage required by the target chips, large difference and convenience in subsequent circuit testing and maintenance is avoided.
Further, fig. 4 is a schematic structural diagram of another power chip according to an embodiment of the present invention. As shown in fig. 4, the power chip body provided in this embodiment further includes:
and the power supply monitoring unit is connected with the MCU and is used for acquiring a voltage feedback signal, acquiring a feedback voltage value according to the voltage feedback signal and outputting the feedback voltage value to the MCU.
And the MCU is also used for comparing the feedback voltage value with the voltage value of the voltage required by the power bus to obtain a voltage adjusting signal and outputting the voltage adjusting signal to the signal output unit.
And the signal output unit is also used for outputting a second control signal to the power supply conversion unit according to the voltage adjusting signal.
It should be noted that, while the power conversion unit provides the electric energy to the target chip according to the first control signal, the target chip returns the voltage feedback signal to the power monitoring unit through the power conversion unit, so that the power chip can accurately adjust the voltage value of the voltage required by the target chip.
It should be noted that voltage values of voltages required by different types of power buses are different, and assuming that the type a of the power bus requires 3 voltages, and the voltage values are 1.8V, 2.5V, and 3.3V, the MCU compares feedback voltage values (at this time, the feedback voltage values are 3 voltage values close to 1.8V, 2.5V, and 3.3V) with 1.8V, 2.5V, and 3.3V, respectively, to obtain a voltage adjustment signal and output the voltage adjustment signal to the signal output unit; assuming that the bus type B requires 2 voltages, which are 2.0V and 2.8V, respectively, the MCU compares the feedback voltage values (which are 2 voltage values close to 2.0V and 2.8V) with 2.0V and 2.8V, respectively, to obtain a voltage adjustment signal and output the voltage adjustment signal to the signal output unit.
It should be noted that the signal output unit integrates the voltage adjustment signals to form the second control signal and outputs the second control signal.
The power chip that this embodiment provided increases power monitoring unit on the basis of the power chip that above-mentioned embodiment provided to make power chip can provide the electric energy for the target chip with accurate voltage value, avoided because the required voltage of target chip is of many kinds, the difference is big, go up the loaded down with trivial details problem of circuit design that the electrical sequence diverse brought, and make things convenient for subsequent circuit debugging and maintenance.
Fig. 5 is a schematic structural diagram of a power monitoring unit according to an embodiment of the present invention. As shown in fig. 5, the power monitoring unit provided in this embodiment includes a resistance voltage dividing network unit and an Analog-to-digital converter (AD) sampling unit; the resistance voltage division network unit is connected with the AD sampling unit.
The resistance voltage division network unit is used for acquiring a voltage feedback signal and carrying out voltage division processing on a first feedback voltage value corresponding to the voltage feedback signal to obtain a second feedback voltage value;
and the AD sampling unit is used for sampling the second feedback voltage value to obtain a feedback voltage value and outputting the feedback voltage value to the MCU.
The power chip that this embodiment provided increases power monitoring unit to make power chip can provide the electric energy for the target chip with accurate voltage value, avoided because the required voltage of target chip is of many kinds, the difference is big, the loaded down with trivial details problem of circuit design that the power-on time sequence diverse brought, and convenient subsequent circuit debugging and maintenance.
Further, the power supply chip provided by this embodiment further includes a power supply conversion unit, the power supply conversion unit is integrated in the power supply chip, and when the power supply chip is used, the power supply conversion unit is connected to a target chip supporting a power supply bus of a corresponding type through any one of the S types of power supply buses.
And the power supply conversion unit is used for providing electric energy for the target chip according to the first control signal.
It should be noted that the power conversion unit may also be integrated in the power chip to realize the integration of the voltage control function and the power conversion function.
The power chip provided by the embodiment comprises a chip body and M power bus interfaces arranged on the power chip body; when the power chip is used, the power conversion unit is connected with a target chip supporting the power buses of corresponding types through any one of the power buses of S types and provides electric energy for the target chip according to a first control signal, so that multiple power supply schemes are realized, and the problem that circuit design is complicated due to the fact that the target chip is provided with multiple required voltages, the difference is large and power-on time sequences are different is solved.
Further, the power conversion unit is further configured to obtain a voltage feedback signal output by the target chip; and providing electric energy for the target chip according to the second control signal.
The power chip provided by the embodiment comprises a chip body and M power bus interfaces arranged on the power chip body; when the power supply chip is used, the power supply conversion unit is connected with a target chip supporting the corresponding type of power supply bus through any one of the S type of power supply buses, provides electric energy for the target chip according to a first control signal and acquires a voltage feedback signal output by the target chip; providing electric energy for the target chip according to the second control signal; therefore, various power supply schemes are realized more accurately, the problem of complicated circuit design caused by various voltages required by the target chip, large difference and different power-on time sequences is avoided, and the subsequent circuit test and maintenance are facilitated.
Fig. 6 is a schematic diagram of a power supply structure according to an embodiment of the invention. As shown in fig. 6, the power supply provided by the present embodiment includes: a power supply chip and N power conversion units.
The power supply chip comprises a power supply chip body and M power supply bus interfaces arranged on the power supply chip body; each power bus interface in the M power bus interfaces supports S types of power buses and is connected with the N power conversion units through any M types of power buses in the S types; when the power supply is used, the N power supply conversion units are connected with target chips supporting power supply buses of corresponding types through power supply buses of any M types in the S types (in the figure, the target chips supporting different types of power supply buses are represented by a first type target chip, a second type target chip … and an M-th type target chip); n, M, S are all positive integers.
The power supply chip is used for outputting first control signals to the N power supply conversion units; wherein the first control signal comprises a timing control signal;
and the power supply conversion unit is used for outputting electric energy to the target chip according to the first control signal.
The power supply provided by the embodiment comprises a power supply chip and N power supply conversion units, wherein the power supply chip outputs a first control signal comprising a voltage control signal to the power supply conversion unit, and the power supply conversion unit outputs electric energy to a target chip according to the first control signal, so that the problem of complex circuit design caused by various voltage types, large difference and different power-on time sequences required by the target chip is avoided, and the subsequent circuit debugging and maintenance are facilitated.
Further, the first control signal further includes a timing control signal.
The power supply provided by the embodiment comprises a power supply chip and N power supply conversion units, wherein the power supply chip outputs a first control signal comprising a voltage control signal and a time sequence control signal to the power supply conversion unit, and the power supply conversion unit outputs electric energy to a target chip according to the first control signal, so that the problem of complex circuit design caused by multiple voltage types, large difference and different power-on time sequences required by the target chip is avoided, and the subsequent circuit debugging and maintenance are facilitated.
Further, fig. 7 is a schematic diagram of another power supply structure provided in the embodiment of the present invention. As shown in fig. 7 (in the figure, the first type target chip and the second type target chip …, the mth type target chip indicates target chips supporting different types of power buses), the power chip is further configured to obtain voltage feedback signals output by the N power conversion units, and output second control signals to the N power conversion units according to the voltage feedback signals, where the second control signals include voltage adjustment signals.
The power supply conversion unit is also used for acquiring a voltage feedback signal output by the target chip and outputting the voltage feedback signal to the power supply chip; and outputting the electric energy to the target chip according to the second control signal.
The power that this embodiment provided is on the basis of above-mentioned embodiment, power chip acquires power conversion unit's voltage feedback signal, according to the second control signal that voltage feedback signal output includes voltage adjustment signal, power conversion unit exports the electric energy to the target chip according to the second control signal, make power chip can provide the electric energy for the target chip with accurate voltage value, thereby avoided because the required voltage of target chip is of many kinds, the difference is big, the loaded down with trivial details problem of circuit design that the chronogenesis diverse brought is gone up to the electricity, and convenient subsequent circuit debugging and maintenance.
It should be noted that the type of the power bus is divided according to the voltage type, power consumption and power-on sequence required by the target chip, so that the power bus of one type can provide power to a class of target chips, and if the power bus of one type provides power to a class of target chips, the voltage type, power consumption and power-on sequence required by the class of target chips are the same, wherein the number of the class of target chips may be one target chip, or may be multiple target chips whose total power consumption does not exceed the maximum value of the power chips. Fig. 8 is a schematic structural diagram of a connection between a power supply and a target chip according to an embodiment of the present invention. As shown in fig. 8, the power supply is connected to the target chip through a power bus to supply power to the target chip. Fig. 9 is a schematic structural diagram of another connection between a power supply and a target chip according to an embodiment of the present invention. As shown in fig. 9 (in the figure, the first type target chip and the second type target chip …, the mth type target chip represents target chips supporting different types of power buses), the N power conversion units are connected to the target chips supporting the corresponding types of power buses through any M types of power buses in the S types, and include:
Nithe power supply conversion unit is connected with a target chip (i-th class target chip) supporting the i-th type power supply bus through the i-th type power supply bus; wherein the ith type of power bus is any one of S types of power buses, NiThe number of voltage value types equal to the voltage required by the ith type of power bus; wherein i is 1, 2 … M, N1+N2+…+NMN; wherein N is1、N2…NMAre all positive integers.
Specifically, N1The power supply conversion unit is connected with a target chip (a first type target chip) supporting the first type power supply bus through the first type power supply bus; wherein the first type of power bus is any one of S type of power bus, N1The number of voltage value types equal to the voltage required by the first type of power bus;
N2the power supply conversion unit is connected with a target chip (a second type target chip) supporting the second type power supply bus through the second type power supply bus; wherein the second type of power bus is any one of S type of power bus, N2Equal to the second type of electricityThe number of voltage value types of the voltage required by the source bus;
by analogy, NMThe power supply conversion unit is connected with a target chip (an M-type target chip) supporting the M-type power supply bus through the M-type power supply bus; wherein the Mth type of power bus is any one of S types of power buses, NMThe number of voltage value types equal to the voltage required by the Mth type of power bus.
The power supply provided by the embodiment provides electric energy to the target chip supporting the corresponding type of power supply bus through the various types of power supply buses, so that the problem of complicated circuit design caused by various types, large differences and different power-on time sequences of the target chip is avoided, and the subsequent circuit debugging and maintenance are facilitated.
Fig. 10 is a schematic structural diagram of a connection between a power supply and a target chip according to another embodiment of the present invention. As shown in fig. 10, the power supply includes a power supply chip and N power conversion units, and the power supply chip supplies power to N target chips through a power bus.
Fig. 11 is a schematic structural diagram of a connection between a power supply and a target chip according to another embodiment of the present invention. As shown in fig. 11, the power supply includes a power supply chip and N power conversion units, the power supply chip supplies power to one type of target chip through a first type of power supply bus, the power supply chip supplies power to another type of target chip through a second type of power supply bus, …, and the power supply chip supplies power to another type of target chip through an M-th type of power supply bus.
Further, fig. 12 is a schematic structural diagram of a power conversion unit according to an embodiment of the present invention. As shown in fig. 12, the power conversion unit includes: a Metal Oxide Semiconductor (MOS) transistor unit and an inductor unit;
and the MOS tube unit is used for controlling the power supply to charge the inductance unit according to the first control signal.
And the inductance unit is used for outputting electric energy to the target chip according to the first control signal.
Further, the MOS tube unit is also used for controlling the power supply to charge the inductance unit according to a second control signal.
The inductance unit is also used for acquiring a voltage feedback signal output by the target chip and outputting the voltage feedback signal to the power supply chip; and outputting the electric energy to the target chip according to the second control signal.
It should be noted that the power supply source is an original source of electric energy, and the power supply source may be, or may be, other devices or apparatuses capable of providing electric energy, and the present invention is not limited to this.
Specifically, the power supply process of the MOS transistor unit and the inductance unit to the target chip in cooperation is as follows: when the voltage supplied to the target chip (the voltage at this time is the rated voltage required by the target chip) is reduced, the switching action of the MOS tube unit becomes effective, and the power supply charges the inductance unit and reaches the rated voltage required by the target chip; when the voltage supplied to the target chip is increased, the power supply is disconnected under the switching action of the MOS tube unit, the inductance unit releases the electric energy just charged, and the inductance unit becomes a power supply to continuously supply power to the target chip; along with the continuous consumption of the electric energy stored on the inductance unit, the voltage supplied to the target chip starts to be gradually reduced, the power supply starts to charge the inductance unit through the switching action of the MOS tube unit, and the charging and discharging processes are carried out circularly and continuously, so that a stable voltage is formed to supply power for the target chip.
Fig. 13 is a schematic structural diagram of a power supply connected to a target chip according to an embodiment of the present invention. Assuming that M is equal to 2, the target chip may be divided into two types according to the required voltage type, power consumption and power-on timing sequence, and the two types are denoted as a first type target chip and a second type target chip, the first type target chip is connected with one interface of the power supply through a first type power bus, and the second type target chip is connected with the other interface of the power supply through a second type power bus. Assuming that the voltage values of the voltages required by the first type of target chip are 3.3V, 1.8V and 1.2V, and the power-on time sequence is 1.2V to 1.8V to 3.3V, the first type of power bus also requires the voltage values of the 3 voltages and the same power-on time sequence, and correspondingly, the first type of power bus requires 3 power conversion units; assuming that the voltage values of the voltages required by the second type of target chip are 2.0V, 1.5V, and the power-on timing is 1.5V to 2.0V, the second type of power bus also requires the voltage values of the 2 voltages and the same power-on timing; accordingly, the second type of power bus requires 2 power conversion units. As shown in fig. 13, the power supply chip obtains, according to the first type of power supply bus, that the voltage value of the voltage required by the first type of power supply bus is 3.3V, 1.8V, and 1.2V, and the power-on time sequence is 1.2V to 1.8V to 3.3V, outputs a first control signal including a voltage control signal and a time sequence control signal to the corresponding 3 power supply conversion units, and the corresponding 3 power supply conversion units realize output of electric energy to the first type of target chip according to the first control signal, specifically, the 3 power supply conversion units respectively undertake 3 different voltage reduction tasks according to the voltage control signal, reduce the voltage to 3.3V, 1.8V, and 1.2V, and then output the electric energy to the first type of target chip according to the time sequence control signal, according to the voltage after voltage reduction being completed, in the order of 1.2V to 1.8V to 3.3V; after the first type of target chip starts to provide electric energy, the corresponding 3 power supply conversion units acquire feedback signals output by the first type of target chip and output the feedback signals to the power supply chip, the power supply chip outputs second control signals comprising voltage adjusting signals to the corresponding 3 power supply conversion units through a series of processing and control, the corresponding 3 power supply conversion units adjust the output voltage according to the second control signals, and the voltage value of the output voltage does not reach 3.3V, 1.8V and 1.2V parts and is adjusted and compensated, so that the electric energy is provided for the first type of target chip more accurately; the process of outputting the electric energy from the power chip to the second type target chip is similar to the above process, and is not described herein again.
The power that this embodiment provided includes a power chip and a N power conversion unit, the power chip includes the first control signal of voltage control signal and time sequence control signal to power conversion unit output, power conversion unit exports the electric energy to the target chip according to first control signal, power chip acquires power conversion unit's voltage feedback signal, output the second control signal including voltage adjustment signal according to voltage feedback signal, power conversion unit exports the electric energy to the target chip according to the second control signal, thereby can be with accurate voltage value for the target chip provides voltage, avoided because the required voltage of target chip is many, the difference is big, go up the loaded down with trivial details problem of circuit design that the time sequence diverse brought, and convenient subsequent circuit debugging and maintenance.
Fig. 14 is a schematic structural diagram of a connection between a power supply and a target chip according to another embodiment of the present invention. As shown in fig. 14, the power supply includes a power supply chip and a power supply conversion unit, the power supply chip includes a power supply monitoring unit, an MCU control unit, and a signal output unit, and the power supply conversion unit includes an MOS transistor unit and an inductance unit; the power supply chip is provided with a power supply bus interface, and the power supply bus interface is connected with a power supply bus. The MOS tube unit and the inductance unit supply power to the target chip according to the control signal, meanwhile, the inductance unit receives a voltage feedback signal sent by the target chip and sends the voltage feedback signal to a power supply detection unit in the power supply chip, the power supply detection unit conducts primary processing on the voltage feedback signal and sends the voltage feedback signal to the MCU unit for secondary processing, the MCU unit conducts secondary processing on the voltage feedback signal and sends the voltage feedback signal to the signal output unit, a control signal is output by the signal output unit, and the MOS tube unit and the inductance unit supply power to the target chip according to a new control signal.
Fig. 15 is a schematic flow chart of an electric energy providing method according to an embodiment of the present invention. As shown in fig. 15, the method provided by this embodiment includes:
step 101, the power supply chip obtains a voltage value of a voltage required by the power supply bus according to the type of the power supply bus to obtain a voltage control signal.
And 102, outputting a first control signal by the power supply chip according to the voltage control signal.
According to the electric energy providing method provided by the embodiment, the power supply chip obtains the voltage values of different voltages according to the type of the power bus to obtain the voltage control signal, and outputs the first control signal according to the obtained voltage control signal, so that the purpose of supplying power for various target chips is met.
Further, fig. 16 is a schematic flow chart of another power supply method according to an embodiment of the present invention. As shown in fig. 16, the method provided by the present embodiment includes:
step 201, the power chip obtains a voltage value of a voltage required by the power bus according to the type of the power bus to obtain a voltage control signal.
Step 202, the power chip obtains a power-on time sequence of the voltage required by the power bus according to the type of the power bus to obtain a time sequence control signal.
And 203, the power supply chip outputs a first control signal according to the voltage control signal and the time sequence control signal.
In the electric energy providing method provided by this embodiment, the power chip obtains voltage values of different voltages according to the type of the power bus to obtain a voltage control signal, obtains a power-on timing sequence of the voltage required by the power bus according to the type of the power bus to obtain a timing sequence control signal, and outputs a first control signal according to the obtained voltage control signal and the timing sequence control signal; thereby satisfying the purpose of supplying power for various target chips.
Further, fig. 17 is a schematic flow chart of another electric energy providing method according to an embodiment of the present invention. As shown in fig. 17, the method provided by the present embodiment includes:
step 301, the power chip obtains a voltage feedback signal.
And step 302, the power supply chip acquires a feedback voltage value according to the voltage feedback signal.
Step 303, the power chip compares the feedback voltage value with a voltage value of the voltage required by the power bus to obtain a voltage adjustment signal.
And step 304, the power supply chip outputs a second control signal according to the voltage adjusting signal.
In the electric energy providing method provided by this embodiment, the power supply chip acquires a voltage feedback signal, acquires a feedback voltage value according to the voltage feedback signal, compares the feedback voltage value with a voltage value of a voltage required by the power supply bus to obtain a voltage adjustment signal, and outputs a second control signal according to the voltage adjustment signal; therefore, the design requirements of different voltage types, current sizes and electrifying time sequences due to scattered distribution of the target chip are better met, and the subsequent adjustment, measurement and maintenance are convenient.
Further, fig. 18 is a schematic flow chart of another electric energy providing method according to an embodiment of the present invention. As shown in fig. 18, the method provided by the present embodiment includes:
step 401, the power supply chip obtains a voltage value of a voltage required by the power supply bus according to the type of the power supply bus and outputs a voltage control signal; and acquiring a power-on time sequence of the voltage required by the power bus according to the type of the power bus, and outputting a time sequence control signal.
Step 402, the power chip outputs a first control signal according to the voltage control signal and the timing control signal.
Step 403, the power chip obtains a voltage feedback signal.
And step 404, the power supply chip performs voltage division processing on the first feedback voltage value corresponding to the voltage feedback signal to obtain a second feedback voltage value.
And 405, the power supply chip samples the second feedback voltage value to obtain a feedback voltage value.
And step 406, the power supply chip compares the feedback voltage value with a voltage value of the voltage required by the power supply bus to obtain a voltage adjustment signal.
Step 407, the power chip outputs a second control signal according to the voltage adjustment signal.
In the electric energy providing method provided by this embodiment, the power supply chip obtains voltage values of different voltages according to the type of the power supply bus, and outputs a voltage control signal; acquiring power-on time sequences of different voltages according to the type of the power bus, and outputting a time sequence control signal; outputting a first control signal according to the voltage control signal and the time sequence control signal; acquiring a voltage feedback signal of the power conversion unit, further acquiring a voltage adjustment signal, and outputting a second control signal comprising the voltage adjustment signal; therefore, the design requirements of different voltage types, current sizes and electrifying time sequences due to scattered distribution of the target chip are better met, and the subsequent adjustment, measurement and maintenance are convenient.
Fig. 19 is a schematic flow chart illustrating a power supply operating method according to an embodiment of the present invention. As shown in fig. 19, the power supply is powered on, then the configuration of the external pin is read or the internal register is checked to determine the type configuration of the power bus, then the power monitoring unit in the power supply monitors whether the output voltage of the power conversion unit meets the requirement of the target chip and is output normally, if so, the power conversion unit supplies power to the target chip normally, and if not, the power conversion unit alarms and stops supplying power.
The power supply working method provided by the embodiment detects whether the output voltage meets the requirement of the target chip before the target chip, so that the power supply to the target chip is realized under the condition of meeting the requirement of the voltage required by the target chip.
The embodiment of the invention also provides a storage medium. Alternatively, in the present embodiment, the storage medium may be configured to store program codes for performing the following steps:
and S11, the power supply chip acquires the voltage value of the voltage required by the power supply bus according to the type of the power supply bus to obtain a voltage control signal.
And S12, the power supply chip outputs a first control signal according to the voltage control signal.
Further, the above-mentioned storage medium may be further configured to store program code for performing the steps of:
and S21, the power supply chip acquires the voltage value of the voltage required by the power supply bus according to the type of the power supply bus to obtain a voltage control signal.
And S22, the power chip acquires the power-on time sequence of the voltage required by the power bus according to the type of the power bus to obtain the time sequence control signal.
And S23, the power chip outputs a first control signal according to the voltage control signal and the time sequence control signal.
Further, the above-mentioned storage medium may be further configured to store program code for performing the steps of:
and S31, the power supply chip acquires a voltage feedback signal.
And S32, the power supply chip acquires a feedback voltage value according to the voltage feedback signal.
And S33, the power supply chip compares the feedback voltage value with the voltage value of the voltage required by the power supply bus to obtain a voltage adjusting signal.
And S34, the power supply chip outputs a second control signal according to the voltage adjusting signal.
Further, the storage medium may be specifically configured to store program code for performing the following steps:
s321, the power supply chip performs voltage division processing on the first feedback voltage value corresponding to the voltage feedback signal to obtain a second feedback voltage value.
And S323, the power supply chip samples the second feedback voltage value to obtain a feedback voltage value.
Optionally, in this embodiment, the storage medium may include, but is not limited to: various codes capable of storing programs, such as a U-disk, a Read-Only Memory (ROM), a Random-Access Memory (RAM), a mobile hard disk, a magnetic disk, or an optical disk.
As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, system, or computer program product. Accordingly, the present invention may take the form of a hardware embodiment, a software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, optical storage, and the like) having computer-usable program code embodied therein.
The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
The above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention.

Claims (19)

1. A power chip is characterized by comprising a power chip body and M power bus interfaces arranged on the power chip body; each power bus interface supports S types of power buses, and M, S is a positive integer;
the power chip body includes: the MCU is connected with the signal output unit;
the MCU is used for acquiring a voltage value of voltage required by the power bus and a power-on time sequence according to the type of the power bus and outputting a voltage control signal and a time sequence control signal to the signal output unit;
the signal output unit is further configured to output a first control signal according to the voltage control signal and the timing control signal.
2. The power supply chip according to claim 1,
the power supply chip is also used for acquiring a voltage feedback signal and outputting a second control signal according to the voltage feedback signal; wherein the second control signal comprises a voltage adjustment signal.
3. The power supply chip according to claim 2, wherein each of the power bus interfaces is connected to at least one power conversion unit through any one of the S-type power buses when the power supply chip is used;
the power supply chip is specifically configured to output a first control signal to the power supply conversion unit.
4. The power supply chip according to claim 3,
the power supply chip is specifically configured to obtain the voltage feedback signal output by the power supply conversion unit, and output a second control signal to the power supply conversion unit according to the voltage feedback signal.
5. The power chip according to claim 2, wherein the power chip body further includes:
the power supply monitoring unit is connected with the MCU;
the power supply monitoring unit is used for acquiring the voltage feedback signal, acquiring a feedback voltage value according to the voltage feedback signal and outputting the feedback voltage value to the MCU;
the MCU is also used for comparing the feedback voltage value with the voltage value of the voltage required by the power bus to obtain a voltage adjusting signal and outputting the voltage adjusting signal to the signal output unit;
the signal output unit is further configured to output the second control signal according to the voltage adjustment signal.
6. The power supply chip according to claim 5, wherein the power supply monitoring unit comprises a resistance voltage division network unit and an analog-to-digital (AD) sampling unit;
the resistance voltage division network unit is connected with the AD sampling unit;
the resistance voltage division network unit is used for acquiring a voltage feedback signal and performing voltage division processing on a first feedback voltage value corresponding to the voltage feedback signal to obtain a second feedback voltage value;
and the AD sampling unit is used for sampling the second feedback voltage value to obtain the feedback voltage value and outputting the feedback voltage value to the MCU.
7. The power supply chip according to claim 1 or 2, wherein the M power bus interfaces are configured through an IO pin of the power supply chip or through an I2C interface.
8. The power chip of claim 1 or 2, wherein each of the M power bus interfaces is configured to support a power bus interface of one of the S types of power buses.
9. The power supply chip according to claim 2, further comprising a power supply conversion unit integrated in the power supply chip, wherein when the power supply chip is used, the power supply conversion unit is connected with a target chip supporting a corresponding type of power supply bus through any one of S types of power supply buses;
and the power supply conversion unit is used for providing electric energy for the target chip according to the first control signal.
10. The power supply chip according to claim 9,
the power supply conversion unit is further used for acquiring the voltage feedback signal output by the target chip; and providing electric energy for the target chip according to the second control signal.
11. A power supply is characterized by comprising a power supply chip and N power supply conversion units;
the power supply chip comprises a power supply chip body and M power supply bus interfaces arranged on the power supply chip body; each power bus interface in the M power bus interfaces supports S types of power buses and is connected with the N power conversion units through any M types of power buses in the S types; when the power supply is used, the N power supply conversion units are connected with a target chip supporting the power supply bus of the corresponding type through any M types of power supply buses in the S types; n, M, S are all positive integers;
the power chip body includes: the MCU is connected with the signal output unit;
the MCU is used for acquiring a voltage value of voltage required by the power bus and a power-on time sequence according to the type of the power bus and outputting a voltage control signal and a time sequence control signal to the signal output unit;
the signal output unit is further used for outputting a first control signal according to the voltage control signal and the time sequence control signal;
the power supply chip is used for outputting the first control signal to the N power supply conversion units;
and the power supply conversion unit is used for outputting electric energy to the target chip according to the first control signal.
12. The power supply of claim 11,
the power supply chip is further used for acquiring voltage feedback signals output by the N power supply conversion units and outputting second control signals to the N power supply conversion units according to the voltage feedback signals; wherein the second control signal comprises a voltage adjustment signal;
the power supply conversion unit is further used for acquiring a voltage feedback signal output by the target chip and outputting the voltage feedback signal to the power supply chip; and outputting electric energy to the target chip according to the second control signal.
13. The power supply of claim 11, wherein the N power conversion units are connected to a target chip supporting a corresponding type of power bus through any M types of power buses among the S types, and the power conversion units comprise:
Nithe power supply conversion unit is connected with a target chip supporting the ith type of power supply bus through the ith type of power supply bus; wherein the ith type of power bus is any one of the S types of power buses, NiThe number of voltage value types equal to the voltage required by the ith type of power bus; wherein i is 1, 2 … M, N1+N2+…+NM＝N，N1、N2…NMAre all positive integers.
14. The power supply of claim 12, wherein the power conversion unit comprises: the MOS transistor unit comprises a metal oxide semiconductor MOS transistor unit and an inductance unit;
the MOS tube unit is used for controlling a power supply to charge the inductance unit according to the first control signal;
and the inductance unit is used for outputting electric energy to the target chip according to the first control signal.
15. The power supply of claim 14,
the MOS tube unit is also used for controlling the power supply to charge the inductance unit according to the second control signal;
the inductance unit is further used for acquiring a voltage feedback signal output by the target chip and outputting the voltage feedback signal to the power supply chip; and outputting electric energy to the target chip according to the second control signal.
16. An electrical energy providing method, the method comprising:
the power supply chip acquires a voltage value of voltage required by the power supply bus according to the type of the power supply bus to obtain a voltage control signal; the power supply chip acquires a power-on time sequence of the voltage required by the power supply bus according to the type of the power supply bus to obtain a time sequence control signal;
the power supply chip outputs a first control signal according to the voltage control signal and the time sequence control signal;
the power supply chip comprises a power supply chip body and M power supply bus interfaces arranged on the power supply chip body; each of the M power bus interfaces supports S types of power buses.
17. The method of claim 16, further comprising:
the power supply chip acquires a voltage feedback signal;
and the power supply chip outputs a second control signal according to the voltage feedback signal, wherein the second control signal comprises a voltage adjusting signal.
18. The method of claim 17, wherein the power chip outputs a second control signal according to the voltage feedback signal, comprising:
the power supply chip acquires a feedback voltage value according to the voltage feedback signal;
the power supply chip compares the feedback voltage value with a voltage value of the voltage required by the power supply bus to obtain a voltage adjusting signal;
and the power supply chip outputs the second control signal according to the voltage adjusting signal.
19. The method of claim 18, wherein the power chip obtaining a feedback voltage value according to the voltage feedback signal comprises:
the power supply chip performs voltage division processing on a first feedback voltage value corresponding to the voltage feedback signal to obtain a second feedback voltage value;
and the power supply chip samples the second feedback voltage value to obtain the feedback voltage value.
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