CN113451382B - Display panel - Google Patents
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- CN113451382B CN113451382B CN202110731234.3A CN202110731234A CN113451382B CN 113451382 B CN113451382 B CN 113451382B CN 202110731234 A CN202110731234 A CN 202110731234A CN 113451382 B CN113451382 B CN 113451382B
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
- G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission
- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars
- H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/80—Constructional details
- H10K50/84—Passivation; Containers; Encapsulations
Abstract
The invention provides a display panel, which comprises a plurality of sub-display panels which are spliced, a plurality of display areas and splicing areas among the display areas, wherein the sub-display panels comprise a first sub-display panel positioned in the display areas and a second sub-display panel positioned in the splicing areas, the second sub-display panel comprises micro LEDs or mini LEDs, and black lines in display pictures of the spliced display panels are eliminated by utilizing the self-packaging characteristic of the micro LEDs or the mini LEDs arranged on the outer sides of the first sub-display panels, so that the seamless effect of a screen splicing technology is realized, and the display quality of the display panels is improved.
Description
[ technical field ] A method for producing a semiconductor device
The invention relates to the technical field of display, in particular to a display panel.
[ background of the invention ]
With the development of display technology, more and more application function scenes need display devices with larger display areas, the traditional display device with a single display panel cannot meet the requirement, and the display device formed by splicing a plurality of display panels is generated, namely, the screen connection technology. In the conventional screen-to-screen technology, a plurality of Organic Light-emitting diodes (OLEDs) are generally spliced together to meet the requirements of splicing and cooperatively displaying screens.
However, since the organic material of the light emitting layer in the organic electroluminescent display panel is sensitive to water (H2O) and oxygen (O2), after the light emitting layer is manufactured, it needs to be encapsulated by other materials, i.e. the encapsulating material needs to be beyond the range of the light emitting effective Area (AA Area). In order to further reduce the non-display boundary (Border) area, most of the existing screen connecting technologies adopt a boundary narrowing method, the left and right boundaries of a Panel (Panel) are narrowed extremely to obtain very narrow four-side boundaries, and then the special small panels are spliced into a large-size Panel to achieve the purpose of splicing display. The boundary area of the organic electroluminescent display panel can be narrowed but is indispensable because of the characteristic of the luminescent layer, so that although the conventional screen-connecting technology can realize combined display of a plurality of screens, the influence of a frame always exists between the screens, a non-display area is reserved and is shown on a large screen, another black line appears, and 'seamless' cannot be really realized.
Therefore, the prior art has defects and needs to be improved and developed.
[ summary of the invention ]
The invention provides a display panel which can eliminate black lines in a display picture of a spliced display panel, thereby realizing 'seamless' screen connection technology and improving the display quality of the display panel.
In order to solve the above problem, the present invention provides a display panel, where the display panel includes a plurality of sub-display panels arranged in a splicing manner, the display panel further includes a plurality of display regions and a splicing region located between the plurality of display regions, the plurality of sub-display panels include a first sub-display panel located in the display region and a second sub-display panel located in the splicing region, and the second sub-display panel includes micro LEDs or mini LEDs.
Wherein the first sub-display panel includes an organic electroluminescent display panel.
Wherein the display panel further comprises an encapsulation layer covering the upper sides of the plurality of organic electroluminescent display panels.
Wherein the first sub-display panel includes a micro LED or a mini LED.
Wherein, a plurality of sub-display panels are arranged in an array.
Wherein the second sub-display panel is disposed around the first sub-display panel.
The second sub-display panel comprises a plurality of pixel units and thin film transistor units, wherein the pixel units are sequentially stacked, the thin film transistor units control the corresponding pixel units, and the projections of the pixel units on the thin film transistor units are completely positioned in the areas of the thin film transistor units.
The width of the pixel unit is not more than that of the thin film transistor unit, and the length of the pixel unit is not more than that of the thin film transistor unit.
The display panel further comprises a gate driving circuit, wherein the gate driving circuit is vertically projected in the display area, and the vertical direction comprises a direction parallel to the direction vertical to the display area.
The display panel further comprises a fan-out area, the fan-out area is electrically connected with the gate driving circuit, and the fan-out area is vertically projected in the display area.
The beneficial effects of the invention are: different from the prior art, the invention provides a display panel, the display panel comprises a plurality of sub-display panels which are spliced, the display panel also comprises a plurality of display areas and splicing areas which are positioned among the plurality of display areas, the plurality of sub-display panels comprise a first sub-display panel which is positioned in the display areas and a second sub-display panel which is positioned in the splicing areas, wherein the second sub-display panel comprises micro LEDs or mini LEDs, and the black lines in the display pictures of the spliced display panel are eliminated by utilizing the self-packaging characteristic of the micro LEDs or mini LEDs which are arranged on the outer side of the first sub-display panel, so that the seamless effect of the screen splicing technology is realized, and the display quality of the display panel is improved.
[ description of the drawings ]
Fig. 1 is a schematic structural diagram of a conventional screen-receiving display panel;
FIG. 2 is a schematic diagram of a structure of an encapsulating film layer of an OLED;
fig. 3 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
FIG. 4 is a schematic structural diagram of a sub-pixel of an OLED;
FIG. 5 is a schematic diagram of a film structure of an OLED;
FIG. 6 is a schematic structural diagram of a sub-pixel of a micro LED or a mini LED;
FIG. 7 is a schematic diagram of a film structure of a micro LED or a mini LED;
fig. 8 is a schematic structural diagram of a display panel including a gate driving circuit according to an embodiment of the present invention;
fig. 9 is a schematic structural diagram of another display panel including a gate driving circuit according to an embodiment of the disclosure.
[ detailed description ] A
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be noted that the following examples are only illustrative of the present invention, and do not limit the scope of the present invention. Likewise, the following examples are only some but not all examples of the present invention, and all other examples obtained by those skilled in the art without any inventive step are within the scope of the present invention.
In addition, directional terms mentioned in the present invention, such as [ upper ], [ lower ], [ front ], [ rear ], [ left ], [ right ], [ inner ], [ outer ], [ side ], and the like, refer to directions of the attached drawings only. Accordingly, the directional terminology is used for purposes of illustration and understanding and is in no way limiting. In the various figures, elements of similar structure are identified by the same reference numerals. For purposes of clarity, the various features in the drawings are not drawn to scale. Moreover, some well-known elements may not be shown in the figures.
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail below with reference to the accompanying drawings.
With the development of display technology, more and more application function scenes need display devices with larger display areas, the traditional display device with a single display panel cannot meet the requirement, and the display device formed by splicing a plurality of display panels is generated, namely, the screen connection technology. As shown in fig. 1, which is a schematic structural diagram of a screen-connected display panel 100 in the prior art, the display panel 100 is composed of a plurality of sub display panels 110 and a packaging material 120 spliced around the sub display panels 110, where the sub display panels 110 are generally Organic Light-Emitting display panels (OLEDs), and the requirements of splicing and cooperative display of screens are met by splicing a plurality of Organic Light-Emitting display panels together.
As shown in fig. 2, a schematic view of an encapsulation film structure of an OLED is shown, and in general, an encapsulation film structure of a conventional organic electroluminescent display panel includes, sequentially stacked from bottom to top, an Anode 111 (Anode in english), a Hole transport Layer 112 (HTL in english), a light Emitting Layer 113 (EML in english), an Electron transport Layer 114 (ETL in english), a Cathode 115 (Cathode in english), and a Capping Layer 116 (CPL in english). At least one of the anode 111 or the cathode 115 needs to be transparent in order to transmit light emitted from the light emitting layer 113. In general, the anode 111 is selected as a transparent electrode, for example, the material of the anode 111 is Indium Tin Oxide (ITO), and of course, the cathode 115 may also be selected as a transparent electrode, which is not limited in particular. When the light emitting layer emits light and propagates outward, there is a surface plasmon polariton effect near the metal/dielectric interface, which results in a reduction in the efficiency of the emitted light, which can be improved by providing a capping layer 116 on the cathode 115.
Where the anode 111 is to be hole injected and the carriers in the anode 111 are holes and positively charged, and the cathode 115 is to be electron injected and the carriers in the cathode 115 are electrons and negatively charged. The hole transport layer 112 serves to transport holes flowing from the anode 111 to the light emitting layer 113 and block electrons flowing from the light emitting layer 113 from reaching the anode 111, and the electron transport layer 114 serves to transport electrons flowing from the cathode 115 to the light emitting layer 113 and block holes flowing from the light emitting layer 113 from reaching the cathode 115. The light emitting process of the organic electroluminescent display panel includes: when a proper voltage is applied to the anode 111 and the cathode 115, electrons and holes overcome an interface energy barrier and are injected through the cathode 115 and the anode 111, the electrons and the holes migrate to the light emitting layer 113 through the electron transport layer 114 and the hole transport layer 112, respectively, and the electrons and the holes are combined with each other in the light emitting layer 113 to form excitons in an excited state, the excitons transfer energy to organic light emitting molecules of the light emitting layer 113, and the electrons exciting the organic light emitting molecules transition from a ground state to an excited state, and the electrons in the excited state release energy to return to a stable ground state, thereby generating glow discharge, thereby realizing electroluminescence.
However, since the organic material in the light emitting layer 113 of the organic electroluminescent display panel is sensitive to water (H2O) and oxygen (O2), after the light emitting effective area (i.e., the A1 area shown in fig. 2) is fabricated, it needs to be encapsulated with other materials, i.e., the encapsulating material 120 (i.e., the A2 area shown in fig. 2) needs to be beyond the light emitting effective area. In order to further reduce the Border (Border) area of the non-display area, most of the existing screen connecting technologies adopt a Border narrowing method, the left and right borders of the display Panel (Panel) are narrowed extremely to obtain very narrow four-side borders, and then the special display panels are spliced into a large-size display Panel to achieve the purpose of splicing display. Because the boundary region of the organic electroluminescent display panel can be narrowed but is indispensable because of the characteristic of the light-emitting layer 113, although the conventional screen-connecting technology can realize the combined display of a plurality of screens, the influence of a frame always exists between the screens, a non-display area is reserved, and the non-display area is represented on a large screen, and another black line appears, so that the seamless effect cannot be really realized.
Based on the problems in the prior art, as shown in fig. 3, the present invention provides a display panel 200, which includes a plurality of sub-display panels 210 arranged in a tiled manner, the display panel 200 further includes a plurality of display regions (i.e., regions corresponding to a first sub-display panel, not shown in the figure) and tiled regions located between the plurality of display regions (i.e., regions corresponding to a second sub-display panel, not shown in the figure), the plurality of sub-display panels 210 includes a first sub-display panel 220 located in the display region and a second sub-display panel 230 located in the tiled regions, wherein the second sub-display panel 230 includes micro LEDs or mini LEDs.
As shown in fig. 4, which is a schematic structural diagram of the sub-pixels of the OLED, the pixel unit 130 includes a red sub-pixel 131, a green sub-pixel 132, and a blue sub-pixel 133, the red sub-pixel 131 and the blue sub-pixel 133 are irregular in shape, and the number of the red sub-pixel 131 and the blue sub-pixel 133 is half of the number of the green sub-pixel 132. In order to ensure that the arrangement density of the sub-pixels is reduced and the cost is reduced under the condition of the same resolution, a Pentile RGB arrangement mode (as the sub-pixel arrangement mode shown in figure 3) is adopted in the organic electroluminescent display panel, and a single pixel point of the Pentile RGB arrangement only consists of two sub-pixel points of red and green or blue and green. When an image is actually displayed, one pixel point arranged by Pentile RGB can 'borrow' another color of the pixel point adjacent to the pixel point to form three primary colors, namely, each pixel and the adjacent pixel share a sub-pixel of the color which is not possessed by the pixel, and light rays of different colors can be emitted by adjusting the light emitting proportion and the brightness of the sub-pixel point and the adjacent pixel.
Based on the schematic structural diagram of the sub-pixels shown in fig. 4, as shown in fig. 5, the schematic structural diagram of the film layer of the OLED is shown, the pixel unit 130 including the red sub-pixel 131, the green sub-pixel 132, and the blue sub-pixel 133 is located on the thin film transistor unit 140 and the substrate 150 which are sequentially stacked, in order to ensure the light emitting intensity, the size of the pixel unit 130 is generally slightly larger than the size of the corresponding thin film transistor unit 140, when the second sub-display panel 230 is an organic electroluminescence display panel, because the size of the pixel unit 130 of the second sub-display panel 230 located in the splicing region is larger than the size of the thin film transistor, the distance between the pixel units 130 in the splicing region cannot be kept consistent with the distance between the pixel units 130 in the display region, the continuity between the splicing region and the pixel units 130 in the display region cannot be ensured, the space is limited when the screen is spliced, and the seamless splicing cannot be realized.
Unlike the schematic structure of the sub-pixels shown in fig. 4, as shown in fig. 6, the schematic structure of the sub-pixels of the micro LED or the mini LED is different from the Pentile RGB arrangement of the organic electroluminescent display panel, the micro LED or the mini LED adopts a standard RGB arrangement, the pixel unit 240 includes a red sub-pixel 241, a green sub-pixel 242, and a blue sub-pixel 243, each sub-pixel has the same size and number, and different colors of light can be emitted by adjusting the light emitting ratio and the brightness of the three sub-pixels.
Based on the schematic structure of the sub-pixel shown in fig. 6, as shown in fig. 7, which is a schematic structure of a micro LED or a mini LED, a pixel unit 240 including a red sub-pixel 241, a green sub-pixel 242, and a blue sub-pixel 243 is located on a thin film transistor unit 250 and a substrate 260 which are sequentially stacked. Unlike organic electroluminescent display panels, micro LEDs or mini LEDs are inorganic metal semiconductors or inorganic light emitting diodes, which essentially consist of organic light bulbs on a pixel level. Because the second sub-display panel 230 is a micro LED or a mini LED, different from the organic electroluminescent display panel, the whole effective light emitting area needs to be packaged, and the micro LED or the mini LED is based on a self-packaging technology, that is, the micro LED or the mini LED is used for packaging a single sub-pixel, and no additional packaging design is needed, the size of the boundary can be reduced to zero, the influence of the boundary caused by the whole-surface packaging of the organic electroluminescent display panel is overcome, and the distance between the outermost pixel units 240 of the splicing area can be kept consistent with the distance between the outermost pixel units 240 of the display area, thereby realizing 'seamless' splicing.
In addition, the first sub-display panel 220 and the second sub-display panel 230 may be bonded by glue, for example, optical Clear Adhesive (OCA), a transparent Optical Adhesive, which has a light transmittance of more than 90%, has good bonding strength, can be cured at room temperature or middle temperature, is a special Adhesive for bonding transparent Optical elements, and is widely used in the display technology field, or Pressure Sensitive Adhesive (PSA), a viscoelastic body having both liquid viscosity and solid elasticity, and has good transparency, and other bonding methods may be used as long as the first display panel and the second display panel can be bonded, which is not particularly limited.
Wherein the first sub display panel 220 includes an organic electroluminescent display panel.
Specifically, the second sub-display panel 230 may be an organic electroluminescent display panel that needs to encapsulate the entire light emitting effective area, when the first sub-display panel 220 is an organic electroluminescent display panel, the second sub-display panel 230 is disposed in the splicing area outside the first sub-display panel 220, and by using the self-packaging property of the micro LED or the mini LED, on one hand, the light emitting effective area of the first sub-display panel 220 is encapsulated to prevent water and oxygen from entering and affecting the organic electroluminescent display panel, and on the other hand, by using the self-packaging property of the micro LED or the mini LED, the black line in the display screen of the splicing display panel is eliminated, thereby achieving "seamless" of the screen splicing technology and improving the display quality of the display panel.
Wherein the display panel further comprises an encapsulation layer covering the upper sides of the plurality of organic electroluminescent display panels.
Specifically, when the first sub-display panel 220 is an organic electroluminescent display panel, by disposing the second sub-display panel 230 in the splicing region outside the first sub-display panel 220, the outside of the organic electroluminescent display panel is encapsulated while achieving seamless splicing, so as to prevent oxygen from entering the outside of the organic electroluminescent display panel. In order to prevent the top of the organic electroluminescent display panel from being affected by water and oxygen, an encapsulation layer may be further disposed on the upper sides of the plurality of organic electroluminescent display panels, and the upper sides of the organic electroluminescent display panels are protected from water and oxygen by the encapsulation layer. The Encapsulation layer (TFE) may be formed on the top of the organic electroluminescent display panel by Atomic Layer Deposition (ALD), inkjet printing (IJP), and the like, so as to prevent the top of the organic electroluminescent display panel from being affected by water and oxygen, thereby improving the display quality of the display panel.
Wherein the first sub display panel 220 includes a micro LED or a mini LED.
Specifically, when the first sub-display panel 220 is a micro LED or a mini LED, that is, the first sub-display panel 220 and the second sub-display panel are the same and are all micro LEDs or mini LEDs, the first sub-display panel 220 and the second sub-display panel 230 can be directly made into micro LEDs or mini LEDs, and the second sub-display panel 230 can also be arranged outside the first sub-display panel 220 in a splicing manner, which is not particularly limited. In addition, as described above, the splicing manner may be a glue bonding manner, such as using an optical glue, or using a pressure-sensitive adhesive, and other splicing manners may also be used, as long as the splicing of the first display panel and the second display panel is achieved, which is not limited in particular. By arranging the second sub-display panel 230 in the splicing area outside the first sub-display panel 220, the self-packaging characteristic of micro LEDs or mini LEDs is utilized to eliminate black lines in the display picture of the splicing display panel, thereby realizing 'seamless' of the screen splicing technology and improving the display quality of the display panel.
The plurality of sub-display panels are arranged in an array manner.
As shown in fig. 3, a structural schematic diagram of the display panel provided in the embodiment of the present invention is that a plurality of sub-display panels are arranged in an array to form a large-sized display panel that is seamlessly spliced, so as to meet the requirements of mutual splicing and cooperative display of screens. In addition, the display panels may be arranged in other manners, such as forming a wide single-row display panel by using a plurality of sub-display panels, forming a long single-column display panel by using a plurality of sub-display panels, or arranging a special pattern, such as a "meter" shape or other patterns, without limitation.
Wherein the second sub display panel 230 is disposed around the first sub display panel 220.
As shown in fig. 3, the second sub-display panel 230 is disposed around the first sub-display panel 220, that is, the second sub-display panel 230 is disposed around the first sub-display panel 220, and by using the second sub-display panel 230 disposed around the first sub-display panel 220 and using the second sub-display panel 230 which is a micro LED or a mini LED, on one hand, the periphery of the second sub-display panel 230 is encapsulated to prevent water and oxygen from entering and affecting the second sub-display panel 230, and on the other hand, the self-encapsulation characteristic of the micro LED or the mini LED is used to eliminate the black lines in the display screen of the tiled display panel, thereby realizing the "seamless" of the screen-joining technology and improving the display quality of the display panel. In addition, different from the scheme that the peripheries of the outer sides of the first sub-display panels 220 need to be spliced, when one or more sides of the outer sides of the first sub-display panels 220 need to be spliced, the second sub-display panels may also be located on one or more sides of the outer sides of the first sub-display panels 220, as long as the second sub-display panels 230 can be encapsulated to eliminate black lines in the display images of the spliced display panels, so that "seamless" of the screen splicing technology is realized, and specific limitations are not made.
The second sub-display panel 230 includes a plurality of pixel units 240 and a thin film transistor unit 250 for controlling the corresponding pixel unit 240, which are sequentially stacked, wherein a projection of the pixel unit 240 on the thin film transistor unit 250 is completely located in an area of the thin film transistor unit 250.
As shown in fig. 7, the second sub-display panel 230 includes a plurality of pixel units 240, a thin film transistor unit 250 controlling the corresponding pixel unit 240, and a substrate 260, which are sequentially stacked from top to bottom, and a projection of the pixel unit 240 on the thin film transistor unit 250 is completely located in an area of the thin film transistor unit 250, i.e., a size of the pixel unit 240 is not larger than a size of the thin film transistor unit 250. When the size of the pixel units 240 of the second sub-display panel 230 is not greater than the size of the tft units 250, the pitch of the pixel units in the splicing region can be kept consistent with the pitch of the pixel units in the display region, so as to ensure the continuity of the pixel units 240 in the outermost splicing region, thereby achieving "seamless" splicing.
The width of the pixel unit 240 is not greater than the width of the thin film transistor unit 250, and the length of the pixel unit 240 is not greater than the length of the thin film transistor unit 250.
Specifically, as described above, the projection of the pixel unit 240 on the thin film transistor unit 250 is completely located in the area of the thin film transistor unit 250, i.e., the area of the thin film transistor unit 250 may completely cover the area of the pixel unit 240, and correspondingly, the width of the pixel unit 240 is not greater than the width of the thin film transistor unit 250, and the length of the pixel unit 240 is not greater than the length of the thin film transistor unit 250. By adopting the pixel units 240 of the second sub-display panel 230 with smaller areas than the thin film transistor units 250, the pitch between the pixel units 240 of the second sub-display panel 230 in the splicing region can be kept consistent with the pitch of the pixel units 240 of the effective light emitting region of the first sub-display panel 220, thereby realizing "seamless" splicing.
The display panel 300 further includes a gate driving circuit 320, and the gate driving circuit 320 is vertically projected in the display area 310, wherein the vertical direction includes a direction parallel to the vertical display area direction.
As shown in fig. 8, for a structural schematic diagram of the display panel 300 including the gate driving circuit 320 according to the embodiment of the present invention, the gate driving circuit 320 is in a vertical projection of the display area 310, wherein the vertical direction is a direction parallel to the direction perpendicular to the display area 310, as shown in fig. 8, the horizontal direction is a direction parallel to the X direction, the vertical direction is a direction parallel to the Y direction, and the vertical direction is a direction perpendicular to a plane formed by the X direction and the Y direction (i.e., a plane formed by the display area 310), i.e., a direction parallel to the Z direction, and the vertical direction is the same as the direction below, and is not repeated. The Gate driving circuit 320 (Gate On Array, GOA), also called as an Array row driving circuit, is used for driving the display panel in a row-by-row scanning manner. In current display device, because various drive module and circuit board need bind with display panel and be connected, need reserve on the display device and carry out the circuit and bind in order to carry out the circuit in sufficient non-display area, lead to display device's non-display area great all the time, be unfavorable for display device's narrow frame or no frame. When the gate driving circuit 320 is in the vertical projection of the display region 310, that is, the gate driving circuit 320 is located below the display region 310, the gate driving circuit may be disposed on the same layer as the thin film transistor unit 250, or disposed on a different layer from the thin film transistor unit 250, which is not limited in particular. The grid driving circuit is vertically projected in the display area to reduce or eliminate the non-display area of the display panel, thereby being beneficial to realizing 'seamless' of the screen connecting technology and improving the display quality of the display panel.
The display panel 300 further includes a fan-out region 330, the fan-out region 330 is electrically connected to the gate driving circuit 320, and the fan-out region 330 is vertically projected in the display area 310.
Specifically, as shown in fig. 8, the display panel 300 further includes a fan-out area 330 (AA fanout), where the fan-out area 330 is a sector area where a plurality of data lines of the display panel 300 are gathered, one end of the fan-out area 330 is electrically connected to the plurality of data lines of the display panel 300, and the other end is electrically connected to the gate driving circuit 320, so that the gate driving circuit 320 realizes the line-by-line scanning driving. In general, the fan-out area 330 is located in the non-display area of the display panel 300, which is not favorable for the narrow frame or the frameless frame of the display panel 300. When the fan-out area 330 is vertically projected in the display area 310, that is, the fan-out area is located below the display area 310, the fan-out area 330 may be disposed on the same layer as the gate driving circuit 320, or may be disposed on a different layer from the gate driving circuit 320, as long as the fan-out area 330 is located below the display area 310, which is not limited in particular. By placing the fan-out 330 within the vertical projection of the display area 310, the non-display area of the display panel is further reduced or eliminated.
In addition, unlike the scheme shown in fig. 8 in which two gate driving circuits and two fan-out regions 330 corresponding to the gate driving circuits are located below the display region 310, as shown in fig. 9, for another structural schematic diagram of a display panel including a gate driving circuit provided in an embodiment of the present invention, the display panel 400 is only provided with one gate driving circuit 420 and a fan-out region 430 corresponding to the gate driving circuit, and the gate driving circuit 420 and the fan-out region 430 corresponding to the gate driving circuit are both vertically projected in the display region 410, so as to further reduce the area of the non-display region of the display panel 400, thereby improving the integration level of the display panel 400, and facilitating to implement "seamless" of the screen-connecting technology.
Therefore, the display panel provided by the invention comprises a plurality of sub-display panels which are spliced, and the display panel further comprises a plurality of display areas and splicing areas which are positioned among the display areas, wherein the plurality of sub-display panels comprise a first sub-display panel positioned in the display areas and a second sub-display panel positioned in the splicing areas, the second sub-display panel comprises micro LEDs or mini LEDs, and black lines in display pictures of the spliced display panels are eliminated by utilizing the self-packaging characteristic of the micro LEDs or the mini LEDs which are arranged on the outer sides of the first sub-display panels, so that the seamless screen splicing technology is realized, and the display quality of the display panel is improved.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents and improvements made within the spirit and principle of the present invention are intended to be included within the scope of the present invention.
Claims (7)
1. The display panel is characterized by comprising a plurality of sub-display panels which are arranged in a splicing mode, the display panel further comprises a plurality of display areas and splicing areas which are located among the display areas, the distance between pixel units of the splicing areas is equal to the distance between the pixel units of the display areas, the sub-display panels comprise a first sub-display panel which is located in the display areas and a second sub-display panel which is located in the splicing areas, wherein the first sub-display panel is an organic electroluminescence display panel, and the second sub-display panel is a micro LED display panel or a miniLED display panel;
and the display panel further comprises an encapsulation layer, and the encapsulation layer is arranged on the first sub-display panel to encapsulate the first sub-display panel.
2. The display panel of claim 1, wherein the plurality of sub-display panels are arranged in an array.
3. The display panel of claim 1, wherein the second sub-display panel is disposed around the first sub-display panel.
4. The display panel according to claim 1, wherein the second sub-display panel includes a plurality of pixel units and thin film transistor units that control the corresponding pixel units, which are sequentially stacked, wherein projections of the pixel units on the thin film transistor units are entirely located within regions of the thin film transistor units.
5. The display panel of claim 4, wherein the width of the pixel cell is not greater than the width of the thin film transistor cell, and the length of the pixel cell is not greater than the length of the thin film transistor cell.
6. The display panel of claim 1, further comprising a gate drive circuit that is vertically projected within the display area, wherein the vertical direction comprises a direction parallel to a direction perpendicular to the display area.
7. The display panel of claim 6, wherein the display panel further comprises a fan-out region electrically connected to the gate drive circuitry, the fan-out region being vertically projected within the display area.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110731234.3A CN113451382B (en) | 2021-06-30 | 2021-06-30 | Display panel |
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Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20190070633A (en) * | 2017-12-13 | 2019-06-21 | 엘지디스플레이 주식회사 | Micro led display device |
| CN110491909A (en) * | 2019-07-29 | 2019-11-22 | 武汉华星光电技术有限公司 | Display panel |
| CN111208673A (en) * | 2020-01-17 | 2020-05-29 | 深圳市华星光电半导体显示技术有限公司 | Backlight module and display panel |
| CN111369900A (en) * | 2020-04-07 | 2020-07-03 | 深圳市华星光电半导体显示技术有限公司 | Spliced screen |
| CN111445807A (en) * | 2020-04-24 | 2020-07-24 | 深圳市华星光电半导体显示技术有限公司 | L ED spliced display panel |
| CN111653207A (en) * | 2020-07-30 | 2020-09-11 | 上海天马微电子有限公司 | Display module assembly, display device and spliced screen |
| CN112420790A (en) * | 2020-11-16 | 2021-02-26 | 武汉华星光电半导体显示技术有限公司 | Display panel |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6853411B2 (en) * | 2001-02-20 | 2005-02-08 | Eastman Kodak Company | Light-producing high aperture ratio display having aligned tiles |
| US11164934B2 (en) * | 2019-03-12 | 2021-11-02 | X Display Company Technology Limited | Tiled displays with black-matrix support screens |
| CN109903723A (en) * | 2019-04-19 | 2019-06-18 | 深圳市华星光电半导体显示技术有限公司 | Special-shaped display device |
| CN110379322A (en) * | 2019-07-15 | 2019-10-25 | 深圳市华星光电半导体显示技术有限公司 | Display panel, display module and display device |
-
2021
- 2021-06-30 CN CN202110731234.3A patent/CN113451382B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20190070633A (en) * | 2017-12-13 | 2019-06-21 | 엘지디스플레이 주식회사 | Micro led display device |
| CN110491909A (en) * | 2019-07-29 | 2019-11-22 | 武汉华星光电技术有限公司 | Display panel |
| CN111208673A (en) * | 2020-01-17 | 2020-05-29 | 深圳市华星光电半导体显示技术有限公司 | Backlight module and display panel |
| CN111369900A (en) * | 2020-04-07 | 2020-07-03 | 深圳市华星光电半导体显示技术有限公司 | Spliced screen |
| CN111445807A (en) * | 2020-04-24 | 2020-07-24 | 深圳市华星光电半导体显示技术有限公司 | L ED spliced display panel |
| CN111653207A (en) * | 2020-07-30 | 2020-09-11 | 上海天马微电子有限公司 | Display module assembly, display device and spliced screen |
| CN112420790A (en) * | 2020-11-16 | 2021-02-26 | 武汉华星光电半导体显示技术有限公司 | Display panel |
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