CN113451167A - Packaging test method and device and electronic equipment - Google Patents
Packaging test method and device and electronic equipment Download PDFInfo
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- CN113451167A CN113451167A CN202110813260.0A CN202110813260A CN113451167A CN 113451167 A CN113451167 A CN 113451167A CN 202110813260 A CN202110813260 A CN 202110813260A CN 113451167 A CN113451167 A CN 113451167A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/14—Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
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- General Physics & Mathematics (AREA)
- Tests Of Electronic Circuits (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
Abstract
The application provides a packaging test method, a packaging test device and electronic equipment, and relates to the technical field of packaging test. The method is used for testing the electrostatic protection device, the electrostatic protection device comprises a routing pin and a vacant pin, a target vacant pin is determined from the vacant pins, then the voltage of the target vacant pin is set to be a preset voltage, the voltage of the pins except the target vacant pin is set to be zero, then the leakage current value of the target vacant pin is obtained, and finally when the leakage current value is larger than a threshold value, the packaging fault of the electrostatic protection device is determined. The application provides a packaging test method, a packaging test device and electronic equipment, which have the advantage of being capable of detecting whether a potential failure occurs in an electrostatic protection device.
Description
Technical Field
The present disclosure relates to the field of package testing technologies, and in particular, to a package testing method and apparatus, and an electronic device.
Background
With the rapid development of electronic products, Electro-Static discharge (ESD) devices are increasingly applied to various electronic products to overcome Static electricity generated during the manufacturing, packaging, testing, and transportation of the products. As the critical dimension of devices in IC circuits is smaller and smaller, among many factors causing IC function failure, ESD device failure has become one of the main factors, so in circuit design, an independent electrostatic protection device is often added in the peripheral design of the circuit to protect sensitive devices.
At present, an electrostatic protection device is often packaged in a multi-pin packaging type, and generally comprises a routing pin, a vacant pin and a grounding pad in a plurality of pins of the electrostatic protection device.
Therefore, after the packaging test, the packaging test is generally performed on the electrostatic protection device, however, for the vacant pins, there is no practical functional requirement, so that the vacant pins are not tested during the packaging test, and further, the potential failure condition may occur.
In summary, in the prior art, when the empty pin is adhered, the packaging test cannot be effectively performed, and thus the problem of potential failure of the electrostatic protection device may occur.
Disclosure of Invention
The application aims to provide a packaging test method, a packaging test device and electronic equipment, so as to solve the problem that potential failure of an electrostatic protection device may occur in the prior art.
In order to achieve the above purpose, the embodiments of the present application employ the following technical solutions:
in a first aspect, an embodiment of the present application provides a package testing method, where the method is used to test an electrostatic protection device, where the electrostatic protection device includes a wire bonding pin and an empty pin, and the method includes:
determining a target vacant pin position from the vacant pin positions;
setting the voltage of the target vacant pin as a preset voltage, and setting the voltage of pins except the target vacant pin to be zero;
acquiring a leakage current value of the target vacant pin position;
and when the leakage current value is larger than a threshold value, determining that the packaging of the electrostatic protection device is in fault.
Optionally, the step of setting the voltage of the target idle pin to a preset voltage includes:
and setting the voltage of the target vacant pin position as a preset voltage, wherein the preset voltage is less than the working voltage of the electrostatic protection device.
Optionally, the electrostatic protection device includes a ground pad, and the step of determining a target empty pin from the empty pins includes:
determining the target vacant pin position from vacant pin positions adjacent to the grounding pad.
Optionally, after the step of determining that the electrostatic protection device package is faulty when the leakage current value is greater than a threshold value, the method further includes:
acquiring an X-ray picture of the electrostatic protection device;
and analyzing the X-ray picture to determine whether the electrostatic protection device fails.
Optionally, the electrostatic protection device includes a ground pad, and the step of analyzing the X-ray picture to determine whether the electrostatic protection device fails includes:
and when the target vacant pin position is adhered to the adjacent grounding pad or pin, determining that the electrostatic protection device fails.
Optionally, after the step of obtaining the leakage current value of the target vacant pin, the method further includes:
and when the leakage current value is smaller than the threshold value, selecting another vacant pin position as a target vacant pin position to carry out packaging test until all the vacant pin positions are tested.
In a second aspect, an embodiment of the present application further provides a package testing apparatus, where the apparatus is used to test an electrostatic protection device, the electrostatic protection device includes a wire bonding pin and an empty pin, and the apparatus includes:
the pin position determining module is used for determining a target vacant pin position from the vacant pin positions;
the voltage setting module is used for setting the voltage of the target vacant pin as a preset voltage and setting the voltage of the pins except the target vacant pin to be zero;
the data acquisition module is used for acquiring a leakage current value of the target vacant pin position;
and the judging module is used for determining the packaging fault of the electrostatic protection device when the leakage current value is greater than a threshold value.
Optionally, the voltage setting module is configured to set a voltage of the target idle pin to a preset voltage, where the preset voltage is smaller than a working voltage of the electrostatic protection device.
Optionally, the electrostatic protection device includes a ground pad, and the pin position determination module is configured to determine the target vacant pin position from among vacant pin positions adjacent to the ground pad.
In a third aspect, an embodiment of the present application further provides an electronic device, including: a memory for storing one or more programs; a processor; the one or more programs, when executed by the processor, implement the package testing method described above.
Compared with the prior art, the method has the following beneficial effects:
the application provides a packaging test method, a packaging test device and electronic equipment, wherein the method is used for testing an electrostatic protection device, the electrostatic protection device comprises a routing pin position and an idle pin position, a target idle pin position is determined from the idle pin position firstly, then the voltage of the target idle pin position is set to be a preset voltage, pin voltages except the target idle pin position are set to be zero, then a leakage current value of the target idle pin position is obtained, and finally when the leakage current value is larger than a threshold value, the packaging fault of the electrostatic protection device is determined. By testing the leakage current of the vacant pin positions of the electrostatic protection devices, whether the electrostatic protection devices have packaging faults or not can be determined, and the problem that whether the electrostatic protection devices have potential failures or not can be detected is further guaranteed.
In order to make the aforementioned objects, features and advantages of the present application more comprehensible, preferred embodiments accompanied with figures are described in detail below.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and it will be apparent to those skilled in the art that other related drawings can be obtained from the drawings without inventive effort.
Fig. 1 is a schematic diagram of a multi-integrated esd protection device for an HDMI interface circuit according to an embodiment of the present disclosure.
Fig. 2 is a schematic circuit diagram of a multi-channel integrated ESD protection device for a USB3.0 interface according to an embodiment of the present disclosure.
Fig. 3 is a schematic diagram of a multi-channel integrated ESD protection device for an RJ45 network port according to an embodiment of the present disclosure.
Fig. 4 is a schematic flowchart of DFN packaging according to an embodiment of the present disclosure.
Fig. 5 is a bonding and wiring diagram of internal chips of the DFN2510-10L packaged four-way integrated protection device provided by the embodiment of the present application.
Fig. 6 is a schematic diagram of an equivalent circuit corresponding to fig. 5 according to an embodiment of the present disclosure.
Fig. 7 is a schematic diagram of an equivalent circuit corresponding to fig. 3 according to an embodiment of the present disclosure.
Fig. 8 is an internal die bonding wiring diagram corresponding to fig. 3 provided in an embodiment of the present application.
Fig. 9 is a flowchart of a package testing method according to an embodiment of the present application.
Fig. 10 is a schematic diagram of an X-ray picture provided in an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the present application, presented in the accompanying drawings, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the description of the present application, it is also to be noted that, unless otherwise explicitly specified or limited, the terms "disposed" and "connected" are to be interpreted broadly, e.g., as being either fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present application can be understood in a specific case by those of ordinary skill in the art.
Some embodiments of the present application will be described in detail below with reference to the accompanying drawings. The embodiments described below and the features of the embodiments can be combined with each other without conflict.
As described in the background, currently, with the development of high-speed data transmission interfaces, in order to meet the requirements of medium and high-speed interfaces, such as keys, USB2.0, USB3.0, VGA, HDMI, network interface, etc., the ESD device also needs to reduce the capacitance to protect the integrity of information transmission. FIG. 1 shows a schematic diagram of a multi-way integrated Electrostatic (ESD) protection device for an HDMI interface circuit, wherein DFNs 2510-10L package four-way integrated ESD devices are dedicated to high-speed port interface protection; FIG. 2 shows a schematic diagram of a multi-channel integrated ESD protection device for USB3.0 interface circuit, wherein the DFN1610-2L packages two-channel integrated ESD devices for high-speed interface protection; fig. 3 shows a schematic diagram of a multi-channel integrated ESD protection device for RJ45 network port, wherein the four-channel integrated ESD device packaged by DFNs 2626-10L is dedicated to network port high-speed port protection. Therefore, the multi-channel integrated ESD protection device is widely applied to the protection of the high-speed signal interface.
At present, a multi-pin package type such as SOT143, SOT23-6L, SOP-8L, SOP-16L and the like is often adopted for a circuit integrated ESD protection device, but with the requirement of customers on device miniaturization, the package size gradually becomes smaller and thinner, and at present, DFN packages gradually become mainstream, such as DFNs 2510-10L, DFN1610-6L, DFN2626-10L, DFN3020-10L and the like. Multi-pin DFN packages are becoming the optimal choice for multi-way integrated ESD protection devices.
Fig. 4 shows a simplified DFN packaging process, which includes chip IQC inspection, chip cutting, post-cutting inspection, bonding pads, wire bonding, plastic packaging cutting, taping test printing, warehousing and shipping. The chip welding is to absorb and weld the die cut and separated on the wafer to the width deepening one by one, baking needs to be completed within 24 hours after the chip is welded to the frame, and the baking can solidify the silver paste, so that the chip welding level is further improved. FIG. 5 is a bonding and wiring diagram of the inner chip of the DFN2510-10L packaged four-way integrated protection device. In the figure, a chip is welded on a frame between a PIN3 and a PIN8 through conductive adhesive, a dispensing head can move to a dispensing position of a public PAD of the PIN3 and the PIN8, accurate dispensing is carried out according to program setting, and a soldering lug unit can be carried out after all dispensing of a frame is finished. FIG. 6 is a diagram of an actual quad integrated ESD device corresponding to FIG. 5, wherein PIN1, PIN2, PIN4 and PIN5 are I/O interfaces corresponding to high speed signal ports; the PINs 3 and 8 are GND, and since the back of the chip is the substrate in fig. 5, the back of the chip can be soldered by conductive adhesive. In the chip testing stage, the breakdown voltage VBR and the leakage of GND (PIN3 and PIN8) are generally tested by carrying out I/O (PIN1, 2, 4 and 5); simultaneously, GND is added to 4 paths of I/O to test forward VF; the PINs 6, 7, 9, 10 are not added to the test item because they are not wire bonded to the chip.
The device shown in fig. 6 is widely used in HDMI interface protection, and the actual device circuit is shown in fig. 1. In the actual device patch, for convenience of patch, because the PINs 6, 7, 9 and 10 are vacant interfaces, the PINs 1 and 10, the PINs 2 and 9, the PINs 4 and 7, and the PINs 5 and 6 are connected to form four paths for electrostatic protection of the HDMI interface circuit.
The dispensing head needs to be accurately controlled in the conductive adhesive dispensing process in the packaging process, and the dispensing amount needs to cover the back of the chip. However, the dispensing process is finished, the dispensing head controls the dispensing amount through air pressure, and due to the existence of the adhesive and other components in the silver paste, more and more silver paste can be gathered at the edge of the dispensing head along with the dispensing process, so that an operator needs to clean the dispensing head at regular time. However, the phenomenon that the dispensing head is not cleaned timely still occurs in the process of switching shifts or night shifts; or the glue dispensing offset position and other reasons can cause the glue overflow phenomenon, and especially the glue overflow is to the pin position of not testing, which causes short circuit failure in the practical use of customers.
The above-mentioned problems are not limited to occur in DFNs 2510-10L, and as long as the ESD devices are packaged in multi-way packages such as DFN packages or SOT packages and SOP packages, the risk of short circuit failure due to glue overflow may occur. DFN2626-10L packages are shown in fig. 3, where fig. 7 and 8 are device structures and bond wiring diagrams, respectively. Fig. 3 shows an actual circuit of a protection device applied to a RJ45 socket terminal. The product is actually wire bonded to PIN1, 3, 5, 7, 9, wherein PIN1, 3, 7, 9 is connected to I/O, PIN5 is Vcc, and middle PAD is GND. The actual test circuit can test the breakdown voltage and the electric leakage between the PIN and the GND; however, if the PIN8 is abnormally overflowed from the middle PAD as shown in fig. 8, the PIN6 and the PIN10 are also short-circuited together in combination with the practical application of fig. 3, short-circuit failure is caused, and the internet access transmission is abnormal.
In summary, the failure of the client terminal caused by the dispensing process cannot be managed and controlled by the inspection means at the current station, and the products with potential failure cannot be intercepted in the subsequent testing process.
In view of this, the present application provides a package testing method, which can determine whether a package failure occurs in an electrostatic protection device by a leakage current of a tested dummy pin.
As an implementation, referring to fig. 9, the method includes:
and S102, determining a target vacant pin position from the vacant pin positions.
And S104, setting the voltage of the target vacant pin as a preset voltage, and setting the voltage of the pins except the target vacant pin to be zero.
And S106, acquiring a leakage current value of the target vacant pin position.
And S108, when the leakage current value is larger than the threshold value, determining that the electrostatic protection device is in a packaging fault state.
The electrostatic protection device comprises a routing PIN position and a vacant PIN position, the routing PIN position refers to a PIN PIN which is routed to the chip and can be used as an I/O port, and the vacant PIN position refers to a PIN PIN which is not routed to the chip. For example, as shown in fig. 5, PIN legs 1, 2, 4, and 5 are bond pads, while PIN legs 6, 7, 9, and 10 are free pads.
In combination with the above prior art, it can be known that, at present, only the pin-bonding position is tested, but the empty pin-bonding position is not tested. The reason is that, for those skilled in the art, the empty pin is in a floating state, so it is common knowledge that it is not necessary to test the empty pin, and therefore, when the esd protection device fails, it is generally considered that the empty pin is only a result of poor device performance, so that no attention is paid to the empty pin.
However, the applicant has found that the failure of the esd protection device is actually a result of the glue overflow phenomenon, especially when the glue overflow is not performed to the testing pin, the short circuit failure may be caused in the practical use of the user.
Therefore, the applicant adopts a mode of judging the encapsulation fault of the empty pin position to ensure that the potential failure phenomenon of the electrostatic protection device can not occur.
In one implementation, when performing package inspection, a target empty pin is determined from a plurality of empty pins, for example, any one of 4 empty pins in an electrostatic protection device is selected as a target empty pin, then the voltage of the target empty pin is set to a preset voltage, the voltage of the pins except the target empty pin is set to zero, and then a leakage current value of the target empty pin is obtained; and when the leakage current value is smaller than the threshold value, the electrostatic protection device package can be determined to be normal.
The preset voltage corresponds to the threshold, for example, when the selected preset voltage is a, the threshold is set to a, and when the selected preset voltage is B, the threshold is set to B, which is not limited herein.
When the empty pin is not adhered to other pins, the value of the leakage current is relatively small and is smaller than the threshold value, and when the empty pin is adhered to other pins, the value of the leakage current is relatively large, so that the value of the leakage current is possibly larger than the threshold value. Therefore, by this method, it can be determined whether the electrostatic protection device is packaged normally.
In an optional implementation manner, in order to make the test result more accurate, the preset voltage is smaller than the working voltage of the electrostatic protection device, and on this basis, the threshold of the leakage current may be set to be the leakage current control value of the conventional bonding pin.
Further, the electrostatic protection device includes a ground pad, and S102 includes:
a target empty pin location is determined from the empty pin locations adjacent to the ground pad.
In general, a pin where sticking is likely to occur is a pin adjacent to a ground pad, and therefore, in the present application, when determining a target vacant pin, it is preferable to use a vacant pin adjacent to a ground pad as a target vacant pin.
Optionally, when testing the electrostatic protection device, it is necessary to sequentially perform current tests on all the free pins, and on this basis, after S106, the method further includes:
and S110, when the leakage current value is smaller than the threshold value, selecting another vacant pin position as a target vacant pin position to carry out packaging test until all the vacant pin positions are tested.
Namely, when the leakage current of any vacant pin position is larger than the threshold value, the encapsulation fault of the electrostatic protection device is judged, and only when the leakage current of all target vacant pin positions is smaller than the threshold value, the encapsulation fault of the electrostatic protection device can be judged.
In addition, when performing the test, the test may also be selectively performed according to the actual situation, that is, before S102, the method may further include:
and acquiring test conditions, and testing according to the test conditions.
For example, in a certain scenario, the free PINs include PIN6, 7, 9, and 10, but only PIN10 is connected to PIN1, and the rest of the free PINs are all suspended, so that when performing the package test, only PIN10 needs to be tested, and the rest of the free PINs do not need to be tested. Alternatively, in another scenario, all the empty pins may need to be tested, or only part of the empty pins need to be tested, which is not limited herein.
When the leakage current value is larger than the threshold value, although the package fault of the electrostatic protection device can be determined, the reasons of the package fault of the electrostatic protection device are various, and the specific reason of the package fault of the electrostatic protection device cannot be determined.
Therefore, as one implementation manner, after the step of S108, the method further includes:
s1091, obtaining an X-ray picture of the electrostatic protection device;
s1092, analyzing the X-ray picture to determine whether the electrostatic protection device fails.
Namely, when the value of the leakage current exceeds the standard, the X-ray picture analysis is also needed. As one implementation, image recognition may be used to determine whether the electrostatic protection device has failed.
Optionally, the step of S1092 includes:
and when the target vacant pin position is adhered to the adjacent grounding pad or pin, determining that the electrostatic protection device is failed.
For example, as shown in fig. 10, it may be determined that PIN7 is stuck with PIN8, at which time it may be determined that the electrostatic protection device is failed. The operation confirmation needs to be traced back to the previous packaging process, for example, the tracing back needs to be traced back to the dispensing process in the soldering lug process, and the final failure reason needs to be searched.
Based on above-mentioned implementation, this application still provides a encapsulation testing arrangement, and the device is used for testing electrostatic protection device, and electrostatic protection device includes routing pin position and vacant pin position, and the device includes:
and the pin position determining module is used for determining the target vacant pin position from the vacant pin positions.
It is understood that the pin determining module may perform S102 described above.
And the voltage setting module is used for setting the voltage of the target vacant pin to be a preset voltage and setting the voltage of the pins except the target vacant pin to be zero.
It is understood that the voltage setting module may perform S104 described above.
And the data acquisition module is used for acquiring the leakage current value of the target vacant pin position.
It is understood that the data acquisition module may perform S106 described above.
And the judging module is used for determining the packaging fault of the electrostatic protection device when the leakage current value is larger than the threshold value.
It is understood that the determining module may perform S108 described above.
The voltage setting module is used for setting the voltage of the target idle pin to be a preset voltage, wherein the preset voltage is smaller than the working voltage of the electrostatic protection device.
Optionally, the electrostatic protection device comprises a ground pad, and the pin position determining module is configured to determine a target vacant pin position from among vacant pin positions adjacent to the ground pad.
In an optional implementation manner, an embodiment of the present application further provides an electronic device, including: a memory for storing one or more programs; a processor; the package testing method described above is implemented when one or more programs are executed by a processor. By the aid of the electronic equipment, the electronic equipment can be intelligent terminal equipment such as a computer.
In summary, the application provides a package testing method, a device and an electronic device, the method is used for testing an electrostatic protection device, the electrostatic protection device comprises a routing pin and a free pin, a target free pin is determined from the free pin, then the voltage of the target free pin is set to be a preset voltage, the voltage of the pin except the target free pin is set to be zero, then the leakage current value of the target free pin is obtained, and finally when the leakage current value is larger than a threshold value, the package fault of the electrostatic protection device is determined. By testing the leakage current of the vacant pin positions of the electrostatic protection devices, whether the electrostatic protection devices have packaging faults or not can be determined, and the problem that whether the electrostatic protection devices have potential failures or not can be detected is further guaranteed.
The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.
It will be evident to those skilled in the art that the present application is not limited to the details of the foregoing illustrative embodiments, and that the present application may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the application being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
Claims (10)
1. A packaging test method is used for testing an electrostatic protection device, wherein the electrostatic protection device comprises a bonding pin position and an empty pin position, and the method comprises the following steps:
determining a target vacant pin position from the vacant pin positions;
setting the voltage of the target vacant pin as a preset voltage, and setting the voltage of pins except the target vacant pin to be zero;
acquiring a leakage current value of the target vacant pin position;
and when the leakage current value is larger than a threshold value, determining that the packaging of the electrostatic protection device is in fault.
2. The package test method of claim 1, wherein the step of setting the voltage of the target idle pin to a predetermined voltage comprises:
and setting the voltage of the target vacant pin position as a preset voltage, wherein the preset voltage is less than the working voltage of the electrostatic protection device.
3. The package test method of claim 1, wherein the electrostatic protection device includes a ground pad, and the step of determining a target free pin from the free pins comprises:
determining the target vacant pin position from vacant pin positions adjacent to the grounding pad.
4. The package test method of claim 1, wherein after the step of determining that the electrostatic protection device package is faulty when the leakage current value is greater than a threshold value, the method further comprises:
acquiring an X-ray picture of the electrostatic protection device;
and analyzing the X-ray picture to determine whether the electrostatic protection device fails.
5. The package testing method of claim 4, wherein the electrostatic protection device includes a ground pad, and analyzing the X-ray picture to determine whether the electrostatic protection device has failed comprises:
and when the target vacant pin position is adhered to the adjacent grounding pad or pin, determining that the electrostatic protection device fails.
6. The package test method of claim 1, wherein after the step of obtaining the leakage current value for the target free pad, the method further comprises:
and when the leakage current value is smaller than the threshold value, selecting another vacant pin position as a target vacant pin position to carry out packaging test until all the vacant pin positions are tested.
7. A package testing apparatus, the apparatus for testing an electrostatic protection device, the electrostatic protection device including a wire bond pad and a free pad, the apparatus comprising:
the pin position determining module is used for determining a target vacant pin position from the vacant pin positions;
the voltage setting module is used for setting the voltage of the target vacant pin as a preset voltage and setting the voltage of the pins except the target vacant pin to be zero;
the data acquisition module is used for acquiring a leakage current value of the target vacant pin position;
and the judging module is used for determining the packaging fault of the electrostatic protection device when the leakage current value is greater than a threshold value.
8. The package testing apparatus of claim 7, wherein the voltage setting module is configured to set the voltage of the target idle pin to a preset voltage, wherein the preset voltage is smaller than an operating voltage of the esd protection device.
9. The package test apparatus of claim 7, wherein the electrostatic protection device includes a ground pad, and the pin determination module is to determine the target empty pin from among empty pins adjacent to the ground pad.
10. An electronic device, comprising:
a memory for storing one or more programs;
a processor; the one or more programs, when executed by the processor, implement the method of any of claims 1-6.
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