CN113436961A - Method for forming oxide film - Google Patents
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- CN113436961A CN113436961A CN202110703379.2A CN202110703379A CN113436961A CN 113436961 A CN113436961 A CN 113436961A CN 202110703379 A CN202110703379 A CN 202110703379A CN 113436961 A CN113436961 A CN 113436961A
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- 238000000034 method Methods 0.000 title claims abstract description 30
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 25
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 25
- 239000010703 silicon Substances 0.000 claims abstract description 25
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 17
- 239000001301 oxygen Substances 0.000 claims abstract description 17
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 17
- 238000001816 cooling Methods 0.000 claims abstract description 12
- 230000000630 rising effect Effects 0.000 claims abstract description 4
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 32
- 229910052757 nitrogen Inorganic materials 0.000 claims description 13
- 229910001873 dinitrogen Inorganic materials 0.000 claims description 6
- 238000010926 purge Methods 0.000 claims description 6
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 230000000694 effects Effects 0.000 description 9
- 238000002161 passivation Methods 0.000 description 8
- 238000000151 deposition Methods 0.000 description 7
- 238000012360 testing method Methods 0.000 description 7
- 230000008021 deposition Effects 0.000 description 6
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000003749 cleanliness Effects 0.000 description 1
- 239000000498 cooling water Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000002203 pretreatment Methods 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
- H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
- H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
- H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Formation Of Insulating Films (AREA)
Abstract
The invention provides an oxide film generation method, and belongs to the technical field of semiconductors. An oxide film forming method comprising: a placing step of placing the silicon wafer in a film forming cavity; a temperature-raising and constant-temperature step, namely introducing oxygen into the film-forming cavity, controlling the film-forming cavity to enter a temperature-raising stage for preset time, and then keeping the temperature at the constant-temperature stage for preset time; repeatedly executing the temperature rising and constant temperature steps at least twice until the target temperature is reached; and a cooling step, namely stopping introducing oxygen into the film forming cavity and controlling the film forming cavity to enter a cooling stage. The invention can grow a layer of uniform oxide film on the surface of the silicon wafer.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to an oxide film generation method.
Background
The minority carrier lifetime is a method for mainly evaluating the quality of a silicon wafer, and in order to obtain a more accurate minority carrier lifetime value, the surface of the silicon wafer needs to be pretreated (thermal oxygen passivation, charge passivation and surface passivation) to reduce the influence caused by surface recombination. The charge passivation is a pretreatment method which is widely applied, but a layer of uniform and compact ultrathin oxide film needs to be grown on the surface of a silicon wafer firstly, so that the silicon wafer can fix charges, and further, charge deposition is carried out and minority carrier lifetime is tested.
Disclosure of Invention
The invention aims to provide an oxide film generation method, which can grow a layer of uniform oxide film on the surface of a silicon wafer.
To solve the above technical problem, embodiments of the present invention provide the following technical solutions:
in one aspect, an embodiment of the present invention provides an oxide film forming method, including:
a placing step of placing the silicon wafer in a film forming cavity;
a temperature-raising and constant-temperature step, namely introducing oxygen into the film-forming cavity, controlling the film-forming cavity to enter a temperature-raising stage for preset time, and then keeping the temperature at the constant-temperature stage for preset time;
repeatedly executing the temperature rising and constant temperature steps at least twice until the target temperature is reached;
and a cooling step, namely stopping introducing oxygen into the film forming cavity and controlling the film forming cavity to enter a cooling stage.
In some embodiments, repeatedly performing the temperature raising and maintaining step at least twice comprises:
controlling the film forming cavity to enter a first temperature rise stage, wherein the temperature rise is 700-800 ℃, and the temperature rise rate is 40-70 ℃/min;
controlling the film forming cavity to enter a first constant temperature stage, and keeping the temperature unchanged;
controlling the film-forming cavity to enter a second temperature rise stage, wherein the temperature rise rate is 20-40 ℃/min, and the temperature rises to 850-;
and controlling the film forming cavity to enter a second constant temperature stage, wherein the temperature is kept unchanged.
In some embodiments, before placing the silicon wafer in the film forming chamber, the method further comprises:
and purging the film forming cavity by using nitrogen with the purity of not less than 99.999 percent.
In some embodiments, the nitrogen flow is from 5 to 10L/min and the purge time is from 2 to 10 min.
In some embodiments, the duration of the first constant temperature phase is 1-5 min.
In some embodiments, the duration of the second constant temperature phase is 3-10 min.
In some embodiments, the oxygen flow rate during the second constant temperature stage is 20-40L/min.
In some embodiments, in the first temperature-raising stage, the first constant-temperature stage, the second temperature-raising stage, and the second constant-temperature stage, nitrogen gas is introduced into the film-forming cavity, and the flow rate of the nitrogen gas is 5 to 10L/min.
In some embodiments, in the temperature reduction stage, nitrogen is introduced into the film forming cavity, and the flow rate of the nitrogen is 20-40L/min.
In some embodiments, the cooling rate during the cooling stage is 40-80 ℃/min.
The embodiment of the invention has the following beneficial effects:
in the scheme, the oxide film is formed on the surface of the silicon wafer by adopting a constant temperature method after multiple temperature rises, the scheme of the embodiment can accurately control the film thickness and the uniformity of the oxide film to form the oxide film with high uniformity, so that the charge deposition effect is uniformly distributed to achieve the optimal charge passivation effect, and further the accurate minority carrier lifetime is obtained; and the quality of the oxide film is controlled, and the repeatability of minority carrier lifetime testing is high.
Drawings
FIG. 1 is a schematic flow chart of a method for forming an oxide film according to an embodiment of the present invention;
FIG. 2 is a schematic diagram illustrating temperature variation during the oxide film formation process according to an embodiment of the present invention.
Detailed Description
In order to make the technical problems, technical solutions and advantages to be solved by the embodiments of the present invention clearer, the following detailed description will be given with reference to the accompanying drawings and specific embodiments.
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the drawings of the embodiments of the present invention. It is to be understood that the embodiments described are only a few embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the described embodiments of the invention, are within the scope of the invention.
The quality of the oxide film growth has great influence on the effect of charge deposition, and an ultrathin oxide film with moderate thickness needs to be grown, and the thickness is generally 2-15 nm. When the thickness of the oxide film is too thick, the charges cannot be passivated, and when the thickness of the oxide film is relatively thin, the charges easily break through the oxide film, so that the charges are lost, and the minority carrier lifetime cannot be accurately tested. In addition, the uniformity of the oxide film also affects the effect of fixing charges, and if the uniformity of the grown oxide film is poor, the charges are not uniformly deposited on the surface of the silicon wafer, and the quality of the silicon wafer cannot be evaluated according to the test result.
In the prior art, oxidation film formation is carried out on the surface of a silicon wafer in the environment of 400-500 ℃, and the thickness and uniformity of an oxide film cannot be guaranteed, so that a method for accurately controlling the thickness and uniformity of the oxide film is urgently needed to achieve the optimal charge passivation effect and further obtain the accurate minority carrier lifetime.
The embodiment of the invention provides an oxide film generation method, which can grow a layer of uniform oxide film on the surface of a silicon wafer.
An embodiment of the present invention provides an oxide film forming method, as shown in fig. 1, including:
a placing step 101, placing a silicon wafer in a film forming cavity;
a temperature-raising and constant-temperature step 102, wherein oxygen is introduced into the film-forming cavity, the film-forming cavity is controlled to enter a temperature-raising stage for preset time, and then the temperature is kept at a constant-temperature stage for preset time;
step 103: repeatedly executing the temperature rising and constant temperature steps at least twice until the target temperature is reached;
and a cooling step 104, stopping introducing oxygen into the film-forming cavity, and controlling the film-forming cavity to enter a cooling stage.
In the embodiment, the oxide film is formed on the surface of the silicon wafer by adopting a constant temperature method after heating for multiple times, the scheme of the embodiment can accurately control the film thickness and the uniformity of the oxide film to form the oxide film with high uniformity, so that the charge deposition effect is uniformly distributed to achieve the optimal charge passivation effect, and further the accurate minority carrier lifetime is obtained; and the quality of the oxide film is controlled, and the repeatability of minority carrier lifetime testing is high.
In this embodiment, the temperature raising and maintaining step may be performed twice, or may be performed three or more times.
Specifically, the step of repeatedly executing the temperature rise and the constant temperature at least twice comprises the following steps of:
controlling the film forming cavity to enter a first temperature rise stage, wherein the temperature rise is 700-800 ℃, and the temperature rise rate is 40-70 ℃/min;
controlling the film forming cavity to enter a first constant temperature stage, and keeping the temperature unchanged;
controlling the film-forming cavity to enter a second temperature rise stage, wherein the temperature rise rate is 20-40 ℃/min, and the temperature rises to 850-;
and controlling the film forming cavity to enter a second constant temperature stage, wherein the temperature is kept unchanged.
The film thickness and the uniformity of the oxide film can be accurately controlled by repeatedly carrying out the temperature rise and constant temperature steps twice, and the oxide film with high uniformity is formed on the surface of the silicon wafer, so that the charge deposition effect is uniformly distributed, the optimal charge passivation effect is achieved, and the accurate minority carrier lifetime is further obtained; and the quality of the oxide film is controlled, and the repeatability of minority carrier lifetime testing is high.
In a specific example, the oxide film forming method of the present embodiment includes the steps of:
step 1, firstly, purging the film-forming cavity by using nitrogen, wherein the nitrogen needs to use high-purity nitrogen, such as nitrogen with the purity of not less than 99.999%, so as to ensure the cleanliness of the film-forming cavity, the nitrogen flow can be 5-10L/min, and the purging time can be 2-10 min. Then, putting the silicon wafer into a film forming cavity;
step 2, as shown in fig. 2, entering a rapid temperature rise stage I (i.e., the first temperature rise stage), keeping the nitrogen flow constant during temperature rise, raising the temperature in the film forming cavity from room temperature to 700-800 ℃, and introducing oxygen into the film forming cavity, wherein the temperature rise rate can be 40-70 ℃/min, the temperature rise rate and the temperature can enable the surface of the silicon wafer to reach the temperature required by the growth of the oxide film, and can avoid the uneven growth of the oxide film in the temperature rise process, so that a very thin oxide layer uniformly grows on the surface of the silicon wafer, and the local high-temperature uneven growth of the oxide film is avoided;
step 3, entering a constant temperature I stage (namely the first constant temperature stage), wherein the flow of oxygen introduced into the film forming cavity can be 10-30L/min, and keeping the flow of nitrogen for 1-5min at the stage, so that the silicon wafer uniformly grows an oxide film;
step 4, entering a rapid heating-up stage II (namely the second heating-up stage), keeping the type and the flow of the gas introduced into the film-forming cavity unchanged, wherein the heating-up rate can be 20-40 ℃/min, and the temperature is raised to 850-;
and 5, entering a constant temperature II stage (namely the second constant temperature stage), increasing the oxygen flow to 20-40L/min, and keeping for 3-10min, preferably 10 min. Compared with the first constant temperature stage, the temperature of the stage is higher, the oxygen flow is larger, and the rapid growth of an oxide film is facilitated;
and 6, entering a rapid cooling stage, closing oxygen, stopping introducing oxygen into the film forming cavity, avoiding uneven oxidation caused by unnecessary oxidation again, increasing the nitrogen flow to 20-40L/min, and starting circulating cooling water to rapidly cool the temperature of the film forming cavity to room temperature and improve the testing efficiency, wherein the cooling rate can be 40-80 ℃/min.
And then, transferring the silicon wafer with the oxide film growing on the surface from the film forming cavity to a test unit for carrying out charge deposition and minority carrier lifetime test.
In this embodiment, the thickness of the oxide film grown on the surface of the silicon wafer may be 3-7nm, and preferably, the thickness of the oxide film is 5 ± 0.5 nm; in this embodiment, the temperature raising and maintaining step is performed twice, and the number of times of performing the temperature raising and maintaining step may be adjusted according to the thickness of the oxide film. Compared with the common charge deposition method, the method can improve the minority carrier lifetime by 30-50%.
While the foregoing is directed to the preferred embodiment of the present invention, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (10)
1. A method for forming an oxide film, comprising:
a placing step of placing the silicon wafer in a film forming cavity;
a temperature-raising and constant-temperature step, namely introducing oxygen into the film-forming cavity, controlling the film-forming cavity to enter a temperature-raising stage for preset time, and then keeping the temperature at the constant-temperature stage for preset time;
repeatedly executing the temperature rising and constant temperature steps at least twice until the target temperature is reached;
and a cooling step, namely stopping introducing oxygen into the film forming cavity and controlling the film forming cavity to enter a cooling stage.
2. The oxide film generation method according to claim 1, wherein repeatedly performing the temperature-raising and temperature-maintaining step at least twice comprises:
controlling the film forming cavity to enter a first temperature rise stage, wherein the temperature rise is 700-800 ℃, and the temperature rise rate is 40-70 ℃/min;
controlling the film forming cavity to enter a first constant temperature stage, and keeping the temperature unchanged;
controlling the film-forming cavity to enter a second temperature rise stage, wherein the temperature rise rate is 20-40 ℃/min, and the temperature rises to 850-;
and controlling the film forming cavity to enter a second constant temperature stage, wherein the temperature is kept unchanged.
3. The oxide film forming method according to claim 1, wherein a silicon wafer is placed in the film forming chamber, and the method further comprises:
and purging the film forming cavity by using nitrogen with the purity of not less than 99.999 percent.
4. The method for forming an oxide film according to claim 3, wherein a flow rate of nitrogen gas is 5 to 10L/min, and a purge time is 2 to 10 min.
5. The oxide film forming method according to claim 2, wherein the first constant temperature stage is performed for 1 to 5 min.
6. The oxide film forming method according to claim 2, wherein the duration of the second constant temperature stage is 3 to 10 min.
7. The method for forming an oxide film according to claim 2, wherein in the second constant temperature stage, the flow rate of oxygen is 20 to 40L/min.
8. The method according to claim 2, wherein nitrogen gas is introduced into the film forming chamber in the first temperature raising stage, the first constant temperature stage, the second temperature raising stage, and the second constant temperature stage, and a flow rate of the nitrogen gas is 5 to 10L/min.
9. The method for forming an oxide film according to claim 1, wherein in the temperature reduction stage, nitrogen gas is introduced into the film forming chamber at a flow rate of 20 to 40L/min.
10. The method for forming an oxide film according to claim 1, wherein in the temperature reduction stage, the temperature reduction rate is 40 to 80 ℃/min.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202110703379.2A CN113436961A (en) | 2021-06-24 | 2021-06-24 | Method for forming oxide film |
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| CN202110703379.2A CN113436961A (en) | 2021-06-24 | 2021-06-24 | Method for forming oxide film |
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Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0353530A (en) * | 1989-07-21 | 1991-03-07 | Sony Corp | Manufacture of semiconductor device |
| JPH07193060A (en) * | 1993-12-27 | 1995-07-28 | Nippon Precision Circuits Kk | Manufacture of oxide layer in semiconductor device |
| JPH08255905A (en) * | 1995-03-17 | 1996-10-01 | Nec Corp | Fabrication of semiconductor device |
| JP2004214305A (en) * | 2002-12-27 | 2004-07-29 | Toshiba Corp | Semiconductor device and manufacturing method thereof |
| US6797323B1 (en) * | 1996-11-29 | 2004-09-28 | Sony Corporation | Method of forming silicon oxide layer |
| US20070037348A1 (en) * | 2005-08-09 | 2007-02-15 | Samsung Electronics Co., Ltd. | Method of fabricating trench isolation of semiconductor device |
| KR100687410B1 (en) * | 2005-12-28 | 2007-02-26 | 동부일렉트로닉스 주식회사 | Method of forming the gate oxide in semiconductor device |
| CN108766887A (en) * | 2018-05-25 | 2018-11-06 | 中国科学院微电子研究所 | The manufacturing method of groove MOSFET element based on two step microwave plasma oxidations |
| CN112904173A (en) * | 2021-01-28 | 2021-06-04 | 西安奕斯伟硅片技术有限公司 | Method and equipment for testing minority carrier lifetime of silicon wafer |
-
2021
- 2021-06-24 CN CN202110703379.2A patent/CN113436961A/en active Pending
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0353530A (en) * | 1989-07-21 | 1991-03-07 | Sony Corp | Manufacture of semiconductor device |
| JPH07193060A (en) * | 1993-12-27 | 1995-07-28 | Nippon Precision Circuits Kk | Manufacture of oxide layer in semiconductor device |
| JPH08255905A (en) * | 1995-03-17 | 1996-10-01 | Nec Corp | Fabrication of semiconductor device |
| US6797323B1 (en) * | 1996-11-29 | 2004-09-28 | Sony Corporation | Method of forming silicon oxide layer |
| JP2004214305A (en) * | 2002-12-27 | 2004-07-29 | Toshiba Corp | Semiconductor device and manufacturing method thereof |
| US20070037348A1 (en) * | 2005-08-09 | 2007-02-15 | Samsung Electronics Co., Ltd. | Method of fabricating trench isolation of semiconductor device |
| KR100687410B1 (en) * | 2005-12-28 | 2007-02-26 | 동부일렉트로닉스 주식회사 | Method of forming the gate oxide in semiconductor device |
| CN108766887A (en) * | 2018-05-25 | 2018-11-06 | 中国科学院微电子研究所 | The manufacturing method of groove MOSFET element based on two step microwave plasma oxidations |
| CN112904173A (en) * | 2021-01-28 | 2021-06-04 | 西安奕斯伟硅片技术有限公司 | Method and equipment for testing minority carrier lifetime of silicon wafer |
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Address after: 710000 room 1-3-029, No. 1888, Xifeng South Road, high tech Zone, Xi'an, Shaanxi Province Applicant after: Xi'an Yisiwei Material Technology Co.,Ltd. Applicant after: XI'AN ESWIN SILICON WAFER TECHNOLOGY Co.,Ltd. Address before: 710000 room 1-3-029, No. 1888, Xifeng South Road, high tech Zone, Xi'an, Shaanxi Province Applicant before: Xi'an yisiwei Material Technology Co.,Ltd. Applicant before: XI'AN ESWIN SILICON WAFER TECHNOLOGY Co.,Ltd. |