CN113433615A

CN113433615A - Chip

Info

Publication number: CN113433615A
Application number: CN202110540846.4A
Authority: CN
Inventors: 杨妍; 孙富君; 唐波; 张鹏; 欧祥鹏; 刘若男; 李彬; 谢玲; 李志华
Original assignee: Institute of Microelectronics of CAS
Current assignee: Institute of Microelectronics of CAS
Priority date: 2021-05-18
Filing date: 2021-05-18
Publication date: 2021-09-24
Anticipated expiration: 2041-05-18
Also published as: CN113433615B

Abstract

The invention discloses a chip, relates to the technical field of chips, and aims to realize diffraction on addressing lasers with different wavelengths under the same emergent angle through a grating coupler and improve large-scale expandability of the chip. The chip includes: the ion trap comprises a substrate and a surface ion trap electrode arranged on the surface of the substrate; the surface ion trap electrode is used for trapping ions in a preset area above the substrate; wherein the substrate has a plurality of grating couplers; the grating part included in the grating coupler is used for diffracting addressing laser with multiple different wavelengths to the same ion at the same emergent angle so as to complete addressing.

Description

Chip

Technical Field

The invention relates to the technical field of chips, in particular to a chip.

Background

The surface ion trap chip for the qubit is a chip which can trap ions in a preset region through a surface ion trap electrode and diffract addressing laser with corresponding wavelength to corresponding ions through a plurality of grating couplers respectively so as to complete addressing.

However, the large-scale scalability of the existing qubit surface ion trap chip is low.

Disclosure of Invention

The invention aims to provide a chip which is used for realizing diffraction of addressing laser with different wavelengths under the same emergent angle through a grating coupler and improving the large-scale expandability of the chip.

In order to achieve the above object, the present invention provides a chip comprising: the ion trap comprises a substrate and a surface ion trap electrode arranged on the surface of the substrate; the surface ion trap electrode is used for trapping ions in a preset area above the substrate; wherein the content of the first and second substances,

the substrate has a plurality of grating couplers; the grating part included in the grating coupler is used for diffracting addressing laser with multiple different wavelengths to the same ion at the same emergent angle so as to complete addressing.

Compared with the prior art, in the chip provided by the invention, the surface ion trap electrode is arranged on the surface of the substrate. When the surface ion trap electrode is energized, the surface ion trap electrode can trap ions and trap the ions in a preset area above the substrate. And the substrate is provided with a plurality of grating couplers, and the grating parts included in the grating couplers can diffract the addressing lasers with different wavelengths to the same ion position at the same emergent angle so as to complete addressing, so that the problem that the large-scale expandability of the chip is reduced because the addressing lasers with corresponding wavelengths can be diffracted to the same ion position by arranging a plurality of grating couplers in the conventional chip can be solved, and the integration level of the chip is improved.

Drawings

The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the invention and not to limit the invention. In the drawings:

FIG. 1 is a schematic diagram of a partial structure of a conventional qubit surface ion trap chip;

FIG. 2 is a schematic cross-sectional view of a conventional qubit surface ion trap chip;

fig. 3 is a schematic structural diagram of a grating coupler according to an embodiment of the present invention;

fig. 4 is a schematic structural diagram of a first two-dimensional sub-wavelength structure and a waveguide portion according to an embodiment of the present invention;

FIG. 5 is a schematic diagram of a second two-dimensional subwavelength structure and a waveguide section provided by an embodiment of the invention;

FIG. 6 is a schematic cross-sectional view of a chip according to an embodiment of the present invention;

fig. 7 is a light path diagram of the grating portion diffracting the addressing laser in the embodiment of the present invention.

Reference numerals: 1 is a substrate, 11 is a grating coupler, 111 is a grating part, 1111 is a two-dimensional sub-wavelength structure, 1112 is a first two-dimensional sub-wavelength structure, 1113 is a second two-dimensional sub-wavelength structure, 112 is a waveguide part, 12 is a photodetector, 13 is a substrate, 14 is a light-transmitting structure, 2 is a surface ion trap electrode, 21 is a light-transmitting window, 3 is ions, 4 is an optical waveguide, 5 is addressing laser, and 6 is fluorescence.

Detailed Description

Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. It should be understood that the description is illustrative only and is not intended to limit the scope of the present disclosure. Moreover, in the following description, descriptions of well-known structures and techniques are omitted so as to not unnecessarily obscure the concepts of the present disclosure.

Various structural schematics according to embodiments of the present disclosure are shown in the figures. The figures are not drawn to scale, wherein certain details are exaggerated and possibly omitted for clarity of presentation. The shapes of various regions, layers, and relative sizes and positional relationships therebetween shown in the drawings are merely exemplary, and deviations may occur in practice due to manufacturing tolerances or technical limitations, and a person skilled in the art may additionally design regions/layers having different shapes, sizes, relative positions, as actually required.

In the context of the present disclosure, when a layer/element is referred to as being "on" another layer/element, it can be directly on the other layer/element or intervening layers/elements may be present. In addition, if a layer/element is "on" another layer/element in one orientation, then that layer/element may be "under" the other layer/element when the orientation is reversed. In order to make the technical problems, technical solutions and advantageous effects to be solved by the present invention more clearly apparent, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise. The meaning of "a number" is one or more unless specifically limited otherwise.

In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.

However, the existing surface ion trap chip for qubits generally needs to be provided with a plurality of grating couplers, and the plurality of grating couplers need to be arranged at different positions to address corresponding ions. As shown in fig. 1 and fig. 2, taking the trapped ions 3 as calcium ions as an example, to complete the addressing operation on the calcium ions, three corresponding grating couplers 11 need to be arranged for the same calcium ions, and the three grating couplers 11 need to be arranged at corresponding orientations. After the addressing laser 5 with the wavelengths of 729nm, 854nm and 866nm is respectively guided into the three grating couplers through different optical waveguides 4, the three grating couplers 11 are respectively used for diffracting the addressing laser 5 with the corresponding wavelength to the same calcium ion at the corresponding exit angle to complete addressing, and the calcium ion is subjected to light excitation to generate energy level transition and radiate fluorescence 6. Detection of the qubit information is accomplished when the fluorescent light 6 is detected by the photodetector 12. (Note that the surface ion trap electrode is not shown in FIG. 1 for clarity of the positional relationship between the grating coupler 11, the photodetector 12, and the trapped ion 3.)

It is conceivable that, under the condition that the integration degree of the qubit surface ion trap chip is higher and higher, more grating couplers need to be arranged inside the chip, so that the large-scale scalability of the qubit surface ion trap chip is limited.

In order to solve the above technical problem, an embodiment of the present invention provides a chip. In the chip provided by the embodiment of the invention, the grating parts included in the grating coupler can diffract addressing lasers with various wavelengths to the same ion position at the same emergent angle so as to complete addressing, so that the number of the grating couplers can be reduced, and the large-scale expandability of the chip is improved.

As shown in fig. 3 to 7, an embodiment of the present invention provides a chip. The chip includes: a substrate 1, and a surface ion trap electrode 2 disposed on a surface of the substrate 1. The surface ion trap electrode 2 serves to trap ions 3 in a predetermined region above the substrate 1. Wherein the substrate 1 has a plurality of grating couplers 11. The grating coupler 11 includes a grating portion 111 for diffracting the addressing laser 5 with different wavelengths to the same ion 3 at the same exit angle θ to complete addressing.

It will be appreciated that a surface ion trap electrode is a structure that, when energized, traps ions within a certain range. Specifically, the specific structure of the surface ion trap electrode in the embodiment of the present invention may be set according to actual requirements. Illustratively, the surface ion trap electrode may generally comprise two radio frequency control electrode portions and three direct current control electrode portions. The electrode portions of the same type are not adjacent to each other, and at the same time, five electrode portions are arranged in parallel and at intervals. In addition, when the area of the surface ion trap electrode is fixed, if the influence of the sizes of the direct current control electrode parts on the Z-axis trapping potential is not considered, the smaller the proportion of the space between the radio frequency control electrode part and the adjacent direct current control electrode part to the total width is, the deeper the depth of the potential well is, and based on the depth, the working parameters and the like of the surface ion trap electrode on the surface of the substrate can be set according to the requirements of the depth of the potential well of the surface ion trap electrode, the position of trapped ions and the like in an actual application scene. The material of the surface ion trap electrode may be chromium, niobium, aluminum, silver, gold, or the like. Furthermore, the position and specification of the predetermined area above the substrate can be set according to actual requirements, and are not specifically limited herein.

As for the above-described base, the base may have a substrate formed with some structures in addition to having a plurality of grating couplers. For example: as shown in fig. 6, the base 1 may further have a substrate 13, and a light-transmitting structure 14 disposed on the substrate 13. The grating coupler 11 is located within the light-transmissive structure 14. The surface ion trap electrode 2 is disposed on the surface of the light-transmitting structure 14. The region of the surface ion trap electrode 2 opposite to the grating 111 is opened with a light-transmitting window 21. In this case, the presence of the light-transmissive structure 14 described above facilitates setting the relative position between the grating coupler 11 and the surface ion trap electrode 2. Moreover, in the working process of the chip, the existence of the light-transmitting structure 14 can also facilitate the introduction of the addressing laser 5 into the corresponding grating coupler 11 included in the chip through a device such as an end-face coupler, and the introduced addressing laser 5 is diffracted to the corresponding ions 3 through the light-transmitting structure 14 and the light-transmitting window 21 in sequence through the grating coupler 11, so that the optical loss of the addressing laser 5 in the conducting process is reduced.

Specifically, the grating coupler may be made of silicon, silicon nitride, or the like. The substrate may be a semiconductor substrate such as a silicon-based substrate or a germanium-based substrate. The light-transmitting structure can comprise a plurality of light-transmitting layers so as to manufacture devices such as a grating coupler, a surface ion trap electrode and the like. Each light-transmitting layer may be formed of a film layer having a light-transmitting property, such as a silicon dioxide layer having a corresponding thickness. The thickness of each light-transmitting layer can be set according to actual requirements, and is not particularly limited here. In addition, the surface ion trap electrode may be formed on or in the light-transmitting structure. When the surface ion trap electrode is located in the light-transmitting structure, the top of the surface ion trap electrode can be flush with the top of the light-transmitting structure so as to trap ions in a preset region above the substrate.

In practical application, after the surface ion trap electrode is powered on, the surface ion trap electrode can trap ions and trap the ions in a preset area above the substrate. As shown in fig. 7, after the addressing laser beams 5 with different wavelengths are introduced into the corresponding grating couplers by using devices such as end-face couplers, the grating portions 111 included in the corresponding grating couplers can diffract the addressing laser beams 5 with different wavelengths to the same ion 3 at the same emission angle, thereby completing addressing. The wavelength and the number of the addressing laser diffracted to the ions by the grating part are different due to different types of the trapped ions. For example: when the trapped ions are calcium ions, three grating couplers are needed for respectively diffracting the addressing laser with the wavelengths of 729nm, 854nm and 866nm to the same calcium ion position at corresponding emergent angles so as to complete addressing. Another example is: when the trapped ions are barium ions, three grating couplers are needed for respectively diffracting addressing laser with the wavelengths of 1762nm, 614nm and 650nm to the same barium ion at corresponding emergent angles so as to complete addressing.

It can be seen from the above that, the chip provided in the embodiment of the present invention can implement diffraction of addressing lasers with different wavelengths at the same exit angle through one grating coupler, so that the problem of a large-scale scalability of the chip being reduced due to the fact that the existing chip needs to be provided with a plurality of grating couplers to diffract addressing lasers with corresponding wavelengths to the same ion respectively can be solved, and the integration level of the chip is improved.

In one example, as shown in fig. 3 to 5, each grating portion 111 includes at least a two-dimensional sub-wavelength structure 1111. The outer contours of at least two-dimensional sub-wavelength structures 1111 included in the same grating portion 111 overlap. The two-dimensional sub-wavelength structures 1111 included in the same grating portion 111 are used for diffracting the addressing laser with the corresponding wavelength to the same ion at the same emission angle.

It should be understood that the coincidence of the outer contours of the at least two-dimensional subwavelength structures described above means: the shapes, sizes and thicknesses of the outer contours of at least two-dimensional sub-wavelength structures included in the same grating part are consistent. For example: as shown in fig. 7, the grating portion 111 includes two-dimensional subwavelength structures, and the outer contours of the two-dimensional subwavelength structures are both rectangular parallelepipeds. The two cuboids are equal in length, width and height. In addition, each two-dimensional sub-wavelength structure is designed according to the Bragg phase matching condition, and can only diffract addressing laser with corresponding wavelength at a corresponding emergent angle. As described above, the wavelength and the number of the addressing laser beams diffracted by the grating section to the ions are different depending on the kind of the trapped ions. Based on this, the number of the two-dimensional sub-wavelength structures included in the grating portion corresponding to the corresponding kind of ions can be determined according to the kind of the trapped ions and the wavelength range of the laser which can be diffracted and addressed by each two-dimensional sub-wavelength structure.

Illustratively, as shown in fig. 3 to 5 and fig. 7, when the ions are calcium ions, the grating portion 111 may have a first two-dimensional sub-wavelength structure 1112 and a second two-dimensional sub-wavelength structure 1113. The first two-dimensional sub-wavelength structure 1112 is used to diffract addressing laser light with a wavelength of 729nm to the calcium ions. The second two-dimensional sub-wavelength structure 1113 is used to diffract addressing laser light having a wavelength of 854nm and a wavelength of 866nm to the calcium ions opposite to the first two-dimensional sub-wavelength structure 1112. It will be appreciated that the difference in wavelength between an addressing laser having a wavelength of 854nm and an addressing laser having a wavelength of 866nm is 12 nm. Moreover, the general two-dimensional sub-wavelength structure 1111 has a bandwidth of 3dB that can reach at least 40nm, so the second two-dimensional sub-wavelength structure 1113 can diffract the addressing laser with a wavelength of 854nm and a wavelength of 866nm, that is, although the grating portion 111 needs to diffract the addressing laser with three wavelengths, the grating portion 111 may only have two-dimensional sub-wavelength structures 1111 whose outer contours are overlapped, so that the design difficulty of the grating portion 111 can be reduced, and the structure of the grating coupler 11 is simpler.

In addition, the working parameters such as duty ratios of the at least two-dimensional sub-wavelength structures included in the grating portion can be set according to actual requirements. Exemplarily, the duty ratios of at least two-dimensional sub-wavelength structures included in the same grating portion respectively satisfy bragg phase matching conditions under corresponding wavelengths and emission angles. It should be understood that, the above-mentioned at least two-dimensional sub-wavelength structures respectively satisfying the bragg matching conditions under the corresponding wavelength and the corresponding exit angle means: when the at least two-dimensional sub-wavelength structures are independently arranged, the Bragg phase matching conditions under corresponding wavelengths and emergent angles are respectively met, so that different two-dimensional sub-wavelength structures included by the grating part are ensured to be used for diffracting addressing laser with corresponding wavelengths to the same ion position at the same emergent angle, and the working reliability of the grating coupler is improved.

For example: as described above, when the ions are calcium ions and the grating portion has the first two-dimensional sub-wavelength structure and the second two-dimensional sub-wavelength structure, the first two-dimensional sub-wavelength structure separately disposed satisfies the wavelength of 729nm and the exit angle of θ₁The bragg phase matching condition of (1). The second sub-wavelength structure which is independently arranged meets the requirements of 854nm wavelength, 866nm wavelength and theta emergent angle₁The bragg phase matching condition of (1). At the same time, when the first two-dimensional subwavelength structure and the firstThe outer contours of the two-dimensional sub-wavelength structures are superposed to form a grating part and then can still respectively form the emergent angles theta₁The addressing laser light of the corresponding wavelength is diffracted.

In one example, as shown in fig. 3 to 5, the grating coupler 11 may further include a waveguide portion 112, and the waveguide portion 112 is coupled to the grating portion 111. The light-exiting surface of the waveguide portion 112 is opposite to the light-entering surface of the grating portion 111. On this basis, the presence of the waveguide portion 112 facilitates the introduction of the addressing laser light into the corresponding grating portion 111. Specifically, the waveguide 112 may be any waveguide capable of coupling the addressing laser into the grating 111, such as a tapered waveguide and a tapered coupling waveguide. When the waveguide portion 112 is a tapered coupling waveguide portion, the width of the tapered coupling waveguide portion gradually increases along the transmission direction of the addressing laser light. The sizes of the wide-mouth end, the narrow-mouth end and the length of the gradually-changing coupling waveguide part can be set according to the period of at least two-dimensional sub-wavelength structures 1111 included in the grating part 111 and the actual application scene, and are not specifically limited here.

It is noted that there is a certain coupling loss of the addressing laser from the waveguide portion to the grating portion. Under the same coupling loss, compared with the tapered waveguide part, the length of the tapered coupling waveguide part can be reduced by one magnitude, so that the miniaturization of the grating coupler is facilitated, and the large-scale expandability of the chip is further improved.

In one example, the substrate further comprises photodetectors (not shown), each for detecting fluorescence emitted by a corresponding ion. The photoelectric detector is a silicon single-photon avalanche detector or a silicon-based germanium single-photon avalanche detector. In this case, when the chip is in operation, the grating coupler diffracts a plurality of different addressing lasers at the same ion position at the same exit angle, and the ion is excited by light to generate energy level transition and emit fluorescence. The photoelectric detector arranged opposite to the ions can detect the fluorescence emitted by the ions, and the detection of the quantum bit information is completed.

Specifically, the number of the photodetectors may be set according to the number of the grating couplers and the actual requirement. The structure of the photoelectric detector can be set according to actual requirements. For example: the photodetector may include an absorption layer, a charge layer, and a multiplication layer. The charge layer is located between the absorption layer and the multiplication layer.

In one example, as mentioned above, in the case that the base further has the substrate and the light-transmitting structure, the base may further have a contact structure (not shown in the figure) formed at least in the substrate and the light-transmitting structure, so as to interconnect the corresponding structure (photodetector) in the base with an external circuit. The contact structure may be made of conductive materials such as copper, nickel, gold, etc.

In the above description, the technical details of patterning, etching, and the like of each layer are not described in detail. It will be appreciated by those skilled in the art that layers, regions, etc. of the desired shape may be formed by various technical means. In addition, in order to form the same structure, those skilled in the art can also design a method which is not exactly the same as the method described above. In addition, although the embodiments are described separately above, this does not mean that the measures in the embodiments cannot be used in advantageous combination.

The embodiments of the present disclosure have been described above. However, these examples are for illustrative purposes only and are not intended to limit the scope of the present disclosure. The scope of the disclosure is defined by the appended claims and equivalents thereof. Various alternatives and modifications can be devised by those skilled in the art without departing from the scope of the present disclosure, and such alternatives and modifications are intended to be within the scope of the present disclosure.

Claims

1. A chip, comprising: the ion trap comprises a substrate and a surface ion trap electrode arranged on the surface of the substrate; the surface ion trap electrode is used for trapping ions in a preset region above the substrate; wherein the content of the first and second substances,

2. The chip of claim 1, wherein each of the grating portions comprises at least two-dimensional sub-wavelength structures; the outer contours of at least two-dimensional sub-wavelength structures included in the same grating part are overlapped; the two-dimensional sub-wavelength structures of the same grating portion are different from each other, and are used for diffracting the addressing laser with the corresponding wavelength to the same ion position at the same emergent angle.

3. The chip according to claim 2, wherein duty ratios of the two-dimensional sub-wavelength structures included in the same grating portion respectively satisfy bragg phase matching conditions at corresponding wavelengths and emission angles.

4. The chip of claim 2, wherein the ions are calcium ions;

the grating part is provided with a first two-dimensional sub-wavelength structure and a second two-dimensional sub-wavelength structure; the first two-dimensional sub-wavelength structure is used for diffracting addressing laser with the wavelength of 729nm to the calcium ions; the second two-dimensional sub-wavelength structure is used for diffracting addressing laser with the wavelength of 854nm and the wavelength of 866nm to the position of the calcium ions opposite to the first two-dimensional sub-wavelength structure.

5. The chip of claim 1, wherein the grating coupler further comprises a waveguide portion; the waveguide portion is coupled with the grating portion.

6. The chip of claim 5, wherein the waveguide is a tapered coupling waveguide, and a width of the tapered coupling waveguide gradually increases along a transmission direction of the addressing laser.

7. The chip of claim 1, wherein the substrate further comprises photodetectors, each photodetector being configured to detect fluorescence emitted by a corresponding ion; wherein the content of the first and second substances,

the photoelectric detector is a silicon single-photon avalanche detector or a silicon-based germanium single-photon avalanche detector.

8. The chip of any one of claims 1 to 7, wherein the base further comprises a substrate and a light-transmitting structure disposed on the substrate; the grating coupler is positioned in the light-transmitting structure; the surface ion trap electrode is arranged on the surface of the light-transmitting structure, and a light-transmitting window is formed in the area, opposite to the grating part, of the surface ion trap electrode.

9. The chip of claim 8, wherein the surface ion trap electrode is located within the light-transmissive structure, and a top of the surface ion trap electrode is flush with a top of the light-transmissive structure.

10. The chip of claim 8, wherein the substrate is a silicon-based substrate; and/or the light-transmitting structure comprises a multi-layer light-transmitting layer; each light-transmitting layer is a silicon dioxide layer with corresponding thickness.