CN113418602A - Optical power meter circuit and optical power meter - Google Patents
Optical power meter circuit and optical power meter Download PDFInfo
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- CN113418602A CN113418602A CN202110969750.XA CN202110969750A CN113418602A CN 113418602 A CN113418602 A CN 113418602A CN 202110969750 A CN202110969750 A CN 202110969750A CN 113418602 A CN113418602 A CN 113418602A
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- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
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Abstract
The invention provides an optical power meter circuit and an optical power meter, wherein the optical power meter circuit comprises a signal receiving module, a control module and a USB interface; the input end of the signal receiving module is connected with the optical fiber, the output end of the signal receiving module is connected with the input end of the control module, the output end of the control module is connected with the USB interface, and the USB interface is also connected with an external terminal; wherein: the signal receiving module receives an optical signal input by the optical fiber and outputs a detection signal to the control module according to the optical signal; the control module detects the signal, calculates the optical power value according to the detection signal, and sends the calculated optical power value to the external terminal through the USB interface. Through setting up the USB interface for can send the optical power value that obtains to external terminal through the USB interface and show, when having widened application scene, can reduce and show relevant part, thereby reduce the inside device quantity of optical power meter, reduce the volume of optical power meter, reduce the cost of optical power meter.
Description
Technical Field
The present invention relates to signal detection, and in particular, to an optical power meter circuit, an optical power meter method, and an optical power meter.
Background
An optical power meter is needed in the occasions of testing the application of an optical channel and the occasions of producing optical devices and optical modules; the existing optical power meter is mostly handheld or desk-top, and reads optical power data through a display screen arranged on the optical power meter, however, the existing optical power meter is not convenient to carry due to large volume, and the use scene of the optical power meter is limited.
Disclosure of Invention
The invention mainly aims to provide an optical power meter circuit, an optical power meter method and an optical power meter, and aims to solve the problems that in the prior art, an optical power meter is large in size and inconvenient to carry.
In order to achieve the above object, the present invention provides an optical power meter circuit, which includes a signal receiving module, a control module and a USB interface; the input end of the signal receiving module is connected with an optical fiber, the output end of the signal receiving module is connected with the input end of the control module, the output end of the control module is connected with the USB interface, and the USB interface is also connected with an external terminal; wherein:
the signal receiving module is used for receiving the optical signal input by the optical fiber and outputting a detection signal to the control module according to the optical signal;
and the control module is used for receiving the detection signal sent by the signal receiving module, calculating an optical power value according to the detection signal, and sending the calculated optical power value to the external terminal through a USB interface.
Optionally, the signal receiving module includes a signal receiving interface, a current amplifying unit, and a voltage following unit; the signal receiving interface is connected between the optical fiber and the current amplifying unit, the output end of the current amplifying unit is connected with the input end of the voltage following unit, and the output end of the voltage following unit is connected with the input end of the control module; wherein:
the signal receiving interface is used for receiving the optical signal input by the optical fiber and sending a current signal generated according to the received optical signal to the current amplifying unit;
the current amplifying unit is used for receiving the current signal sent by the signal receiving interface, generating a voltage signal corresponding to the amplified current signal after amplifying the current signal, and sending the voltage signal to the voltage following unit;
the voltage following unit is used for receiving the voltage signal sent by the current amplifying unit, generating a detection signal corresponding to the voltage signal and sending the detection signal to the control module.
Optionally, the current amplifying unit includes a logarithmic amplifier chip, a voltage amplifying subunit, a filtering subunit, a first capacitor, a second capacitor, a third capacitor, a first resistor, and a second resistor; wherein:
the input end of the logarithmic amplification chip is connected with the output anode of the signal receiving interface, the input end of the logarithmic amplification chip is also connected with the filtering subunit, and the bias control end of the logarithmic amplification chip is connected with the output cathode of the signal receiving interface;
the power input end of the logarithmic amplification chip is connected with the power end of the USB interface, and the power input end of the logarithmic amplification chip is grounded through the first capacitor;
the power supply output end of the logarithmic amplification chip is connected with the logarithmic end of the logarithmic amplification chip through the first resistor, the logarithmic end of the logarithmic amplification chip is grounded through the second capacitor, and the logarithmic end of the logarithmic amplification chip is connected with the non-inverting input end of the buffer amplifier of the logarithmic amplification chip through the second resistor;
the voltage amplification subunit is connected between the inverting input end of the buffer amplifier of the logarithmic amplification chip and the output end of the logarithmic amplification chip; the output end of the logarithmic amplification chip is connected with the input end of the voltage following unit, and the protection end of the logarithmic amplification chip is grounded through the third capacitor.
Optionally, the voltage amplification subunit includes a third resistor and a fourth resistor; wherein:
the first end of the third resistor is connected with the inverting input end of the logarithmic amplification chip, and the first section of the third resistor is grounded through the fourth resistor; and the second end of the third resistor is connected with the output end of the logarithmic amplification chip.
Optionally, the filtering subunit includes a fourth capacitor and a fifth resistor; wherein:
the first end of the fourth capacitor is connected with the input end of the logarithmic amplification chip, and the second end of the fourth capacitor is grounded through the fifth resistor.
Optionally, the voltage following unit includes a voltage following chip, a fifth capacitor, a sixth resistor, a seventh resistor, and an eighth resistor; wherein:
the non-inverting input end of the voltage following chip is connected with the output end of the current amplifying unit through the sixth resistor, the non-inverting input end of the voltage following chip is further connected with the output end of the voltage following chip through the seventh resistor, the output end of the voltage following chip is connected with the inverting input end of the voltage following chip through the eighth resistor, the output end of the voltage following chip is further connected with the input end of the control module, and the output end of the voltage following chip is further grounded through the fifth capacitor; the positive power end of the voltage following chip is connected with the power end of the USB interface, and the negative power end of the voltage following chip is grounded; the cut-off end of the voltage following chip is connected with the power end of the USB interface; the turn-off end of the voltage following chip is grounded through the sixth capacitor.
Optionally, the control module includes a main control chip, an indication unit, a burning unit, a transient diode chip, a seventh capacitor, and an eighth capacitor; wherein:
the input end of the main control chip is connected with the output end of the signal receiving module; the data positive end of the main control chip is connected with the data positive end of the USB interface, the data negative end of the main control chip is connected with the data negative end of the USB interface, the power supply end of the main control chip is connected with the power supply end of the USB interface, the sensing input end of the main control chip is connected with the input voltage regulating end of the main control chip, the data positive end of the main control chip, the data negative end of the main control chip and the power supply end of the main control chip are respectively connected with one negative electrode of the transient diode chip, and the common end of the transient diode chip is grounded;
the reference voltage end of the main control chip is grounded through the seventh capacitor, the direct current output end of the main control chip is grounded through the eighth capacitor, the direct current output end of the main control chip is also connected with the power supply end of the indicating unit, and the indicating end of the main control chip is connected with the control end of the indicating unit; and the burning end of the main control chip is connected with the burning unit.
Optionally, the indication unit includes a light emitting diode and a ninth resistor; wherein:
the anode of the light emitting diode is used as a power supply end of the indicating unit, and the cathode of the light emitting diode is connected with the indicating end of the main control chip through the ninth resistor.
Optionally, the burning unit includes a burning interface, a ninth capacitor, a tenth resistor, and an eleventh resistor; wherein:
the first data end of the burning interface is connected with the first burning end of the main control chip, the first data end of the burning interface is also connected with the first end of the eleventh resistor through the ninth capacitor and the tenth resistor respectively, and the second end of the eleventh resistor is connected with the direct current output end of the main control chip;
and the second data end of the burning interface is connected with the second burning end of the main control chip.
In addition, in order to achieve the above object, the present invention further provides an optical power meter, which includes a housing and an optical power meter circuit, wherein the optical power meter circuit is disposed in the housing; the optical power meter circuit is configured as an optical power meter circuit as described above.
The invention provides an optical power meter circuit, an optical power meter method and an optical power meter, wherein the optical power meter circuit comprises a signal receiving module, a control module and a USB interface; the input end of the signal receiving module is connected with an optical fiber, the output end of the signal receiving module is connected with the input end of the control module, the output end of the control module is connected with the USB interface, and the USB interface is also connected with an external terminal; wherein: the signal receiving module is used for receiving the optical signal input by the optical fiber and outputting a detection signal to the control module according to the optical signal; and the control module is used for receiving the detection signal sent by the signal receiving module, calculating an optical power value according to the detection signal, and sending the calculated optical power value to the external terminal through a USB interface. Through setting up the USB interface for can send the optical power value that obtains to external terminal through the USB interface and show, when having widened application scene, can reduce and show relevant part, thereby reduce the inside device quantity of optical power meter, reduce the volume of optical power meter, reduce the cost of optical power meter, simultaneously, because the optical power meter volume reduces, consequently can make portable optical power meter, the user of being convenient for carries.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.
FIG. 1 is a functional block diagram of an optical power meter circuit according to an embodiment of the present invention;
FIG. 2 is a circuit diagram of a current amplifying unit in the optical power meter circuit according to the present invention;
FIG. 3 is a circuit diagram of a voltage follower unit in the optical power meter circuit of the present invention;
fig. 4 is a circuit diagram of a control module in the optical power meter circuit according to the present invention.
The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Reference numerals indicate the same.
Reference numerals | Name (R) | Reference numerals | Name (R) |
100 | Signal receiving module | R1~R11 | First to |
111 | Voltage amplification subunit | C1~C9 | First to |
112 | Filtering subunit | U1 | |
200 | Control module | U2 | |
210 | Indicating unit | U3 | |
220 | Burning unit | E1 | |
300 | USB interface | PD1 | Signal receiving interface |
J1 | Burning interface |
Detailed Description
It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that all directional indicators (such as up, down, left, right, front, and back) in the embodiments of the present invention are only used to explain the relative position relationship between the components, the motion situation, and the like in a specific posture (as shown in the drawings), and if the specific posture is changed, the directional indicator is changed accordingly.
In addition, the descriptions related to "first", "second", etc. in the present invention are for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, technical solutions between various embodiments may be combined with each other, but must be realized by a person skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination should not be considered to exist, and is not within the protection scope of the present invention.
The invention provides an optical power meter circuit, which is applied to an optical power meter, please refer to fig. 1, and fig. 1 is a functional block diagram of an embodiment of the optical power meter circuit of the invention. In this embodiment, the optical power meter circuit includes a signal receiving module 100, a control module 200, and a USB interface 300; the input end of the signal receiving module 100 is connected with an optical fiber, the output end of the signal receiving module 100 is connected with the input end of the control module 200, the output end of the control module 200 is connected with the USB interface 300, and the USB interface 300 is further connected with an external terminal; wherein:
the signal receiving module 100 is configured to receive an optical signal input by the optical fiber, and output a detection signal to the control module 200 according to the optical signal;
the control module 200 is configured to receive the detection signal sent by the signal receiving module 100, calculate an optical power value according to the detection signal, and send the calculated optical power value to the external terminal through the USB interface 300.
The control module 200 obtains information of an input optical signal of the optical fiber, i.e., a detection signal, through the signal receiving module 100, calculates a corresponding optical power value according to the detection signal, outputs the optical power value through the USB interface 300, and simultaneously supplies power from an external device through the USB interface 300 without a built-in power supply.
In the embodiment, by setting the USB interface 300, the obtained optical power value can be sent to an external terminal through the USB interface 300 for display, so that application scenarios are widened, and meanwhile, display-related components can be reduced, thereby reducing the number of internal devices of the optical power meter, reducing the volume of the optical power meter, and reducing the cost of the optical power meter.
Further, the signal receiving module 100 includes a signal receiving interface PD1, a current amplifying unit, and a voltage following unit; the signal receiving interface PD1 is connected between the optical fiber and the current amplifying unit, an output end of the current amplifying unit is connected with an input end of the voltage following unit, and an output end of the voltage following unit is connected with an input end of the control module 200; wherein:
the signal receiving interface PD1 is configured to receive an optical signal input by the optical fiber, and send a current signal generated according to the received optical signal to the current amplifying unit;
the current amplifying unit is used for receiving the current signal sent by the signal receiving interface PD1, amplifying the current signal, generating a voltage signal corresponding to the amplified current signal, and sending the voltage signal to the voltage following unit;
the voltage following unit is configured to receive the voltage signal sent by the current amplifying unit, generate a detection signal corresponding to the voltage signal, and send the detection signal to the control module 200.
The signal receiving interface in this embodiment is a PD (Photodetector); the PD outputs a corresponding current signal according to the received optical signal; because the current signal output by the PD is small, the current amplifying unit is arranged to amplify the current signal output by the PD, so that the current after the amplification operation can be processed by a subsequent device. The voltage follower circuit can function as impedance matching, so that a stable output voltage can be obtained.
Further, referring to fig. 2, the current amplifying unit includes a logarithmic amplifying chip U1, a voltage amplifying subunit 111, a filtering subunit 112, a first capacitor C1, a second capacitor C2, a third capacitor C3, a first resistor R1, and a second resistor R2; wherein:
the input end of the logarithmic amplification chip U1 is connected with the positive output electrode of the signal receiving interface PD1, the input end of the logarithmic amplification chip U1 is also connected with the filtering subunit 112, and the bias control end of the logarithmic amplification chip U1 is connected with the negative output electrode of the signal receiving interface PD 1;
further, the filtering subunit 112 includes a fourth capacitor C4 and a fifth resistor R5; wherein:
the first end of the fourth capacitor C4 is connected to the input end of the log amplifier chip U1, and the second end of the fourth capacitor C4 is grounded through the fifth resistor R5.
The power supply input end of the logarithmic amplification chip U1 is connected with the power supply end of the USB interface 300, and the power supply input end of the logarithmic amplification chip U1 is also grounded through the first capacitor C1;
the power supply output end of the logarithmic amplification chip U1 is connected with the logarithmic end of the logarithmic amplification chip U1 through the first resistor R1, the logarithmic end of the logarithmic amplification chip U1 is also grounded through the second capacitor C2, and the logarithmic end of the logarithmic amplification chip U1 is also connected with the non-inverting input end of the buffer amplifier of the logarithmic amplification chip U1 through the second resistor R2;
the voltage amplification subunit 111 is connected between the inverting input end of the buffer amplifier of the logarithmic amplification chip U1 and the output end of the logarithmic amplification chip U1; the output end of the logarithmic amplification chip U1 is connected with the input end of the voltage following unit, and the protection end of the logarithmic amplification chip U1 is grounded through the third capacitor C3.
In the embodiment, a logarithmic amplification chip U1 with the model number of ADL5303 is adopted; it should be noted that the specific type of the logarithmic amplification chip U1 can be selected according to the actual application scenario and the need.
The signal receiving interface PD1 outputs a positive output current signal value to the digital amplification chip U1, and when the adaptive bias control is needed, the negative output electrode of the signal receiving interface PD1 is connected with the bias control end of the digital amplification chip U1. The filtering subunit 112 is configured to perform a filtering operation on the current signal output by the signal receiving interface PD1 to remove external noise.
The logarithmic amplifier chip U1 is powered by the USB interface 300, and the first capacitor C1 is used for filtering the voltage input by the USB interface 300.
The power supply output end of the logarithmic amplification chip U1 and the logarithmic end of the logarithmic amplification chip U1 output voltage to the non-inverting input end of the buffer amplifier of the logarithmic amplification chip U1, and the second capacitor C2 is a filter capacitor.
The voltage amplifying subunit 111 is used for setting the amplifying parameters of the logarithmic amplifying chip U1.
The current output by the signal receiving interface PD1 is amplified by the logarithmic amplification chip U1 and then output to the voltage following unit.
Further, the voltage amplifying subunit 111 includes a third resistor R3 and a fourth resistor R4; wherein:
the first end of the third resistor R3 is connected with the inverting input end of the logarithmic amplification chip U1, and the first section of the third resistor R3 is also grounded through the fourth resistor R4; the second end of the third resistor R3 is connected with the output end of the logarithmic amplification chip U1.
The output voltage of the log amplifier chip U1 may be controlled by setting the ratio of the third resistor R3 to the fourth resistor R4. Specifically, the output voltage of the log amplifier chip U1 is the ratio of the third resistor R3 to the fourth resistor R4 plus 1 times the log voltage of the log amplifier chip U1.
Further, referring to fig. 3, the voltage follower unit includes a voltage follower chip U2, a fifth capacitor C5, a sixth capacitor C6, a sixth resistor R6, a seventh resistor R7, and an eighth resistor R8; wherein:
the non-inverting input end of the voltage follower chip U2 is connected to the output end of the current amplifying unit through the sixth resistor R6, the non-inverting input end of the voltage follower chip U2 is further connected to the output end of the voltage follower chip U2 through the seventh resistor R7, the output end of the voltage follower chip U2 is connected to the inverting input end of the voltage follower chip U2 through the eighth resistor R8, the output end of the voltage follower chip U2 is further connected to the input end of the control module 200, and the output end of the voltage follower chip U2 is further grounded through the fifth capacitor C5; the positive power end of the voltage following chip U2 is connected with the power end of the USB interface 300, and the negative power end of the voltage following chip U2 is grounded; the cut-off end of the voltage following chip U2 is connected with the power end of the USB interface 300; the turn-off terminal of the voltage follower chip U2 is also grounded through the sixth capacitor C6.
In this embodiment, a voltage follower chip U2 with a model of MAX4231AXT + T is adopted, and it should be noted that the specific model of the voltage follower chip U2 may be selected according to an actual application scenario and needs.
The voltage follower chip U2 is powered by the USB interface 300, and the sixth capacitor C6 is used for filtering the voltage input by the USB interface 300. The fifth capacitor C5 is used for filtering the voltage output by the voltage follower chip U2; the turn-off end of the voltage following chip U2 is used for controlling the working state of the voltage following chip U2, when the turn-off end of the voltage following chip U2 is at a high level, the voltage following chip U2 works normally, and when the turn-off end of the voltage following chip U2 is at a low level, the voltage following chip U2 is turned off and does not work.
The voltage output by the current amplifying unit is amplified by the voltage follower chip U2 and then output to the control module 200.
Further, referring to fig. 4, the control module 200 includes a main control chip U3, an indication unit 210, a burning unit 220, a transient diode chip E1, a seventh capacitor C7, and an eighth capacitor C8; wherein:
the input end of the main control chip U3 is connected with the output end of the signal receiving module 100; the data positive terminal of the main control chip U3 is connected with the data positive terminal of the USB interface 300, the data negative terminal of the main control chip U3 is connected with the data negative terminal of the USB interface 300, the power supply terminal of the main control chip U3 is connected with the power supply terminal of the USB interface 300, the sensing input terminal of the main control chip U3 is connected with the input voltage regulating terminal of the main control chip U3, the data positive terminal of the main control chip U3, the data negative terminal of the main control chip U3 and the power supply terminal of the main control chip U3 are also connected with one negative electrode of the transient diode chip E1, and the common terminal of the transient diode chip E1 is grounded;
the reference voltage end of the main control chip U3 is grounded through the seventh capacitor C7, the dc output end of the main control chip U3 is grounded through the eighth capacitor C8, the dc output end of the main control chip U3 is further connected to the power supply end of the indication unit 210, and the indication end of the main control chip U3 is connected to the control end of the indication unit 210; the burning end of the main control chip U3 is connected to the burning unit 220.
In this embodiment, a main control chip U3 with a model number of C8051F380 is adopted, and it should be noted that a specific model number of the main control chip U3 may be selected according to an actual application scenario and needs.
The main control chip U3 supplies power through the USB interface 300, and the main control chip U3 outputs a voltage to the indicating unit 210 and the burning unit 220 after the power supply of the USB interface 300 is reduced. The eighth capacitor C8 is used for filtering the voltage outputted to the indicating unit 210 and the programming unit 220.
The main control chip U3 receives the detection signal sent by the signal receiving module 100, and calculates the optical power value through the internal lookup table according to the detection signal; the main control chip U3 outputs a light power value through the positive data terminal and the negative data terminal.
The transient diode is used for changing the high impedance between two poles into low impedance when being impacted by reverse transient high energy, absorbing surge power, and enabling a voltage clamp between the two poles to be at a preset value, thereby effectively protecting precise components in an electronic circuit from being damaged by various surge pulses.
The indicating unit 210 is used for indicating the working state of the main control chip U3. The burning unit 220 is used for burning programs to the main control chip U3.
Further, the indication unit 210 includes a light emitting diode and a ninth resistor R9; wherein:
the anode of the light emitting diode is used as the power supply end of the indicating unit 210, and the cathode of the light emitting diode is connected with the indicating end of the main control chip U3 through the ninth resistor R9.
The light emitting diode is used for indicating the working state of the main control chip U3, and specifically, when the main control chip U3 works, a low level signal is sent to the light emitting diode, and the light emitting diode is turned on; when the main control chip U3 stops working, a high level signal value light emitting diode is sent, and the light emitting diode is turned off.
Further, the burning unit 220 includes a burning interface J1, a ninth capacitor C9, a tenth resistor R10, and an eleventh resistor R11; wherein:
a first data end of the burning interface J1 is connected to a first burning end of the main control chip U3, a first data end of the burning interface J1 is further connected to a first end of the eleventh resistor R11 through the ninth capacitor C9 and the tenth resistor R10, respectively, and a second end of the eleventh resistor R11 is connected to a dc output end of the main control chip U3;
the second data end of the burning interface J1 is connected with the second burning end of the main control chip U3.
The ninth capacitor C9 is used for filtering operation. The tenth resistor R10 and the eleventh resistor R11 are pull-up resistors, and when a low level signal is input to the first data end of the programming interface J1, the first programming end of the main control chip U3 receives the low level signal; when the first data terminal of the programming interface J1 does not input a low level signal, the first programming terminal of the main control chip U3 receives a high level signal.
The embodiment can reasonably realize the function of the optical power meter.
It should be noted that, in the above embodiments, only the pins necessary for connection in the digital amplification chip U1, the voltage follower chip U2, and the main control chip U3 for the purpose of the present application are labeled and described, and it can be understood that, according to different models of specifically adopted chips, the chips may include pins that are not connected, and meanwhile, conventional function expansion may be performed through the pins that are not connected according to actual needs.
The invention also provides an optical power meter, which includes a housing and an optical power meter circuit, where the optical power meter circuit is disposed in the housing, and the structure of the optical power meter circuit may refer to the above embodiments, and is not described herein again. It should be understood that, since the optical power meter of this embodiment adopts the technical solution of the optical power meter circuit, the optical power meter has all the beneficial effects of the optical power meter circuit.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or system. The term "comprising", without further limitation, means that the element so defined is not excluded from the group of processes, methods, articles, or systems that include the element. The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.
The above description is only a preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes, which are made by using the contents of the present specification and the accompanying drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (10)
1. An optical power meter circuit is characterized by comprising a signal receiving module, a control module and a USB interface; the input end of the signal receiving module is connected with an optical fiber, the output end of the signal receiving module is connected with the input end of the control module, the output end of the control module is connected with the USB interface, and the USB interface is also connected with an external terminal; wherein:
the signal receiving module is used for receiving the optical signal input by the optical fiber and outputting a detection signal to the control module according to the optical signal;
and the control module is used for receiving the detection signal sent by the signal receiving module, calculating an optical power value according to the detection signal, and sending the calculated optical power value to the external terminal through a USB interface.
2. The optical power meter circuit of claim 1, wherein the signal receiving module comprises a signal receiving interface, a current amplifying unit, and a voltage following unit; the signal receiving interface is connected between the optical fiber and the current amplifying unit, the output end of the current amplifying unit is connected with the input end of the voltage following unit, and the output end of the voltage following unit is connected with the input end of the control module; wherein:
the signal receiving interface is used for receiving the optical signal input by the optical fiber and sending a current signal generated according to the received optical signal to the current amplifying unit;
the current amplifying unit is used for receiving the current signal sent by the signal receiving interface, generating a voltage signal corresponding to the amplified current signal after amplifying the current signal, and sending the voltage signal to the voltage following unit;
the voltage following unit is used for receiving the voltage signal sent by the current amplifying unit, generating a detection signal corresponding to the voltage signal and sending the detection signal to the control module.
3. The optical power meter circuit of claim 2, wherein the current amplification unit comprises a logarithmic amplification chip, a voltage amplification subunit, a filtering subunit, a first capacitor, a second capacitor, a third capacitor, a first resistor, and a second resistor; wherein:
the input end of the logarithmic amplification chip is connected with the output anode of the signal receiving interface, the input end of the logarithmic amplification chip is also connected with the filtering subunit, and the bias control end of the logarithmic amplification chip is connected with the output cathode of the signal receiving interface;
the power input end of the logarithmic amplification chip is connected with the power end of the USB interface, and the power input end of the logarithmic amplification chip is grounded through the first capacitor;
the power supply output end of the logarithmic amplification chip is connected with the logarithmic end of the logarithmic amplification chip through the first resistor, the logarithmic end of the logarithmic amplification chip is grounded through the second capacitor, and the logarithmic end of the logarithmic amplification chip is connected with the non-inverting input end of the buffer amplifier of the logarithmic amplification chip through the second resistor;
the voltage amplification subunit is connected between the inverting input end of the buffer amplifier of the logarithmic amplification chip and the output end of the logarithmic amplification chip; the output end of the logarithmic amplification chip is connected with the input end of the voltage following unit, and the protection end of the logarithmic amplification chip is grounded through the third capacitor.
4. The optical power meter circuit of claim 3, wherein the voltage amplification subunit comprises a third resistor and a fourth resistor; wherein:
the first end of the third resistor is connected with the inverting input end of the logarithmic amplification chip, and the first section of the third resistor is grounded through the fourth resistor; and the second end of the third resistor is connected with the output end of the logarithmic amplification chip.
5. The optical power meter circuit of claim 3, wherein the filtering subunit comprises a fourth capacitor and a fifth resistor; wherein:
the first end of the fourth capacitor is connected with the input end of the logarithmic amplification chip, and the second end of the fourth capacitor is grounded through the fifth resistor.
6. The optical power meter circuit of claim 2, wherein the voltage follower unit comprises a voltage follower chip, a fifth capacitor, a sixth resistor, a seventh resistor, and an eighth resistor; wherein:
the non-inverting input end of the voltage following chip is connected with the output end of the current amplifying unit through the sixth resistor, the non-inverting input end of the voltage following chip is further connected with the output end of the voltage following chip through the seventh resistor, the output end of the voltage following chip is connected with the inverting input end of the voltage following chip through the eighth resistor, the output end of the voltage following chip is further connected with the input end of the control module, and the output end of the voltage following chip is further grounded through the fifth capacitor; the positive power end of the voltage following chip is connected with the power end of the USB interface, and the negative power end of the voltage following chip is grounded; the cut-off end of the voltage following chip is connected with the power end of the USB interface; the turn-off end of the voltage following chip is grounded through the sixth capacitor.
7. The optical power meter circuit of claim 1, wherein the control module comprises a main control chip, an indication unit, a burning unit, a transient diode chip, a seventh capacitor, and an eighth capacitor; wherein:
the input end of the main control chip is connected with the output end of the signal receiving module; the data positive end of the main control chip is connected with the data positive end of the USB interface, the data negative end of the main control chip is connected with the data negative end of the USB interface, the power supply end of the main control chip is connected with the power supply end of the USB interface, the sensing input end of the main control chip is connected with the input voltage regulating end of the main control chip, the data positive end of the main control chip, the data negative end of the main control chip and the power supply end of the main control chip are respectively connected with one negative electrode of the transient diode chip, and the common end of the transient diode chip is grounded;
the reference voltage end of the main control chip is grounded through the seventh capacitor, the direct current output end of the main control chip is grounded through the eighth capacitor, the direct current output end of the main control chip is also connected with the power supply end of the indicating unit, and the indicating end of the main control chip is connected with the control end of the indicating unit; and the burning end of the main control chip is connected with the burning unit.
8. The optical power meter circuit of claim 7, wherein the indication unit comprises a light emitting diode and a ninth resistor; wherein:
the anode of the light emitting diode is used as a power supply end of the indicating unit, and the cathode of the light emitting diode is connected with the indicating end of the main control chip through the ninth resistor.
9. The optical power meter circuit of claim 7, wherein the burning unit comprises a burning interface, a ninth capacitor, a tenth resistor, and an eleventh resistor; wherein:
the first data end of the burning interface is connected with the first burning end of the main control chip, the first data end of the burning interface is also connected with the first end of the eleventh resistor through the ninth capacitor and the tenth resistor respectively, and the second end of the eleventh resistor is connected with the direct current output end of the main control chip;
and the second data end of the burning interface is connected with the second burning end of the main control chip.
10. An optical power meter, characterized in that the optical power meter comprises a housing and an optical power meter circuit, the optical power meter circuit being disposed within the housing; the optical power meter circuit is configured as an optical power meter circuit as claimed in any one of claims 1-9.
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