CN113410274A

CN113410274A - Display substrate, preparation method thereof and display device

Info

Publication number: CN113410274A
Application number: CN202110666401.0A
Authority: CN
Inventors: 吴欣慰; 张伟; 徐燕燕; 李存智; 史大为; 郭钟旭
Original assignee: BOE Technology Group Co Ltd; Chongqing BOE Display Technology Co Ltd
Current assignee: BOE Technology Group Co Ltd; Chongqing BOE Display Technology Co Ltd
Priority date: 2021-06-16
Filing date: 2021-06-16
Publication date: 2021-09-17

Abstract

The disclosure provides a display substrate, a preparation method thereof and a display device. The display substrate includes: a substrate; the display panel comprises a first insulating layer and a second insulating layer which are positioned on one side of a substrate, wherein a groove structure positioned in a non-display area is formed on one side of the second insulating layer, which is far away from the substrate, and the groove structure extends along a first direction which is parallel to the corresponding edge of the display area; the metal wire is positioned in the non-display area and on one side of the second insulating layer, which is far away from the substrate, extends along a second direction, is lapped on the surface of the groove structure, and the second direction is a direction vertical to the first direction; the flat layer is positioned in the display area; a plurality of organic light emitting diodes located in the display region and on the planarization layer. According to the technical scheme, the path length of the metal wire from the non-display area to the display area can be prolonged, the path length of water and oxygen is increased, the risk that the OLED is corroded by the water and oxygen is reduced, the poor GDS (diffusion glass substrate) of the display substrate is avoided, and the product reliability is improved.

Description

Display substrate, preparation method thereof and display device

Technical Field

The disclosure relates to the technical field of display, and in particular relates to a display substrate, a preparation method thereof and a display device.

Background

Organic Light-Emitting diodes (OLEDs) are active Light-Emitting display devices that have been developed in recent years, and particularly in the display industry, OLED displays have the advantages of self-luminescence, wide viewing angle, high contrast, low power consumption, very high response speed, thinness, flexibility, and low cost. For active OLEDs, OLED devices are particularly sensitive to water and oxygen, and package failure has become a significant problem in the OLED industry, particularly after flexible packaging replaces rigid packaging.

In the reliability process or after a long-term standing of the OLED display substrate, the display substrate may generate a poor small black Spot (GDS), which affects the reliability of the display substrate.

Disclosure of Invention

The embodiment of the disclosure provides a display substrate, a preparation method thereof and a display device, so as to solve or alleviate one or more technical problems in the prior art.

As a first aspect of the embodiments of the present disclosure, embodiments of the present disclosure provide a display substrate including a display region and a non-display region, the substrate including:

a substrate;

the display device comprises an active layer, a first insulating layer, a gate electrode and a second insulating layer, wherein the active layer and the gate electrode are positioned in a display area;

the source electrode and the drain electrode are positioned on one side of the second insulating layer, which is far away from the substrate, and are positioned in the display area, and the source electrode and the drain electrode are both connected with the active layer;

the metal wire is positioned in the non-display area and on one side of the second insulating layer, which is far away from the substrate, extends along a second direction, is lapped on the surface of the groove structure, and the second direction is a direction vertical to the first direction;

the flat layer is positioned in the display area and positioned on one side of the source electrode and the drain electrode, which is far away from the substrate;

and the organic light emitting diodes are positioned in the display area and on one side of the flat layer, which is far away from the substrate, and the organic light emitting diodes are connected with the corresponding source electrodes or drain electrodes.

In some possible implementations, the groove structure includes a plurality of grooves arranged side by side, the plurality of grooves are sequentially arranged along the second direction, and the metal wire is overlapped on the surfaces of the plurality of grooves.

In some possible implementations, the plurality of grooves includes at least one first groove and at least one second groove, the depth of the first groove being greater than the depth of the second groove.

In some possible implementations, the at least one first groove and the at least one second groove are alternately spaced.

In some possible implementations, the depth of the first recess ranges from 9000 angstroms to 11000 angstroms.

In some possible implementations, the second recess has a depth ranging from 4000 to 6000 angstroms.

In some possible implementations, the pitch between two adjacent grooves ranges from 5 μm to 10 μm.

In some possible implementations, the metal lines include a first metal line and a second metal line insulated from each other, the first metal line and the second metal line both extend in the second direction, the groove structure includes a first section of groove structure and a second section of groove structure, the first metal line overlaps on a surface of the first section of groove structure, and the second metal line overlaps on a surface of the second section of groove structure.

In some possible implementations, the first metal line is a first power line, and the second metal line is a second power line.

In some possible implementations, the metal line is located at the same layer as the source and drain electrodes.

As a second aspect of the embodiments of the present disclosure, embodiments of the present disclosure provide a method of manufacturing a display substrate, including:

forming an active layer, a first insulating layer, a gate electrode and a second insulating layer on one side of a substrate, the active layer and the gate electrode being positioned in a display region, the first insulating layer and the second insulating layer being positioned in the display region and a non-display region;

forming a groove structure positioned in the non-display area on one side of the second insulating layer, which is far away from the substrate, wherein the groove structure extends along a first direction, and the first direction is parallel to the corresponding edge of the display area;

forming a source electrode, a drain electrode and a metal wire on one side of the second insulating layer, which is far away from the substrate, wherein the source electrode and the drain electrode are positioned in the display area, the source electrode and the drain electrode are both connected with the active layer, the metal wire is positioned in the non-display area, the metal wire extends along a second direction, the metal wire is lapped on the surface of the groove structure, and the second direction is a direction vertical to the first direction;

forming a flat layer on one side of the source electrode and the drain electrode, which is far away from the substrate, wherein the flat layer is positioned in the display area;

and forming a plurality of organic light emitting diodes positioned in the display area on one side of the flat layer, which is far away from the substrate, wherein the organic light emitting diodes are connected with the corresponding source electrodes or drain electrodes.

In some possible implementations, forming a groove structure in the non-display area on a side of the second insulating layer facing away from the substrate includes:

forming at least one first groove on one side of the second insulating layer, which is far away from the substrate, by adopting a primary patterning process, wherein the first groove extends along a first direction;

forming at least one second groove on one side of the second insulating layer, which is far away from the substrate, by adopting another patterning process, wherein the second groove extends along the first direction, and the depth of the second groove is smaller than that of the first groove;

the groove structure includes at least one first groove and at least one second groove, and the at least one first groove and the at least one second groove are arranged along the second direction.

As a fourth aspect of the embodiments of the present disclosure, embodiments of the present disclosure provide a display device including any one of the display substrates in the embodiments of the present disclosure.

In the display substrate in the embodiment of the disclosure, the metal line is in a curved broken line shape on a cross section perpendicular to the display substrate and along the second direction Y, so that a path length of the metal line from the non-display area to the display area is extended, and the path length of the metal line from the non-display area to the display area is longer. Therefore, even if the metal wire is corroded laterally to form a water-oxygen path in the process of forming the anode of the organic light-emitting diode, the path length of the metal wire from the non-display area to the display area is prolonged, so that the water-oxygen path length is increased, the risk that the OLED in the display area is corroded by water and oxygen can be reduced, the poor GDS of the display substrate is avoided, and the product reliability is improved.

The foregoing summary is provided for the purpose of description only and is not intended to be limiting in any way. In addition to the illustrative aspects, embodiments, and features described above, further aspects, embodiments, and features of the present disclosure will be readily apparent by reference to the drawings and following detailed description.

Drawings

In the drawings, like reference numerals refer to the same or similar parts or elements throughout the several views unless otherwise specified. The figures are not necessarily to scale. It is appreciated that these drawings depict only some embodiments in accordance with the disclosure and are not to be considered limiting of its scope.

FIG. 1 is a schematic plan view of a display substrate;

FIG. 2 is an enlarged schematic view of portion B of FIG. 1;

FIG. 3 illustrates a display area of a display substrate and a schematic cross-sectional view C-C in FIG. 2;

FIG. 4 is an enlarged schematic view of a portion B of the display substrate shown in FIG. 1 in an embodiment of the disclosure;

FIG. 5 shows a display area of a display substrate and a schematic cross-sectional view C-C in FIG. 4;

FIG. 6 is a schematic cross-sectional view of a display substrate after a second insulating layer is formed thereon according to an embodiment of the present disclosure;

FIG. 7 is a schematic cross-sectional view illustrating a substrate with a first groove formed therein according to an embodiment of the present disclosure;

FIG. 8 is a schematic cross-sectional view illustrating a second groove formed in a substrate according to an embodiment of the present disclosure;

FIG. 9 is a cross-sectional view of a display substrate after a pixel definition layer is formed thereon according to an embodiment of the disclosure.

Description of reference numerals:

10. a display area; 20. a non-display area; 30. driving the structural layer; 31. a substrate; 321. an active layer; 322. a gate electrode; 323a, a source electrode; 323b, a drain electrode; 33. a metal wire; 331. a first metal line; 332. a second metal line; 34. a planarization layer; 36. a pixel defining layer; 51. a first insulating layer; 52. a second insulating layer; 53. a buffer layer; 60. a groove structure; 601. a first section of groove structure; 602. a second section of groove structure; 61. a first groove; 62. a second groove; 70. an organic light emitting diode; 71. a first electrode; 72. an organic light emitting layer; 73. a second electrode; 81. a first via hole; 82. a second via.

Detailed Description

In the following, only certain exemplary embodiments are briefly described. As those skilled in the art can appreciate, the described embodiments can be modified in various different ways, without departing from the spirit or scope of the present disclosure. Accordingly, the drawings and description are to be regarded as illustrative in nature, and not as restrictive.

Fig. 1 is a schematic plan view of a display substrate, fig. 2 is an enlarged schematic view of a portion B of fig. 1, and fig. 3 shows a display region of the display substrate and a schematic cross-sectional view of C-C of fig. 2. As shown in fig. 1, 2 and 3, the display substrate includes a display area 10 and a non-display area 20 located at one side of the display area 10. A direction parallel to the edge of the display area 10 may be defined as a first direction X, and a direction perpendicular to the first direction X may be defined as a second direction Y. For the OLED display substrate without the passivation layer PVX, in the display region, the display substrate may include a driving structure layer 30 located on one side of the substrate 31, a planarization layer 34 located on one side of the driving structure layer 30 facing away from the substrate 31, and an organic light emitting diode 70 located on one side of the planarization layer 34 facing away from the substrate 31. The driving structure layer may include an active layer, a first insulating layer 51, a gate electrode, and a second insulating layer 52, and a source electrode and a drain electrode on a side of the second insulating layer 52 facing away from the substrate 31, both of which are connected to the active layer. In the non-display region 20, the display substrate includes a base 31, a first insulating layer 51 and a second insulating layer 52 on a side of the base 31, and a first power line VDD and a second power line VSS on a side of the second insulating layer 52 away from the base 31. The display substrate further includes a buffer layer 53, the buffer layer 53 being positioned between the first insulating layer 51 and the substrate 31, the buffer layer 53 being positioned in the display region 10 and the non-display region 20.

Illustratively, the first power line VDD and the second power line VSS may be at the same layer as the source electrode and the drain electrode of the thin film transistor. In the process of manufacturing the display substrate, after the source electrode and the drain electrode of the thin film transistor are formed in the display region, the planarization layer 34 needs to be formed on the side of the source electrode and the drain electrode away from the substrate, and the planarization layer is located in the display region 10. The planarization films in the non-display area 20 are etched away, so that the planarization layer 34 is not present in the non-display area 20, and the first power line VDD and the second power line VSS in the non-display area are exposed.

In the display area, the display substrate further includes an OLED70 on a side of the planarization layer 34 facing away from the substrate 31, the OLED70 may include a first electrode 71, an organic light-emitting layer 72, and a second electrode 73, the first electrode 71 may be an anode, and the second electrode 73 may be a cathode. The first electrode 71 is located on the planarization layer 34. The process of forming the first electrode 71 may include: forming a first electrode film on the source electrode, the drain electrode, the first power line VDD, and the second power line VSS on a side away from the substrate 31; the first electrode film is etched by a wet etching process to form a first electrode 71 in the display region. In this process, the first electrode film of the non-display region needs to be etched away using a wet etching process. Since the first electrode film in the non-display area is disposed on the upper surfaces of the first power line VDD and the second power line VSS, the first power line VDD and/or the second power line VSS may be etched sideways during the wet etching process. In forming the pixel defining layer 36, it is necessary to remove the pixel defining layer material of the non-display region, but the pixel defining layer material remains at the position where the first power line VDD and/or the second power line VSS are etched. The residual pixel defining layer material easily absorbs water and oxygen to form a water and oxygen channel, so that the display substrate has poor GDS at a fixed position on the Pad (Pad) side (i.e., the signal input positions of the first power line VDD and the second power line VSS), thereby causing the reliability package failure of the display substrate.

In the related art, in order to prevent the first power line VDD and/or the second power line VSS from being undercut, a passivation layer PVX may be added on a side of the first power line VDD and the second power line VSS away from the substrate 31, and the first power line VDD and the second power line VSS are protected by the passivation layer PVX to prevent the undercut, but a mask needs to be added, so that the cost is increased, and the yield is reduced. Illustratively, the first power line VDD and the second power line VSS may be provided in a deformed shape, such as a zigzag shape, an edge saw shape, etc., so as to extend a water oxygen path, but this way affects a packaging effect, which may cause an inorganic packaging layer Crack (Crack) in a packaging structure layer. For example, a planarization layer may be left in the non-display region, and a groove may be formed on the planarization layer to cut off a water and oxygen path of the organic material.

Fig. 4 is an enlarged schematic view of a portion B of the display substrate shown in fig. 1 in an embodiment of the present disclosure, and fig. 5 shows a display region of the display substrate and a schematic cross-sectional view C-C in fig. 4. In one embodiment, as shown in fig. 1, the display substrate may include a display region 10 and a non-display region 20, and the non-display region 20 is located at one side of the display region 10. The display substrate includes a base 31, a thin film transistor 32, a metal line 33, a planarization layer 34, and a plurality of organic light emitting diodes 70. The thin film transistor 32 includes an active layer 321, a gate electrode 322, a source electrode 323a, and a drain electrode 323 b. The display substrate further includes a first insulating layer (which may also be referred to as a gate insulating layer) 51 and a second insulating layer (which may also be referred to as an interlayer insulating layer) 52.

As shown in fig. 5, the active layer 321, the first insulating layer 51, the gate electrode 322, and the second insulating layer 52 are located at one side (upper side in fig. 5) of the substrate 31, the active layer 321 and the gate electrode 322 are located at the display region 10, and the first insulating layer 51 and the second insulating layer 52 are located at the display region 10 and the non-display region 20. The second insulating layer 52 is located on a side of the first insulating layer 51 away from the substrate 31, a groove structure 60 located in the non-display area 20 is formed on a side of the second insulating layer 52 away from the substrate 31, and the groove structure 60 can extend along a first direction X, where the first direction X is a direction parallel to a corresponding edge of the display area 10. Illustratively, as shown in fig. 3, the non-display area 20 is located at a lower side of the display area, and then, the first direction X is a direction parallel to a lower edge of the display area 10. It is understood that when the non-display area 20 is positioned at the right side of the display area, the first direction may be a direction parallel to the right edge of the display area 10.

As shown in fig. 4 and 5, the source electrode 323a and the drain electrode 323b are located on a side of the second insulating layer 52 facing away from the substrate 31, the source electrode 323a and the drain electrode 323b are located in the display region, and both the source electrode 323a and the drain electrode 323b are connected to the active layer 321. The metal line 33 is located in the non-display area 20 and on a side of the second insulating layer 52 facing away from the substrate 31, the metal line 33 extends along the second direction Y, and the metal line 33 overlaps the surface of the groove structure 60. The second direction Y is a direction perpendicular to the first direction X. The planarization layer 34 is located in the display region 10 and on the sides of the source electrode 323a and the drain electrode 323b facing away from the substrate 31. The organic light emitting diodes 70 are located in the display region and on a side of the planarization layer 34 away from the substrate 31, and the organic light emitting diodes 70 are connected to the source electrode 323a or the drain electrode 323b of the corresponding thin film transistor.

In the technical solutions shown in fig. 1 and fig. 2, in the non-display area 20, the upper surface of the second insulating layer 52 is a flat surface, and the paths of the first power line VDD and the second power line VSS formed on the upper surface of the second insulating layer 52 from the non-display area 20 to the display area 10 are short, so that the reliability package of the display substrate is easily failed due to the short water and oxygen channels formed by the lateral etching.

In the display substrate in the embodiment of the disclosure, the side of the second insulating layer 52 away from the base 31 is provided with the groove structure 60 located in the non-display area 20, the groove structure 60 can extend along the first direction X, the metal line 33 is located in the non-display area 20 and located on the side of the second insulating layer 52 away from the base 31, the metal line 33 extends along the second direction Y, and the metal line 33 is overlapped on the surface of the groove structure 60. With such a structure, the metal line 33 is bent and folded in a cross section perpendicular to the display substrate and along the second direction Y, and the path length of the metal line 33 from the non-display area 20 to the display area 10 is extended, so that the path length of the metal line 33 from the non-display area 20 to the display area 10 is longer. Therefore, even if the metal line 33 is etched laterally to form a water and oxygen path in the process of forming the anode of the organic light emitting diode 70, the path length of the metal line 33 from the non-display area 20 to the display area 10 is increased, so that the water and oxygen path length is increased, the risk of corrosion of the OLED in the display area by water and oxygen can be reduced, the occurrence of poor GDS on the display substrate can be avoided, and the product reliability can be improved.

The thin film transistor shown in fig. 5 is a top gate type thin film transistor, the active layer 321 is between the first insulating layer 51 and the substrate 31, and the gate electrode 322 is between the first insulating layer 51 and the second insulating layer 52. It is to be understood that the technical solutions of the embodiments of the present disclosure are not limited to the top gate type thin film transistor, and are also applicable to the bottom gate type thin film transistor.

The organic light emitting diode 70 includes a first electrode 71, an organic light emitting layer 72, and a second electrode 73. The first electrode 71 may be an anode, and the second electrode 73 may be a cathode. The first electrode 71 is located in the display area, and the first electrode 71 is located on a side of the planarization layer 34 facing away from the substrate 31. The first electrode 71 is connected to the source electrode 323a or the drain electrode 323b of the corresponding thin film transistor. The display substrate further includes a pixel defining layer 36, the pixel defining layer 36 is disposed in the display region 10, and the pixel defining layer 36 is provided with a plurality of openings exposing the first electrodes 71. The organic light emitting layer 72 is located in the opening and on a side of the first electrode 71 facing away from the substrate 31, and the second electrode 73 is located on a side of the organic light emitting layer 72 facing away from the substrate 31.

In one embodiment, as shown in fig. 4 and 5, the groove structure 60 may include a plurality of grooves arranged in parallel, the plurality of grooves are sequentially arranged along the second direction Y, and the metal line 33 is overlapped on the surfaces of the plurality of grooves. By arranging a plurality of parallel grooves, the path length of the metal wire 33 from the non-display area 20 to the display area 10 can be further prolonged, the path length of water and oxygen can be further increased, the risk that the OLED in the display area is corroded by water and oxygen can be effectively reduced, and the product reliability is improved.

In one embodiment, as shown in fig. 5, the plurality of grooves may include at least one first groove 61 and at least one second groove 62, the at least one first groove 61 and the at least one second groove 62 are aligned in the second direction Y, and a depth of the first groove 61 may be greater than a depth of the second groove 62. The groove structure can further prolong the path length of the metal wire 33 from the non-display area 20 to the display area 10, further increase the path length of water and oxygen, more effectively reduce the risk of corrosion of the OLED in the display area by the water and oxygen, and improve the product reliability. The order in which the at least one first groove 61 and the at least one second groove 62 are arranged in the second direction Y may be set as desired.

Here, specific numbers of the first grooves 61 and the second grooves 62 are not limited, and in practical implementation, the arrangement order and the number of the first grooves 61 and the second grooves 62 may be set as needed.

In one embodiment, the opening of first groove 61 is gradually increased, and the opening of second groove 62 is gradually increased, and for example, the cross section of first groove 61 may be an inverted isosceles trapezoid, and the cross section of second groove 62 may be an inverted isosceles trapezoid, so that when metal line 33 is formed on the surfaces of first groove 61 and second groove 62, poor connection of metal line 33 does not occur.

In one embodiment, as shown in fig. 5, at least one first groove 61 and at least one second groove 62 are alternately arranged at intervals, so that the metal line 33 may form a staggered step-like folding line from the non-display area 20 toward the display area 10, and when water and oxygen are eroded along a water and oxygen path formed by the metal line 33 due to lateral erosion, the metal line 33 with the staggered step-like folding line may further increase the difficulty of water and oxygen erosion along the metal line 33, reduce the risk of water and oxygen erosion of the OLED, and improve the reliability of the product.

In one embodiment, the depth of first recess 61 may range from 9000 angstroms to 11000 angstroms (inclusive). Illustratively, the depth of first recess 61 may be any value from 9000 angstroms to 11000 angstroms, for example, the depth of first recess 61 may be one of 9000 angstroms, 9500 angstroms, 10000 angstroms, 10500 angstroms, and 11000 angstroms.

In one embodiment, the depth of second recess 62 ranges from 4000 angstroms to 6000 angstroms (inclusive). Illustratively, the depth of second recess 62 may be any value from 4000 to 6000 angstroms, e.g., the depth of second recess 62 may be one of 4000 angstroms, 4500 angstroms, 5000 angstroms, 5500 angstroms, and 6000 angstroms.

In one embodiment, as shown in fig. 4 and 5, the pitch w between two adjacent grooves ranges from 5 μm to 10 μm.

In one embodiment, as shown in fig. 4, the metal line 33 may include a first metal line 331 and a second metal line 332, the first metal line 331 and the second metal line 332 are insulated from each other, and both the first metal line 331 and the second metal line 332 extend in the second direction Y. The groove structure 60 may include a first groove structure 601 and a second groove structure 602 arranged along the first direction X, wherein the first metal wire 331 overlaps the surface of the first groove structure 601, and the second metal wire 332 overlaps the surface of the second groove structure 602.

In fig. 4, the first stage groove structure 601 and the second stage groove structure 602 are disconnected from each other, it being understood that in other embodiments, the first stage groove structure 601 and the second stage groove structure 602 may be one integral body of connection. Here, the lengths of the first and

second groove structures

601 and 602 in the first direction X are not limited as long as the first metal line 331 can overlap the surface of the groove structure 60 and the second metal line 332 can overlap the surface of the groove structure 60.

In one embodiment, as shown in fig. 4 and 5, the metal line 33 may be located at the same layer as the source electrode 323a and the drain electrode 323 b.

In one embodiment, the first metal line 331 may be a first power line connected to a first power source VDD of the display substrate, and the second metal line 332 may be a second power line connected to a second power source VSS of the display substrate.

In one embodiment, as shown in fig. 5, the display substrate may further include a buffer layer 53, and the buffer layer 53 may be positioned between the first insulating layer 51 and the base 31. The buffer layer 53 may be positioned in the display region 10 and the non-display region 20.

According to the technical scheme of the embodiment of the disclosure, the side of the second insulating layer 52 facing away from the substrate 31 is provided with the groove structure 60 located in the non-display area 20, the groove structure 60 can extend along the first direction X, the metal wire 33 is located in the non-display area 20 and located on the side of the second insulating layer 52 facing away from the substrate 31, the metal wire 33 extends along the second direction Y, and the metal wire 33 is lapped on the surface of the groove structure 60. With such a structure, the metal line 33 is bent and folded in a cross section perpendicular to the display substrate and along the second direction Y, and the path length of the metal line 33 from the non-display area 20 to the display area 10 is extended, so that the path length of the metal line 33 from the non-display area 20 to the display area 10 is longer. Therefore, even if the metal line 33 is etched to form a water and oxygen path during the formation of the anode of the organic light emitting diode 70, the path length of the metal line 33 from the non-display region 20 to the display region 10 is increased, so that the water and oxygen path length is increased, the risk of the corrosion of the OLED in the display region by water and oxygen can be reduced, and the reliability of the product can be improved. Compared with the technical scheme adopted by the related technology, the display substrate does not increase the number of masks and influence the productivity, and the edges of the metal wires are linear, so that cracks of the packaging layer are not caused, and the packaging effect is improved.

The embodiment of the present disclosure also provides a method for manufacturing a display substrate, which may include:

In one embodiment, forming a groove structure in the non-display area on a side of the second insulating layer facing away from the substrate includes:

The technical solution of the embodiment of the present disclosure is further described below by the preparation process of the display substrate in an embodiment of the present disclosure. It is to be understood that "patterning" as used herein includes processes of coating photoresist, mask exposure, development, etching, stripping photoresist, etc. when the material to be patterned is an inorganic material or a metal, and processes of mask exposure, development, etc. when the material to be patterned is an organic material, and evaporation, deposition, coating, etc. as used herein are well-known preparation processes in the related art.

The process of preparing the display substrate may include:

a buffer layer 53, an active layer 321, a gate electrode 322, a first insulating layer 51 and a second insulating layer 52 are sequentially formed on one side of a substrate 31, as shown in fig. 6, and fig. 6 is a schematic cross-sectional view of a display substrate according to an embodiment of the present disclosure after a second insulating layer is formed. The buffer layer 53, the first insulating layer 51, and the second insulating layer 52 are located in the display region and the non-display region, and the active layer 321 and the gate electrode 322 are located in the display region. The buffer layer 53, the active layer 321, the gate electrode 322, the first insulating layer 51, and the second insulating layer 52 may be formed using a conventional technique in the art, and will not be described herein. The buffer layer 53, the first insulating layer 51, and the second insulating layer 52 may be made of at least one of silicon nitride, silicon oxide, and silicon oxynitride.

The first groove 61, the second groove 62 and the via hole in the display area are formed by two patterning processes. For example, first, the first insulating layer 51, the second insulating layer 52 and the buffer layer 53 are etched through a first MASK (Etch masking, EBA MASK for short), and at least one first groove 61 located in the non-display region is formed on a side of the first insulating layer 51 away from the substrate 31; a first via hole 81 and a second via hole 82 located in the display region are formed on a side of the second insulating layer 52 away from the substrate 31, and both the first via hole 81 and the second via hole 82 expose the active layer 321, as shown in fig. 7, where fig. 7 is a schematic cross-sectional view after a first groove is formed in the display substrate according to an embodiment of the present disclosure. The second insulating layer 52, the first insulating layer 51 and the buffer layer 53 in the non-display area are etched through a second MASK (e.g., an Etch masking B MASK, abbreviated as an EBB MASK), so as to form at least one second groove 62 in the non-display area, where the second groove 62 is exemplarily located between two adjacent first grooves 61. The depth of the first groove 61 is greater than that of the second groove 62, the depth of the first groove 61 ranges from 9000 angstroms to 11000 angstroms (inclusive), the depth of the second groove 62 ranges from 4000 angstroms to 6000 angstroms (inclusive), the first groove 61 and the second groove 62 both extend along the first direction X, and the at least one first groove 61 and the at least one second groove 62 are aligned along the second direction Y, so that the first groove 61 and the second groove 62 form a step-like groove structure 60, as shown in fig. 8, which is a schematic cross-sectional view of a substrate after the second groove is formed according to an embodiment of the present disclosure.

It is understood that the first via 81 and the second via 82 may be formed during the formation of the first groove 61, and in other embodiments, the first via 81 and the second via 82 may be formed during the formation of the second groove 62, which may be selected according to actual needs.

The EBA MASK and EBB MASK processes are patterning processes for grooving the non-display area in the OLED display substrate, and the display substrate of the embodiment of the disclosure forms the first groove and the second groove in the non-display area simultaneously in the EBA MASK and EBB MASK processes, so that the MASK number of the display substrate cannot be increased, and the productivity of the display substrate cannot be influenced.

A source electrode 323a, a drain electrode 323b and a metal line 33 are formed on a side of the second insulating layer 52 facing away from the substrate 31, the source electrode 323a and the drain electrode 323b are located in the display region, the source electrode 323a is connected to the active layer 321 through the first via 81, and the drain electrode 323b is connected to the active layer 321 through the second via 82. The metal line 33 is located in the non-display region, the metal line 33 includes a first metal line 331 and a second metal line 332, the first metal line 331 and the second metal line 332 extend along the second direction Y, and both the first metal line 331 and the second metal line 332 overlap the surfaces of the first groove 61 and the second groove 62, as shown in fig. 9, fig. 9 is a schematic cross-sectional view of a display substrate after a pixel defining layer is formed in the display substrate according to an embodiment of the present disclosure. The source electrode 323a, the drain electrode 323b, and the metal line 33 may be formed using a patterning process that is conventional in the art and will not be described herein.

A planarization layer 34 is formed on the side of the source electrode 323a and the drain electrode 323b facing away from the substrate 31, the planarization layer 34 being located in the display region. The material of the planarization layer 34 may be an organic material, such as resin, as shown in fig. 9.

A first electrode 71 is formed on a side of the planarization layer 34 away from the substrate 31, the first electrode 71 is located in the display region, and the first electrode 71 is connected to the drain electrode 323b of the thin film transistor. The process of forming the first electrode 71 may include: forming a first electrode film on the side of the flat layer 34 away from the substrate 31, coating a photoresist on the first electrode film, masking, exposing and developing the photoresist, etching the first electrode film by using a wet etching process, removing the first electrode film at a position other than the first electrode, and stripping the remaining photoresist to form a first electrode 71. In the process of forming the first electrode 71, a wet etching process is required to etch away the first electrode film in the non-display region, and since the first electrode film directly overlaps the surfaces of the first metal line 331 and the second metal line 332 in the non-display region, lateral etching may occur in the first metal line 331 and the second metal line 332 in the wet etching process.

A pixel defining layer 36 is formed on a side of the first electrode 71 facing away from the substrate 31, and the pixel defining layer 36 is located in the display region, as shown in fig. 9. In the process of forming the pixel defining layer 36, the pixel defining layer material of the non-display region needs to be removed, however, the positions where the first metal line 331 and the second metal line 332 are etched away from the side may cause the pixel defining layer material to remain, and the remaining pixel defining layer material may easily absorb water and oxygen to form a water and oxygen channel.

In the embodiment of the present disclosure, the first metal line 331 and the second metal line 332 overlap the surfaces of the first groove 61 and the second groove 62, and the path length of the first metal line 331 and the second metal line 332 from the non-display area 20 to the display area 10 is extended, so that the path length of the first metal line 331 and the second metal line 332 from the non-display area 20 to the display area 10 is longer. Therefore, even if the first metal line 331 and the second metal line 332 are laterally etched to form a water and oxygen path during the formation of the first electrode of the organic light emitting diode 70, the path length of the first metal line 331 and the second metal line 332 from the non-display region 20 toward the display region 10 is increased, so that the water and oxygen path length is increased, the risk of corrosion of the OLED in the display region by water and oxygen can be reduced, and the reliability of the product can be improved.

In an exemplary embodiment, the first insulating layer, the second insulating layer, and the buffer layer may employ any one or more of silicon oxide (SiOx), silicon nitride (SiNx), and silicon oxynitride (SiON), and may be a single layer, a multi-layer, or a composite layer. A Buffer (Buffer) layer for improving the water and oxygen resistance of the substrate, and the first insulating layer may be referred to as a Gate Insulating (GI) layer and the second insulating layer may be referred to as an interlayer Insulating (ILD) layer. The gate electrode, the source electrode, the drain electrode, and the metal line may be made of a metal material, such as any one or more of silver (Ag), copper (Cu), aluminum (Al), titanium (Ti), and molybdenum (Mo), or an alloy material of the above metals, such as aluminum neodymium alloy (AlNd) or molybdenum niobium alloy (MoNb), and may have a single-layer structure or a multi-layer composite structure, such as Ti/Al/Ti, or the like. The pixel defining layer may be made of polyimide, acryl, polyethylene terephthalate, or the like. The active layer may be made of various materials such as amorphous indium gallium zinc Oxide (a-IGZO), zinc oxynitride (ZnON), Indium Zinc Tin Oxide (IZTO), amorphous silicon (a-Si), polysilicon (p-Si), hexathiophene, polythiophene, etc., that is, the present disclosure is applicable to transistors manufactured based on Oxide technology, silicon technology, and organic technology.

The thickness of each layer in the display substrate may be set as needed, and is not particularly limited.

The display substrate of the embodiment of the present disclosure may be an OLED display substrate, and the substrate may be a hard material such as glass, or a flexible material such as Polyimide (PI).

Based on the inventive concept of the foregoing embodiments, the embodiments of the present disclosure also provide a display device including the display panel employing the foregoing embodiments. The display device may be: any product or component with a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator and the like.

In the description of the present specification, it is to be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," "circumferential," and the like are used in the orientations and positional relationships indicated in the drawings for convenience in describing the present disclosure and to simplify the description, but are not intended to indicate or imply that the referenced devices or elements must have a particular orientation, be constructed and operated in a particular orientation, and are therefore not to be considered limiting of the present disclosure.

Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present disclosure, "a plurality" means two or more unless specifically limited otherwise.

In the present disclosure, unless otherwise expressly stated or limited, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can, for example, be fixedly connected, detachably connected, or integral; the connection can be mechanical connection, electrical connection or communication; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meaning of the above terms in the present disclosure can be understood by those of ordinary skill in the art as appropriate.

In the present disclosure, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may comprise the first and second features being in direct contact, or may comprise the first and second features being in contact, not directly, but via another feature in between. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly above and obliquely above the second feature, or simply meaning that the first feature is at a lesser level than the second feature.

The above disclosure provides many different embodiments or examples for implementing different features of the disclosure. The components and arrangements of specific examples are described above to simplify the present disclosure. Of course, they are merely examples and are not intended to limit the present disclosure. Moreover, the present disclosure may repeat reference numerals and/or reference letters in the various examples, which have been repeated for purposes of simplicity and clarity and do not in themselves dictate a relationship between the various embodiments and/or arrangements discussed.

While the present disclosure has been described with reference to specific embodiments, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims.

Claims

1. A display substrate comprising a display region and a non-display region, the substrate comprising:

a substrate;

the display device comprises an active layer, a first insulating layer, a gate electrode and a second insulating layer, wherein the active layer and the gate electrode are positioned in a display area, the first insulating layer and the second insulating layer are positioned in the display area and a non-display area, one side of the second insulating layer, which is far away from the substrate, is provided with a groove structure positioned in the non-display area, the groove structure extends along a first direction, and the first direction is parallel to the corresponding edge of the display area;

the source electrode and the drain electrode are positioned on one side, away from the substrate, of the second insulating layer, the source electrode and the drain electrode are positioned in the display area, and the source electrode and the drain electrode are both connected with the active layer;

the metal wire is positioned in the non-display area and on one side, away from the substrate, of the second insulating layer and extends along a second direction, the metal wire is lapped on the surface of the groove structure, and the second direction is perpendicular to the first direction;

the flat layer is positioned in the display area and positioned on one side of the source electrode and the drain electrode, which faces away from the substrate;

and the organic light emitting diodes are positioned in the display area and positioned on one side of the flat layer, which is far away from the substrate, and the organic light emitting diodes are connected with the corresponding source electrodes or drain electrodes.

2. The display substrate according to claim 1, wherein the groove structure comprises a plurality of grooves arranged side by side, the plurality of grooves are sequentially arranged along the second direction, and the metal lines are overlapped on the surfaces of the plurality of grooves.

3. The display substrate of claim 2, wherein the plurality of grooves comprises at least one first groove and at least one second groove, and wherein the depth of the first groove is greater than the depth of the second groove.

4. The display substrate of claim 3, wherein the at least one first groove and the at least one second groove are alternately spaced.

5. The display substrate of claim 3, wherein the first groove has a depth ranging from 9000 angstroms to 11000 angstroms.

6. The display substrate of claim 3, wherein the second recess has a depth ranging from 4000 angstroms to 6000 angstroms.

7. The display substrate of claim 3, wherein the distance between two adjacent grooves is in a range of 5 μm to 10 μm.

8. The display substrate according to any one of claims 1 to 7, wherein the metal lines comprise a first metal line and a second metal line insulated from each other, the first metal line and the second metal line both extend along the second direction, the groove structure comprises a first section of groove structure and a second section of groove structure, the first metal line overlaps a surface of the first section of groove structure, and the second metal line overlaps a surface of the second section of groove structure.

9. The display substrate of claim 8, wherein the first metal line is a first power line and the second metal line is a second power line.

10. The display substrate according to claim 1, wherein the metal line is located at the same layer as the source electrode and the drain electrode.

11. A method for preparing a display substrate is characterized by comprising the following steps:

forming an active layer, a first insulating layer, a gate electrode and a second insulating layer on one side of a substrate, the active layer and the gate electrode being positioned in a display region, the first insulating layer and the second insulating layer being positioned in the display region and the non-display region;

forming a groove structure located in a non-display area on one side of the second insulating layer, which is far away from the substrate, wherein the groove structure extends along a first direction, and the first direction is parallel to the corresponding edge of the display area;

forming a source electrode, a drain electrode and a metal wire on one side of the second insulating layer, which is far away from the substrate, wherein the source electrode and the drain electrode are positioned in a display area, the source electrode and the drain electrode are both connected with the active layer, the metal wire is positioned in a non-display area, the metal wire extends along a second direction, the metal wire is lapped on the surface of the groove structure, and the second direction is a direction perpendicular to the first direction;

forming a flat layer on one side of the source electrode and the drain electrode, which faces away from the substrate, wherein the flat layer is positioned in a display area;

and forming a plurality of organic light emitting diodes positioned in a display area on one side of the flat layer, which is far away from the substrate, wherein the organic light emitting diodes are connected with the corresponding source electrodes or drain electrodes.

12. The method of claim 11, wherein forming a recess structure in a non-display area on a side of the second insulating layer facing away from the substrate comprises:

forming at least one first groove on one side of the second insulating layer, which is far away from the substrate, by adopting a primary patterning process, wherein the first groove extends along the first direction;

the groove structure includes the at least one first groove and the at least one second groove, which are aligned in the second direction.

13. A display device comprising the display substrate according to any one of claims 1 to 10.