CN113346006A - Magnetic tunnel junction structure and magnetic random access memory thereof - Google Patents
Magnetic tunnel junction structure and magnetic random access memory thereof Download PDFInfo
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Abstract
The application provides a magnetic tunnel junction structure, the lattice promotion layer of single-layer material membrane or multilayer material membrane is still formed before the synthetic antiferromagnetic layer of magnetic tunnel junction structure generates, it is used for making form face-centered cubic FCC (111) structure and have perpendicular anisotropy when the synthetic antiferromagnetic layer generates, realize the strong ferromagnetic coupling between synthetic antiferromagnetic layer and the reference layer, be favorable to the improvement of magnetic tunnel junction unit in magnetism, electricity and yield and the reduction of device.
Description
Technical Field
The present invention relates to the field of memory technologies, and in particular, to a magnetic tunnel junction structure of a magnetic random access memory.
Background
Magnetic Random Access Memory (MRAM) in a Magnetic Tunnel Junction (MTJ) having Perpendicular Anisotropy (PMA), as a free layer for storing information, has two magnetization directions in a vertical direction, that is: upward and downward, respectively corresponding to "0" and "1" or "1" and "0" in binary, in practical application, the magnetization direction of the free layer will remain unchanged when reading information or leaving empty; during writing, if a signal different from the existing state is input, the magnetization direction of the free layer will be flipped by one hundred and eighty degrees in the vertical direction. The ability of a magnetic random access Memory to maintain the magnetization direction of the free layer constant is called Data Retention (Data Retention) or Thermal Stability (Thermal Stability), which is not required in different application scenarios, and for a typical Non-volatile Memory (NVM), for example: the method is applied to the field of automotive electronics, the requirement of data storage capacity is that the data can be stored for at least 10 years at 125 ℃ or even 150 ℃, and the reduction of data retention capacity or thermal stability can be caused when external magnetic field is turned over, thermal disturbance, current disturbance or reading and writing are carried out for many times, so that the pinning of a Reference Layer (RL) is usually realized by adopting a Synthetic Anti-Ferromagnetic Layer (SyAF) superlattice. How to make, synthetic antiferromagnetic layers with stable switching fields under magnetic or electric field switching conditions are becoming increasingly important.
Disclosure of Invention
In order to solve the above technical problems, an object of the present application is to provide a magnetic tunnel junction structure to achieve reference layer pinning, lattice transformation and enhanced perpendicular anisotropy.
The purpose of the application and the technical problem to be solved are realized by adopting the following technical scheme.
According to the magnetic tunnel junction structure provided by the application, the structure from top to bottom comprises a covering Layer (covering Layer), a Free Layer (Free Layer; FL), a Barrier Layer (Tunneling Barrier Layer, TB), a Reference Layer (Reference Layer, RL), a lattice Breaking Layer (TBL), a synthetic anti-Ferromagnetic Layer (SyAF) and a Non-Crystal Buffer Layer (Non-Crystal Buffer Layer, NCBL), wherein before the synthetic anti-Ferromagnetic Layer (SyAF) is deposited, a lattice promoting Layer (Texture promoting Layer, TPL) is deposited, the structure of the lattice promoting Layer is single-Layer material film CrX, or a multi-Layer material film [ NiFe/CrX ] representing the structure from bottom to top in the left-right sequence]n、CrX/Y、[NiFe/CrX]nY, wherein n is more than or equal to 1 and less than or equal to 20, X is selected from the group consisting of Ni, Fe, Co, Ir, Ru, Mg, Al, Si, Sc, Ti, V, Mn, Cu, Zn, Ga, Ge, Y, Zr, Nb, Mo, Tc, Rh, Au, Ag, W, Ta or Hf, Y is selected from Pt, Ru, Hf, Ta, W, Pd, Au, Re, Os, Ir, Rh, Ag, Ni, Cu or alloys thereof or multilayer films formed by the above; the lattice-promoting layer serves to guide the generation of the synthetic antiferromagnetic layer so that the synthetic antiferromagnetic layer forms a face-centered cubic FCC (111) structure when generated and has a perpendicular anisotropy.
The technical problem solved by the application can be further realized by adopting the following technical measures.
In an embodiment of the present application, the total thickness of the lattice promoting layer is 0.5nm to 20.0 nm.
In an embodiment of the present application, the lattice-promoting layer is deposited in a physical vapor deposition process chamber.
In one embodiment of the present application, the sputter deposition is performed under high temperature conditions when depositing the lattice-promoting layer.
In one embodiment of the present application, the high temperature is between 150 ℃ and 450 ℃.
In one embodiment of the present application, the sputter deposition is performed using low-Z ions as an ion source, the low-Z ions being Ne+Or Ar+。
In one embodiment of the present application, the lattice-promoting layer (TPL) may be completed as a single deposition or as multiple depositions, each followed by a plasma modification process.
In one embodiment of the present application, an annealing process is performed on the magnetic tunnel junction at a temperature not less than 350 ℃ to transform the reference layer and the free layer from an amorphous structure to a body-centered cubic stacked crystal structure under the templating effect of the face-centered cubic crystal structure barrier layer; at the same time, the synthetic antiferromagnetic layer (SyAF) is stressed in-plane, providing a source of perpendicular anisotropy (PMA), namely: magnetoelastic Anisotropy (MEA).
The present application provides a magnetic tunnel junction structure with a lattice promoting layer, which enables the synthetic antiferromagnetic layer (SyAF) to have strong face centered cubic structures FCC (111) and PMA by using the above-mentioned FCC (111) lattice promoting layer (TPL) and its growth process after the deposition of an amorphous buffer layer (NCBL) and before the synthesis of the antiferromagnetic layer (SyAF). The method is very beneficial to the improvement of magnetism, electricity and yield of the whole MTJ unit and the miniaturization of devices. Further, deposition under high temperature conditions, the lattice-promoting layer (TPL) has a relatively large grain size; due to the fact that the low-Z positive ions rebounded from the sputtering target have higher energy, during the deposition process, the atoms of the crystal lattice promoting layer (TPL) on the deposition surface are sputtered again (Re-sputtering) to be separated from the surface or migrate again to the nucleation point with the lowest system energy, and therefore the surface roughness of the crystal lattice promoting layer (TPL) is reduced powerfully. In addition, the lattice-promoting layer (TPL) is smoothed by a plasma process, which may further reduce the surface roughness thereof.
Drawings
FIG. 1 is a diagram illustrating a structure of a magnetic tunnel junction of a magnetic random access memory according to an embodiment of the present invention.
FIG. 2 is a schematic structural diagram of a bilayer structure of a seed layer and a synthetic antiferromagnetic layer (SyAF) before and after annealing in the practice of the present application.
Description of the symbols
10, a bottom electrode; 20, magnetic tunnel junction; 21, an amorphous buffer layer 22, a lattice promoting layer; synthesizing an antiferromagnetic layer 23; 24, a lattice partition layer; 25 reference layer; 26 a barrier layer; 27: a free layer; 28, a covering layer; and 30, a top electrode.
Detailed Description
The following description of the embodiments refers to the accompanying drawings for illustrating the specific embodiments in which the invention may be practiced. In the present invention, directional terms such as "up", "down", "front", "back", "left", "right", "inner", "outer", "side", etc. refer to directions of the attached drawings. Accordingly, the directional terms used are used for explanation and understanding of the present invention, and are not used for limiting the present invention.
The drawings and description are to be regarded as illustrative in nature, and not as restrictive. In the drawings, elements having similar structures are denoted by the same reference numerals. In addition, the size and thickness of each component shown in the drawings are arbitrarily illustrated for understanding and ease of description, but the present invention is not limited thereto.
In the drawings, the range of configurations of devices, systems, components, circuits is exaggerated for clarity, understanding, and ease of description. It will be understood that when an element is referred to as being "on" another element, it can be directly on the other element or intervening elements may also be present.
In addition, in the description, unless explicitly described to the contrary, the word "comprise" will be understood to mean that the recited components are included, but not to exclude any other components. Further, in the specification, "on.
To further illustrate the technical means and effects of the present invention for achieving the predetermined objects, the following detailed description is given to a magnetic tunnel junction structure with enhanced perpendicular anisotropy and a magnetic random access memory using the same, with reference to the accompanying drawings and embodiments.
FIG. 1 is a diagram illustrating a structure of a magnetic tunnel junction of a magnetic random access memory according to an embodiment of the present invention. The magnetic memory cell structure comprises a multi-layer structure formed by at least a bottom electrode 10, a magnetic tunnel junction 20 and a top electrode 30. The magnetic tunnel junction 20 includes a Capping Layer (CL)28, a Free Layer (FL)27, a Barrier Layer (TB)26, a Reference Layer (RL)25, a lattice Breaking Layer (TBL) 24, a Synthetic Anti-Ferromagnetic Layer (SyAF)23, and an amorphous Buffer Layer (Non-crystalline Buffer Layer, NCBL) 21.
In one embodiment of the present application, as shown in fig. 1, a lattice promoting Layer (CPL)22 is further included between the synthetic antiferromagnetic Layer 23 and the amorphous buffer Layer 21, and the lattice promoting Layer 22 is disposed on the amorphous buffer Layer 21A Buffer Layer (Non-Crystal Buffer Layer, NCBL) formed after deposition and before deposition of a synthetic antiferromagnetic Layer (SyAF), the lattice-promoting Layer 22 having a structure of a single material film CrX or a multi-material film [ NiFe/CrX ] of a bottom-up structure]n、CrX/Y、[NiFe/CrX]nY, wherein n is more than or equal to 1 and less than or equal to 20, X is selected from the group consisting of Ni, Fe, Co, Ir, Ru, Mg, Al, Si, Sc, Ti, V, Mn, Cu, Zn, Ga, Ge, Y, Zr, Nb, Mo, Tc, Rh, Au, Ag, W, Ta or Hf, Y is selected from Pt, Ru, Hf, Ta, W, Pd, Au, Re, Os, Ir, Rh, Ag, Ni, Cu or alloys thereof or multilayer films formed by the above; the lattice-promoting layer 22 is used to guide the generation of the synthetic antiferromagnetic layer 23 to promote the subsequent crystalline growth of the synthetic antiferromagnetic layer 23, and to make the synthetic antiferromagnetic layer 23 have a strong face-centered-cubic FCC (111) structure and a strong Perpendicular Anisotropy (PMA).
In one embodiment of the present application, the total thickness of the lattice promoting layer 22 is 0.5nm to 20.0 nm.
In some embodiments, the lattice-promoting layer 22 is deposited in a Physical Vapor Deposition (PVD) process chamber.
Preferably, the lattice-promoting layer is deposited by sputtering at an elevated temperature, which is between 150 ℃ and 450 ℃, typically using low-Z ions as the ion source, such as: ne (line of contact)+Or Ar+And the like.
Further, after the high temperature deposition, the sample is naturally cooled to room temperature or is subjected to ultra-low temperature cooling, such as 100K to 200K.
Preferably, the lattice-promoting layer (TPL) may be completed in a single deposition or in multiple depositions, each followed by a plasma modification process.
In some embodiments, the superior effect of high temperature growth is a specific relatively large grain size of the lattice-promoting layer 22; because the low-Z positive ions rebounded from the sputtering target have higher energy, the atoms of the lattice promoting layer 22 on the deposition surface can be sputtered again (Re-sputtering) to be separated from the surface or migrate again to a nucleation point with the lowest system energy in the deposition process, thereby effectively reducing the surface roughness of the lattice promoting layer 22. Further, the lattice promoting layer 22 is smoothed by a plasma process, which may further reduce the surface roughness thereof.
As shown in fig. 1, the magnetic memory cell includes a Bottom Electrode (BE)10, a Magnetic Tunnel Junction (MTJ)20, and a Top Electrode (Top Electrode) 30. All Deposition processes are done in a Physical Vapor Deposition (PVD) process chamber.
In an embodiment of the present application, the material of the bottom electrode 10 is one or a combination of Ti, TiN, Ta, TaN, W, WN, and the like.
In an embodiment of the present application, the material of the top electrode 30 is one or a combination of Ti, TiN, Ta, TaN, W, WN, and the like.
In some embodiments, the bottom electrode 10 is planarized after deposition to achieve surface planarity for fabricating the magnetic tunnel junction 20.
In some embodiments, the Magnetic Tunnel Junction (MTJ)20 is internally stacked in a multilayer structure of an amorphous buffer Layer (NCBL)21, an FCC (111) lattice promoting Layer (TPL)22, a synthetic antiferromagnetic Layer (SyAF)23, a lattice Breaking Layer (TBL) 24, a Reference Layer (RL)25, a barrier Layer (TB)26, a Free Layer (FL)27, and a Capping Layer (CL)28 in this order.
In an embodiment of the present application, the amorphous buffer layer 21 is generally composed of Ta, Ti, TiN, TaN, W, WN, Ru, Pt, Cr, O, N, CoB, FeB, CoFeB or their combination. To act as a buffer between the Bottom Electrode (BE)10 and the FCC (111) lattice promoting layer (CPL) 22.
In one embodiment of the present application, the synthetic antiferromagnetic layer (SyAF)23 generally has the structure: [ Co/Pt ]]nCo or [ Pt/Co]nAnd sequentially and upwards stacking two layers of Ru or Ir. [ Co/Ni ]]nCo or [ Ni/Co ]]nAnd sequentially and upwards stacking two layers of Ru or Ir. [ Co/Pd]nCo or [ Pd/Co]nAnd sequentially and upwards stacking two layers of Ru or Ir. Or: [ Co/Pt ]]nCo or [ Pt/Co]nRu or Ir, Co or Co [ Pt/Co ]]mThe three-layer structure is sequentially overlapped upwards. Or: [ Co/Ni ]]nCo or [ Ni/Co ]]nRu or Ir, Co or Co [ Ni/Co ]]mThe three-layer structure is sequentially overlapped upwards. Or: [ Co/Pd]nCo or [ Pd/Co]nRu or Ir, Co or Co [ Pd/Co ]]mThe three-layer structure is sequentially overlapped upwards. Wherein n is more than or equal to 1, the thickness of single layer of Co, Pt, Pd, Ni, Ru and/or Ir is less than 1nm, the thickness of each sublayer can be the same or different, furthermore, the thickness of single layer of Co, Pd, Ni and Pt can be below 0.5nm, such as: 0.10nm, 0.15nm, 0.20nm, 0.25nm, 0.30nm, 0.35nm, 0.40nm, 0.45nm or 0.50nm, etc.
In one embodiment of the present application, the total thickness of the lattice partition layer 24 is 0nm to 0.8nm, and the material is X or YX, where X is W, Mo, Ta, Hf, Zr, V, Mg, Ti, or Ru or any combination of the foregoing elements, and Y is Fe, Co, Ni, FeB, CoB, FeCoB, or the like.
In one embodiment of the present application, the Reference Layer (RL)25 has a thickness of 0.5nm to 2.0nm, and is typically Co, Fe, Ni, CoFe, CoC, FeC, FeCoC, CoB, FeB, CoFeB, or any combination thereof.
In one embodiment of the present application, barrier layer 26 is a non-magnetic metal oxide with a total thickness of 0.6nm to 1.5nm, preferably MgO, MgZn2O4,Mg3B2O6Or MgAl2O4Further, MgO may be selected.
In one embodiment of the present application, the free layer 26 has a variable magnetic polarization with a total thickness of 1.2nm to 3nm, and is typically composed of Fe, Co, Ni, CoFe, CoB, FeB, CoFeB, W, Mg, Zr, Al, Zn, Nb, Mo, Ta, Hf, Zr, V, Cr, Mg, Ti or Ru, and further can be selected to have a three-layer structure of CoFeB/(W, Mg, Zr, Al, Zn, Nb, Mo, Ta, Hf, Zr, V, Cr, Mg, Ti or Ru)/CoFeB.
In one embodiment of the present application, after the deposition of the free layer 27, a Capping Layer (CL)28, typically (Mg, MgO, MgZn), is again deposited2O4,Mg3B2O6Or MgAl2O4) /(combinations of W, Mo, Mg, Nb, Ru, Hf, V, Cr, or Pt) bilayer structures. More preferably, the structure MgO/(W, Mo, Hf)/Ru or MgO/Pt/(W, Mo, Hf)/Ru can be selected. The superior effect of selecting MgO provides a source of additional interfacial anisotropy for the free layer 27, thereby increasing thermal stability.
In one embodiment of the present application, the magnetic tunnel junction 20 is subjected to an annealing process at a temperature not lower than 350 ℃ so that the reference layer 25 and the free layer 27 are transformed from an amorphous structure to a body-centered cubic stacked crystal structure by the templating action of the sodium chloride (NaCl) type face-centered cubic crystal structure barrier layer 25; at the same time, the synthetic antiferromagnetic layer (SyAF) is stressed in-plane, providing a source of perpendicular anisotropy (PMA), namely: magnetoelastic Anisotropy (MEA).
As shown In fig. 2, which is a two-layer structure of a lattice-promoting layer (TPL) and a synthetic antiferromagnetic layer (SyAF), the structural schematic diagram before and after annealing, after thermal annealing, may generate additional Stress Induced Perpendicular Anisotropy (SI-PMA) due to the presence of In-plane Stress (IPS), that is: magnetoelastic Anisotropy (MEA), thereby enhancing the stability of the synthetic antiferromagnetic layer (SyAF), and further, more firm pinning of the reference layer can be achieved.
Another objective of the present invention is to provide a magnetic random access memory architecture, which includes a plurality of memory cells, each memory cell being disposed at a crossing of a bit line and a word line, each memory cell comprising: a magnetic tunnel junction 20 as any of the previously described; a bottom electrode located below the magnetic tunnel junction 20; and a top electrode located above the magnetic tunnel junction 20.
The present application provides a magnetic tunnel junction structure with a lattice promoting layer, which enables the synthetic antiferromagnetic layer (SyAF) to have strong face centered cubic structures FCC (111) and PMA by using the above-mentioned FCC (111) lattice promoting layer (TPL) and its growth process after the deposition of an amorphous buffer layer (NCBL) and before the synthesis of the antiferromagnetic layer (SyAF). The method is very beneficial to the improvement of magnetism, electricity and yield of the whole MTJ unit and the miniaturization of devices. Further, deposition under high temperature conditions, the lattice-promoting layer (TPL) has a relatively large grain size; due to the fact that the low-Z positive ions rebounded from the sputtering target have higher energy, during the deposition process, the atoms of the crystal lattice promoting layer (TPL) on the deposition surface are sputtered again (Re-sputtering) to be separated from the surface or migrate again to the nucleation point with the lowest system energy, and therefore the surface roughness of the crystal lattice promoting layer (TPL) is reduced powerfully. In addition, the lattice-promoting layer (TPL) is smoothed by a plasma process, which may further reduce the surface roughness thereof.
The terms "in one embodiment of the present application" and "in various embodiments" are used repeatedly. This phrase generally does not refer to the same embodiment; it may also refer to the same embodiment. The terms "comprising," "having," and "including" are synonymous, unless the context dictates otherwise.
Although the present application has been described with reference to specific embodiments, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the application, and all changes, substitutions and alterations that fall within the spirit and scope of the application are to be understood as being covered by the following claims.
Claims (10)
1. A magnetic tunnel junction structure is arranged in a magnetic random access memory unit, the magnetic tunnel junction structure comprises a covering layer, a free layer, a barrier layer, a reference layer, a crystal lattice partition layer, a synthetic antiferromagnetic layer and a buffer layer from top to bottom, and the magnetic tunnel junction structure is characterized in that the synthetic antiferromagnetic layer and the buffer layer further comprise:
a lattice-promoting layer having a structure of a single-layer material film CrX or a multi-layer material having a bottom-up structure in the order of right and leftMaterial film [ NiFe/CrX ]]n、CrX/Y、[NiFe/CrX]nY, wherein n is more than or equal to 1 and less than or equal to 20, X is selected from the group consisting of Ni, Fe, Co, Ir, Ru, Mg, Al, Si, Sc, Ti, V, Mn, Cu, Zn, Ga, Ge, Y, Zr, Nb, Mo, Tc, Rh, Au, Ag, W, Ta or Hf, Y is selected from Pt, Ru, Hf, Ta, W, Pd, Au, Re, Os, Ir, Rh, Ag, Ni, Cu or alloys thereof or multilayer films formed by the above; the lattice-promoting layer serves to guide the generation of the synthetic antiferromagnetic layer such that the synthetic antiferromagnetic layer forms a face-centered cubic FCC (111) structure and has a perpendicular anisotropy when generated.
2. The magnetic tunnel junction structure of claim 1 wherein the lattice-promoting layer has a total thickness of 0.5nm to 20.0 nm.
3. The magnetic tunnel junction structure of claim 1 wherein the lattice-promoting layer is deposited in a physical vapor deposition process chamber.
4. The magnetic tunnel junction structure of claim 3 wherein the sputter deposition is performed at an elevated temperature during the deposition of the lattice-promoting layer.
5. The magnetic tunnel junction structure of claim 4 wherein the high temperature is between 150 ℃ and 450 ℃.
6. The magnetic tunnel junction structure of claim 4 wherein the sputter deposition uses low-Z ions as an ion source.
7. The magnetic tunnel junction structure of claim 6 wherein the low Z ion is Ne+Or Ar+。
8. The magnetic tunnel junction structure of claim 1 wherein the lattice-promoting layer is deposited in a single deposition or in multiple depositions, each deposition followed by a plasma modification process.
9. The magnetic tunnel junction structure of claim 1 wherein the magnetic tunnel junction is subjected to an annealing process at a temperature of not less than 350 ℃.
10. A magnetic random access memory comprising the magnetic tunnel junction structure of any of claims 1-9, a top electrode disposed above the magnetic tunnel junction structure, and a bottom electrode disposed below the magnetic tunnel junction structure.
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