CN113341295B

CN113341295B - Test jig and test system

Info

Publication number: CN113341295B
Application number: CN202110502186.0A
Authority: CN
Inventors: 李帅
Original assignee: Shandong Yingxin Computer Technology Co Ltd
Current assignee: Shandong Yingxin Computer Technology Co Ltd
Priority date: 2021-05-08
Filing date: 2021-05-08
Publication date: 2023-08-18
Anticipated expiration: 2041-05-08
Also published as: CN113341295A

Abstract

The invention discloses a test fixture, which comprises: the PCB is provided with a golden finger; each PCIE signal test terminal is arranged on the PCB and connected with a pin corresponding to the golden finger; each SATA signal test terminal is arranged on the PCB and connected with a pin corresponding to the golden finger; the switching module is arranged on the PCB and is connected with the pins corresponding to the golden fingers; the switching module is also connected with a ground wire. The invention further provides a test system. According to the scheme provided by the invention, under the condition that BIOS software is not required to be changed, PCIE or SATA signals are controlled to be sent by the main board on the same test fixture, so that project stagnation is greatly reduced, and labor consumption is reduced.

Description

Test jig and test system

Technical Field

The invention relates to the field of signal testing, in particular to a testing jig and a testing system.

Background

The server main board mainly adopts an M.2 interface to connect two solid state disks, one is a solid state disk connected with an SATA channel on the M.2 interface, and the other is a solid state disk connected with a PCI-e channel on the M.2 interface. In the process of server design verification, signals at the interface are tested, and if the M.2 interface supports two channels of SATA and PCIE, signals of the two channels need to be tested respectively, which are called SATA TX and PCIE TX tests respectively.

Because the server needs to test the SATA and PCIE signals at the m.2 during the development and testing process, although the motherboard can automatically identify whether the SATA or PCIE channels are walked through the solid state disk after inserting the m.2 solid state disk, a tool for testing SATA or PCIE is inserted into the m.2 interface in the current testing method. At present, although the motherboard can identify the SATA disk and the PCIE disk in design, if the motherboard is designed to send PCIE signals by default, SATA signals cannot be led out by inserting SATA jigs during testing.

Therefore, when the motherboard defaults to send out SATA signals, the test situation is as follows: inserting the PCIE jig into an M.2 interface, wiring according to a standard mode, and performing PCIE test; if the SATA signal is to be tested, the motherboard will send out PCIE signal by default, so the fixture cannot draw out the signal. The solution is to change BIOS software to perform software end configuration generally, but because the BIOS is changed softly, time and effort are wasted, the BIOS engineer is required to cooperate with the software end configuration, and timeliness is poor.

Disclosure of Invention

In view of this, in order to overcome at least one aspect of the above-mentioned problems, an embodiment of the present invention provides a test fixture, including:

the PCB is provided with a golden finger;

each PCIE signal test terminal is arranged on the PCB and connected with a pin corresponding to the golden finger;

each SATA signal test terminal is arranged on the PCB and connected with a pin corresponding to the golden finger;

the switching module is arranged on the PCB and is connected with the pins corresponding to the golden fingers;

wherein the switching module is configured to disconnect from a ground line in a first state; and in the second state, the ground wire is connected with the sliding cover.

In some embodiments, further comprising:

and the sliding cover is movably connected with the PCB.

In some embodiments, further comprising:

and the indicating lamp is connected to the switching module and used for indicating the state of the switching module.

In some embodiments, further comprising:

each first lead is used for connecting a corresponding PCIE signal test terminal and a pin of the golden finger;

each second lead is used for connecting a corresponding SATA signal test terminal and a pin of the golden finger;

wherein the first and second leads are arranged on different layers of the PCB board.

In some embodiments, the golden finger comprises a first portion of golden finger, a second portion of golden finger, and a third portion of golden finger;

the first part of golden fingers and the third part of golden fingers are separated from the second part of golden fingers.

Based on the same inventive concept, the embodiment of the invention also provides a test system, which comprises a device to be tested with a slot and a test fixture; wherein, the test fixture includes:

the PCB is provided with a golden finger, and the PCB is inserted into the slot through the golden finger;

wherein the switching module is configured to disconnect from a ground line in a first state; and in the second state, is connected with the ground wire.

In some embodiments, further comprising:

and the sliding cover is movably connected with the PCB.

In some embodiments, further comprising:

The invention has one of the following beneficial technical effects: according to the scheme provided by the invention, under the condition that BIOS software is not required to be changed, PCIE or SATA signals are controlled to be sent by the main board on the same test fixture, so that project stagnation is greatly reduced, and labor consumption is reduced.

Drawings

In order to more clearly illustrate the embodiments of the invention or the technical solutions in the prior art, the drawings that are necessary for the description of the embodiments or the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the invention and that other embodiments may be obtained according to these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a schematic diagram of a test fixture according to an embodiment of the present invention;

fig. 2 is a schematic diagram of a test terminal of a test fixture corresponding to a socket pin of a device to be tested according to an embodiment of the present invention;

fig. 3 is a schematic diagram of a Socket2 type slot structure;

fig. 4 is a schematic diagram of a Socket3 type slot structure.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, the following embodiments of the present invention will be described in further detail with reference to the accompanying drawings.

It should be noted that, in the embodiments of the present invention, all the expressions "first" and "second" are used to distinguish two entities with the same name but different entities or different parameters, and it is noted that the "first" and "second" are only used for convenience of expression, and should not be construed as limiting the embodiments of the present invention, and the following embodiments are not described one by one.

According to an aspect of the present invention, an embodiment of the present invention provides a test fixture, as shown in fig. 1, including: the switching module comprises a PCB (printed circuit board) 1, a plurality of PCIE signal test terminals 2, a plurality of SATA signal test terminals 3 and a switching module 4.

The PCB1 is provided with a golden finger 11, and the testing jig is inserted into a slot of the device to be tested through the golden finger 11, so that the testing jig is connected with the device to be tested, and the subsequent test is performed.

In some embodiments, the SATA signal test terminal 3 shown in FIG. 1 may include SATA A+, SATA A-, SATA B+, SATA B-. The PCIE signal test terminal 2 shown in fig. 1 may include PCIE RX0P, PCIE RX0N, PCIE TX0P, PCIE TX0N, PCIE RX1P, PCIE RX1N, PCIE TX1P, PCIE TX1N, PCIE RX2P, PCIE RX2N, PCIE TX2P, PCIE RX3N, PCIE TX3P, PCIE TX3N, and clock signals REF CLKp and REF CLKn. The SATA signal testing terminals 3 may be led out from a side surface of the PCB board through a cable, and the PCIE signal testing terminals 2 may be directly disposed on an upper surface of the PCB board 1 (i.e., a plurality of circular areas shown in fig. 1).

In some embodiments, a sliding cover can be further disposed on the PCB board 1, and the sliding cover is movably connected with the PCB board. Therefore, when the test is not performed, the sliding cover can be covered to protect pins of the PCIE signal test terminal positioned on the upper part of the PCB.

In some embodiments, since each SATA signal testing terminal 3 and each PCIE signal testing terminal 2 are connected to a corresponding pin of a gold finger 11 on the PCB board 1, and the gold finger is inserted into a slot of a device to be tested, each pin on the gold finger can lead out a corresponding signal in the device to be tested, and then the signals are led out for testing by using each SATA signal testing terminal and each PCIE signal testing terminal.

For example, as shown in fig. 2, the slot of the device to be tested is an m.2 interface, the signal corresponding to pin 43 is PREp0, and corresponds to PCIE signal test terminal PCIE RX0P on the test fixture shown in fig. 1, so that PREp0 signal can be derived through PCIE RX0P to realize testing. Similarly, the signal corresponding to pin 41 is PREn0, and corresponds to PCIE signal testing terminal PCIE RX0N on the testing fixture shown in fig. 1, so that the PREn0 signal can be derived through PCIE RX0N to realize testing.

It should be noted that, the SATA signal and the PCIE signal in the m.2 interface share the same pin group, that is, the 4 pins corresponding to the SATA signal are the same as the pins corresponding to the PCIE signal group. For example, as shown in fig. 2, pins corresponding to PCIE RX0P, PCIE RX0N, PCIE TX0P, PCIE TX0N are 43, 41, 49, and 47, while pins corresponding to SATA a+, SATA a-, SATA b+, SATA B-are 49, 47, 41, and 43.

In some embodiments, the switching module 4 shown in fig. 1 may be disposed on the PCB board 1 and connected to a pin corresponding to the gold finger 11.

In some embodiments, the switching module 4 is configured to disconnect from the ground line in a first state; and in the second state, is connected with the ground wire.

Specifically, when the slot of the device to be tested is an M.2 interface, a corresponding signal is generated by detecting the height of the 69 # pin. That is, the 69 # pin is high, the device to be tested sends out PCIE signal, and low sends out SATA signal, so as to make DFt (Design For test, design For testability) Design, pull the pin high in the Design stage, that is, support PCIE signal by default. Therefore, the pin connected with the switching module on the golden finger can be correspondingly connected with the 69 # pin of the device to be tested, and the 69 # pin can be disconnected with the ground by disconnecting the connection with the ground when the switching module is in the first state, and the 69 # pin is at a high level at this time, and the device to be tested sends out PCIE signals; and when the switching module is in the second state, the connection with the ground wire is restored, the connection between the 69 # pin and the ground wire can be realized, the 69 # pin is at a low level, and the device to be tested sends out SATA signals.

It should be noted that, when the state of the switching module is switched, the device to be tested needs to be powered down, i.e. the test fixture is inserted into the m.2 interface, and then the corresponding signal is tested. After the test is completed, the state is switched after the power-off, and then the power-on is started again to enable the device to be tested to send out another signal, and further the other signal is tested.

In some embodiments, the switching module may be a button, dial switch, or other switch, etc.

In some embodiments, further comprising:

and the indicator lamp 5 is connected to the switching module and used for indicating the state of the switching module.

Specifically, the state of the switching module may be indicated by turning on/off the instruction lamp, for example, when the switching module is in the first state, the instruction lamp may be in the on state, and when the switching module is in the second state, the instruction lamp may be in the off state. Or, indicator lamps with different colors can be arranged, and the lamps with different colors are controlled to be on or off so as to realize the state of the indication switching module.

In some embodiments, further comprising:

Specifically, because the channel differential line impedance control above PCIE 3.0 is 850hm and SATA channel differential line requires 1000hm impedance control, PCIE signal pinout (first pin) and SATA pinout (second pin) are arranged on different layers of the PCB board. For example, PCIE signal pinouts may be arranged on a surface layer, SATA pinouts on a second layer, with a reference layer (e.g., ground layer) between the two layers to avoid signal interference.

In some embodiments, the golden finger 11 includes a first portion of golden finger 111, a second portion of golden finger 112, and a third portion of golden finger 113;

wherein the first part of the golden finger 111 and the third part of the golden finger 113 are separated from the second part of the golden finger 112.

Specifically, the M.2 interface has three slots of Socket1, socket2 and Socket3, and the Socket1 is welded and is only suitable for 1216, 2226 and 3026-sized devices, so that the application range is narrow and is generally not used, and the application range is not discussed; in addition, since the server has higher performance, socket3 type slots are generally used on the server motherboard, and Socket3 type slot compatible Key types comprise B Key, M Key, B & M Key and B Key. SSD devices typically only support SATA channels, and have been eliminated because B key devices only support Socket2 interfaces. Socket3 slots support M keys and B & M keys. The M key type supports PCIEx4 and SATA channels, and the B & M key supports only SATA channels. Pin distributions for Socket2 and Socket3 are given as shown in fig. 3 and 4, respectively.

Therefore, the golden finger arranged at the front end of the PCB is designed to comprise a first part of golden finger, a second part of golden finger and a third part of golden finger; and the first part of golden finger and the third part of golden finger are separated from the second part of golden finger. Namely, the B & M key type gold finger is designed to support the Socket3 type and is compatible with the Socket2 type M.2 slot.

According to the scheme provided by the invention, under the condition that BIOS software is not required to be changed, PCIE or SATA signals are controlled to be sent by the main board on the same test fixture, so that project stagnation is greatly reduced, and labor consumption is reduced. And the test fixture adopts the mode that the SATA test terminal is led out by utilizing part of short cables to replace the SMP to SMA wire, so that the connection reliability is improved, the loss of the SMP to SMA wire is reduced, and the cost is reduced.

the switching module is also connected with a ground wire.

In some embodiments, the switching module is configured to disconnect from the ground line in a first state; and in the second state, is connected with the ground wire.

In some embodiments, further comprising:

According to the scheme provided by the invention, under the condition that BIOS software is not required to be changed, PCIE or SATA signals are controlled to be sent by the main board on the same test fixture, so that project stagnation is greatly reduced, and labor consumption is reduced.

The foregoing is an exemplary embodiment of the present disclosure, but it should be noted that various changes and modifications could be made herein without departing from the scope of the disclosure as defined by the appended claims. Furthermore, although elements of the disclosed embodiments may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated.

It should be understood that as used herein, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly supports the exception. It should also be understood that "and/or" as used herein is meant to include any and all possible combinations of one or more of the associated listed items.

The foregoing embodiment of the present invention has been disclosed with reference to the number of embodiments for the purpose of description only, and does not represent the advantages or disadvantages of the embodiments.

Those of ordinary skill in the art will appreciate that: the above discussion of any embodiment is merely exemplary and is not intended to imply that the scope of the disclosure of embodiments of the invention, including the claims, is limited to such examples; combinations of features of the above embodiments or in different embodiments are also possible within the idea of an embodiment of the invention, and many other variations of the different aspects of the embodiments of the invention as described above exist, which are not provided in detail for the sake of brevity. Therefore, any omission, modification, equivalent replacement, improvement, etc. of the embodiments should be included in the protection scope of the embodiments of the present invention.

Claims

1. A test fixture, its characterized in that includes:

the PCB is provided with a golden finger, wherein the PCB is connected with a slot of a device to be tested through the golden finger;

the switching module is arranged on the PCB and connected with the predetermined pin of the golden finger, and the predetermined pin of the golden finger is used for being correspondingly connected with the 69 # pin of the slot of the device to be tested;

the switching module is configured to disconnect from a ground wire in a first state, and a 69-number pin is disconnected from the ground so as to be in a high level, so that the device to be tested sends out PCIE signals; and in the second state, the 69 # pin is connected with the ground, so that the connection with the ground is recovered, the level is low, and the device to be tested sends out SATA signals.

2. The test fixture of claim 1, further comprising:

and the sliding cover is movably connected with the PCB.

3. The test fixture of claim 2, further comprising:

and the indicator lamp is connected to the switching module and used for indicating the state of the switching module.

4. The test fixture of claim 1, further comprising:

5. The test fixture of claim 1, wherein the golden finger comprises a first portion of golden finger, a second portion of golden finger, and a third portion of golden finger;

6. The test system is characterized by comprising a device to be tested with a slot and a test jig; wherein, the test fixture includes:

the switching module is configured to disconnect from a ground wire in a first state, and a 69-number pin is disconnected from the ground so as to be in a high level, so that the device to be tested sends out PCIE signals; and in the second state, the ground wire is connected with the sliding cover, and the 69 # pin is recovered to be connected with the ground so as to be in a low level, so that the device to be tested sends out SATA signals.

7. The test system of claim 6, wherein the slider is movably coupled to the PCB.

8. The test system of claim 7, further comprising:

9. The test system of claim 6, further comprising:

10. The test system of claim 6, wherein the golden fingers comprise a first portion of golden fingers, a second portion of golden fingers, and a third portion of golden fingers;