CN113325429B - Time-to-digital converter with photon time correlation detection function - Google Patents
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S17/00—Systems using the reflection or reradiation of electromagnetic waves other than radio waves, e.g. lidar systems
- G01S17/02—Systems using the reflection of electromagnetic waves other than radio waves
- G01S17/06—Systems determining position data of a target
- G01S17/08—Systems determining position data of a target for measuring distance only
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S17/00—Systems using the reflection or reradiation of electromagnetic waves other than radio waves, e.g. lidar systems
- G01S17/88—Lidar systems specially adapted for specific applications
- G01S17/93—Lidar systems specially adapted for specific applications for anti-collision purposes
- G01S17/931—Lidar systems specially adapted for specific applications for anti-collision purposes of land vehicles
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
- G01S7/48—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S17/00
- G01S7/483—Details of pulse systems
- G01S7/486—Receivers
- G01S7/4865—Time delay measurement, e.g. time-of-flight measurement, time of arrival measurement or determining the exact position of a peak
- G01S7/4866—Time delay measurement, e.g. time-of-flight measurement, time of arrival measurement or determining the exact position of a peak by fitting a model or function to the received signal
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
- G01S7/48—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S17/00
- G01S7/483—Details of pulse systems
- G01S7/486—Receivers
- G01S7/487—Extracting wanted echo signals, e.g. pulse detection
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Abstract
The invention discloses a time-to-digital converter with photon time correlation detection function, comprising: a fine count phase capturing unit for capturing the multiphase phase data provided by the clock unit according to the START pulse signal and the STOP pulse signal; a coarse count synchronizing unit for starting counting according to the START pulse signal and generating a synchronizing signal according to the STOP pulse signal; a time correlation detection unit for recording the number of SPADs triggered in the sensor array during the STOP pulse signal duration; the data buffer module is used for storing multiphase phase data, the number of SPAD triggers and the count value of the coarse counter according to the STOP pulse signal; an arithmetic logic unit performing an arithmetic operation on the data stored in the data buffer module; the main control unit is used for providing enabling signals and control commands for other units or modules; and the serial data reading circuit is used for reading the output result obtained by the arithmetic logic unit operation in a serial mode according to the control command of the main control unit.
Description
Technical Field
The invention belongs to the technical field of laser radar ranging, and particularly relates to a time-to-digital converter with a photon time correlation detection function.
Background
In recent years, a Direct Time Of Flight (DTOF) ranging method has important application in the fields Of three-dimensional imaging, unmanned driving, biomedical and the like, and the working principle is as follows: when a laser emitter emits a START laser signal START (herein, the START laser signal is named START) to impinge on a detected target object, the target object reflects an echo, and a single photon avalanche diode (Single Photon Avalanche Diode, SPAD) converts the echo into an electrical signal and generates a STOP pulse signal STOP (herein, the STOP pulse signal is named STOP). In the DTOF ranging method, digital quantization conversion of start-stop Time pulse signals is mainly completed through a Time-to-Digital Converter (TDC), so that extremely high requirements are placed on measurement accuracy, detection efficiency and the like of the Time-to-digital converter.
In the traditional ranging scheme, the TDC can only detect the time interval between one START pulse signal and one STOP pulse signal at a time, and a multi-channel TDC is introduced for detecting the intervals between a plurality of STOP pulse signals and the same START pulse signal. In the conventional multi-channel TDC, the delay from the reference clock to the channel where each STOP pulse signal is located is different, thereby generating a measurement error, which increases as the number of channels increases.
In addition, when photons emitted by the laser emitter return to the SPAD array, the single photon avalanche diode may be triggered by mistake due to factors such as noise interference, so that the TDC records the wrong time interval and directly influences the measurement result. In summary, the conventional time-to-digital converter has the problem of measurement accuracy error and even erroneous measurement, and cannot meet the actual requirement of laser ranging.
Disclosure of Invention
In order to meet the above defects or improvement demands of the prior art, the invention provides a time-to-digital converter with a photon time correlation detection function, which has the photon time correlation detection function, and greatly reduces the influence on a measurement result caused by false triggering of a single photon avalanche diode.
To achieve the above object, the present invention provides a time-to-digital converter with a photon time correlation detection function, including: the device comprises a fine count phase capture unit, a coarse count synchronization unit, a time correlation detection unit, a data buffer module, an arithmetic logic unit, a main control unit and a serial data reading circuit, wherein:
The fine counting phase capturing unit is used for capturing multiphase phase data provided by the clock unit according to the START pulse signal and the STOP pulse signal, and further storing the data into the data caching module;
the coarse counting synchronization unit is used for starting counting according to the START pulse signal, generating a synchronization signal according to the STOP pulse signal and outputting the count value of the coarse counter according to the synchronization signal;
the time correlation detection unit is used for recording the number of the triggered SPAD in the sensor array during the duration of the STOP pulse signal;
The data buffer module is used for storing the multiphase phase data, the SPAD trigger number and the count value of the coarse counter according to the STOP pulse signal, and outputting the stored multiphase phase data, the stored SPAD trigger number and the stored count value of the coarse counter according to the control of the main control unit;
The arithmetic logic unit performs arithmetic operation on the data stored in the data caching module under the control of the main control unit, converts the data into an output result and stores the output result in the data caching module;
the main control unit is used for providing enabling signals and control commands for other units or modules;
the serial data reading circuit is used for reading the output result obtained by the arithmetic logic unit through operation in a serial mode according to a control command of the main control unit.
In one embodiment of the present invention, the coarse counting synchronization unit includes a counter, a distance judgment unit and a synchronization module, the counter STARTs counting after the START pulse signal arrives, and when the STOP pulse signal arrives, the synchronization module automatically generates a synchronization signal SYNC, and the SYNC signal triggers to obtain the current counter value and stores the current counter value into the data buffer module. During the working period of the counter, the distance judging unit compares the current count value with the set distance RANGE1, when the count value reaches the set distance RANGE1, the counter is reset, and the data in the data caching module is automatically sent into the arithmetic computing unit at the later stage for subsequent computing processing.
In one embodiment of the present invention, the time correlation detection unit includes a time window generation circuit and a time correlation determination circuit.
In one embodiment of the present invention, the time window generating circuit includes an SR flip-flop, a CONTROL unit, and a delay unit, and outputs a pulse signal VALID according to a TRIGGER signal TRIGGER and a CONTROL signal CONTROL generated after the SPAD array is triggered by photons. The TRIGGER signal TRIGGER is triggered and generated by the SPAD array; the CONTROL signal CONTROL acts on the CONTROL unit to CONTROL the time length of the generated pulse signal VALID; the generation mechanism of the VALID signal is: all SPAD outputs in the SPAD array are connected in parallel, any one SPAD TRIGGERs, a TRIGGER pulse signal is generated, an SR TRIGGER is triggered, a later-stage delay unit circuit is enabled to delay and overturn, a CONTROL unit generates a pulse signal effective with a certain gating time length according to a CONTROL signal CONTROL, and the SR TRIGGER is reset after the delay is finished.
In one embodiment of the present invention, the time correlation determination circuit records the number N of SPADs triggered at this time according to the falling edge of the pulse signal VALID output by the time window generation circuit, and compares the number N with a set threshold N to implement time correlation determination.
In one embodiment of the invention, the clock unit comprises a phase locked loop PLL and a delay locked loop DLL.
In one embodiment of the present invention, the START pulse signal is a START pulse signal generated internally in the circuit or a START pulse signal generated externally in the circuit; the STOP pulse signal is a trigger pulse signal generated by the SPAD array after the emission laser is reflected back to the SPAD array by an object.
In one embodiment of the present invention, the STOP pulse signal is a TRIGGER signal TRIGGER generated after the SPAD array in the time correlation detection unit is triggered by photons, the STOP pulse signal is a plurality of pulse signals, and the data buffer module can store a plurality of groups of corresponding coarse count values, SPAD TRIGGER numbers and multiphase phase data.
In one embodiment of the present invention, the arithmetic logic unit includes a decoder, decodes the multiphase phase data in a pipeline manner, and uses the obtained result as low-order data of the output result TOF, and uses the coarse count value in the data buffer module as high-order data of the TOF.
In one embodiment of the invention, the TOF data is compared to a set measurement RANGE2 such that the output data TOF is within RANGE.
In general, compared with the prior art, the above technical solution conceived by the present invention has the following beneficial effects:
(1) The time-to-digital converter provided by the invention has a photon time correlation detection function, so that the influence on a measurement result caused by false triggering of a single photon avalanche diode is greatly reduced;
(2) After a START pulse is sent, the single time-to-digital converter provided by the invention can record the time intervals between a plurality of STOP pulses and the START pulse; in addition, the ranging range is configurable, so that the requirements of different application scenes are met;
(3) The time-to-digital converter with the photon time correlation detection function provided by the application can realize the adjustable ranging range by utilizing the units and the modules which are clear in working procedures of each part and are matched with each other efficiently, has higher processing speed and communication efficiency, has a simpler overall structure, and meets the high-integration requirement of the SPAD array.
Drawings
FIG. 1 is a block diagram of a time to digital converter according to an embodiment of the present invention;
FIG. 2 is a block diagram of a time window generating circuit in a time correlation detecting unit according to an embodiment of the present invention;
FIG. 3 is a timing diagram of signals related to a time correlation detecting unit according to an embodiment of the present invention;
FIG. 4 is a timing diagram of a time-to-digital converter signal according to an embodiment of the present invention;
The same reference numbers are used throughout the drawings to reference like elements or structures, wherein:
A fine count phase acquisition unit 101, a coarse count synchronization unit 102, a time correlation detection unit 103, a data buffer module 104, an arithmetic logic unit 105, a main control unit 106, and a serial data readout circuit 107.
Detailed Description
The present invention will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present invention more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention. In addition, the technical features of the embodiments of the present invention described below may be combined with each other as long as they do not collide with each other.
Referring to fig. 1, an embodiment of the present application discloses a time-to-digital converter with photon time correlation detection function, including: a fine count phase acquisition unit 101, a coarse count synchronization unit 102, a time correlation detection unit 103, a data buffer module 104, an arithmetic logic unit 105, a main control unit 106, and a serial data readout circuit 107. Wherein:
the fine count phase capturing unit 101 includes a high-speed Latch (Latch) group for capturing the multiphase phase data provided by the clock unit according to the START pulse signal and STOP pulse signal;
Specifically, in the present embodiment, the clock unit includes: a phase-locked loop PLL (Phase Locked Loop) and a delay-locked loop DLL (Delay Locked Loop); the PLL phase-locked loop is used to provide clock signals for other modules (including DLLs), and the DLL delay-locked loop is used to provide multiphase phase data for the time-to-digital converter;
specifically, in the present embodiment, the multiphase phase data is D <31> to D <0>, which is 32 bits in total, and further stores the data to the data buffer module 104;
the START pulse signal can be a START pulse signal generated inside the circuit or a START pulse signal generated outside the circuit;
the STOP pulse signal is a trigger pulse signal generated by the SPAD array after the emission laser is reflected back to the SPAD array by an object;
Specifically, the fine count phase acquisition unit 101 includes a high-speed Latch (Latch group, which latches the multiphase phase data supplied from the clock unit into the Latch group according to the START pulse signal or STOP pulse signal, and further stores the data into the data buffer module;
the coarse count synchronization unit 102 is configured to START counting according to the START pulse signal, generate a synchronization signal according to the STOP pulse signal, and output a count value of a coarse counter according to the synchronization signal;
In this embodiment, the counter is triggered to flip by the rising edge of the counting clock, after the STOP pulse signal arrives, the counter is flipped, the count value is incremented by one, and a synchronization signal is generated at the falling edge of the counting period, so as to output the count value of the current coarse counter at this moment, and further store the data into the data buffer module 104. The count clock is the lowest bit of the multiphase phase data, D <0>, and in this embodiment, has a frequency of 500Mhz.
The time correlation detection unit 103 is configured to record the number of SPADs triggered in the sensor array during the STOP pulse signal duration, and further store data into the data buffer module 104.
The data buffer module 104 is configured to store the multiphase phase data, the SPAD trigger number, and the count value of the coarse counter according to the STOP pulse signal, and output the stored multiphase phase data, SPAD trigger number, and the count value of the coarse counter according to control of the main control unit;
the main control unit 105 is configured to provide an enable signal and a control command for other units or modules;
The arithmetic logic unit 106 is configured to perform an arithmetic operation on the data stored in the data buffer module 104 under the control of the main control unit 105, convert the data into an output result TOF, and store the output result TOF in the data buffer module 104;
In this embodiment, the arithmetic logic unit 106 includes a decoder for decoding multiphase phase data D <31> to D <0> in a pipeline manner, the obtained result is used as low-bit data of the output result TOF, and the coarse count value in the data buffer module 104 is used as high-bit data of the TOF. Optionally, in this embodiment, five levels of decoding are performed on the multiphase phase data D <16> to D <1>, so that the decoding error rate is reduced to a certain extent, and the size of the data buffer is reduced, in this embodiment, the data buffer module only needs to store 16 bits of phase data after each START or STOP pulse signal arrives; alternatively, the arithmetic logic unit 106 may compare the TOF data with the set measurement RANGE such that the output data TOF is within RANGE.
The serial data readout circuit 107 is configured to serially read out an output result obtained by the arithmetic logic unit 106 according to a control command of the main control unit 105.
Specifically, the coarse counting synchronization unit 102 includes a counter, a distance judgment unit, and a synchronization module, after the START pulse signal arrives, the counter STARTs counting, when the STOP pulse signal arrives, the synchronization module automatically generates a synchronization signal SYNC, and the SYNC signal triggers to obtain a current counter value and stores the current counter value into the data buffer module. During the working period of the counter, the distance judging unit compares the current count value with the set distance RANGE1, when the count value reaches the set distance RANGE1, the counter is reset, and the data in the data caching module is automatically sent into the arithmetic computing unit at the later stage for subsequent computing processing.
Specifically, the time correlation detection unit 103 includes a time window generating circuit and a time correlation judging circuit, where a specific structure diagram of the time window generating circuit is shown in fig. 2, and includes an SR flip-flop, a CONTROL unit, and a delay unit, and outputs a pulse signal VALID according to a TRIGGER signal TRIGGER and a CONTROL signal CONTROL generated after the SPAD array is triggered by photons. The TRIGGER signal TRIGGER is triggered and generated by the SPAD array; the CONTROL signal CONTROL is used to CONTROL the length of time of the generated pulse signal VALID.
Specifically, the generation mechanism of the VALID signal is as shown in fig. 3: all SPAD outputs in the SPAD array are connected in parallel, at the moment T1, any one SPAD TRIGGERs after photon reflection reaches the array to generate a TRIGGER pulse signal, simultaneously TRIGGERs an SR TRIGGER, delays and overturns a post-stage delay unit circuit to generate a pulse signal VALID with a certain gating time length; at the time of T2, after the delay is finished, the SR trigger is reset, and the VALID signal becomes low level; at time T3, the TRIGGER signal resets, resetting all SPADs simultaneously for the next TRIGGER.
The time correlation judging circuit records the number N of the SPAD triggered at this time according to the falling edge of the pulse signal effective output by the time window generating circuit, compares the number N with a correlation threshold value N, realizes time correlation judgment, and can configure the correlation threshold value to meet different working scene requirements. The VALID signal is used as a monostable trigger signal, which is close to the pulse time of the laser emission signal in time, and in fig. 3, the number of SPADs triggered at this time is 4. In a specific embodiment, if the threshold n is set to 8, the number of SPADs triggered at this time is smaller than the threshold 8, and the result of the measurement is determined to be invalid data, and the subsequent statistics module, such as histogram statistics, is not counted.
Specifically, the STOP pulse signal is a TRIGGER signal TRIGGER generated after the SPAD array in the time correlation detection unit is triggered by photons, the STOP pulse signal can be 1-3 pulse signals, and the data buffer module can store 1-3 groups of corresponding coarse count values, SPAD TRIGGER numbers and multiphase phase data.
Specifically, the arithmetic logic unit 106 includes a decoder, decodes multiphase phase data in a pipeline manner, and uses the obtained result as low-bit data of the output result TOF, and uses the coarse count value in the data buffer module as high-bit data of the TOF. Optionally, the TOF data is compared with a set measurement RANGE2, such that the output data TOF is within RANGE.
Further, a signal timing diagram of the time-to-digital converter disclosed in the embodiment of the invention in a single measurement process is shown in fig. 4. At time T1, a START pulse signal arrives, and the precise count phase capturing unit 101 captures multiphase clock data DLL phase at the time, which is denoted by START PHASE; the coarse count synchronization unit 102 starts counting; at time T2, the first STOP pulse signal arrives, and the precise count phase capture unit 101 captures multiphase clock data DLL phase at the time, denoted as STOP phase1; the coarse count synchronization unit 102 captures the first coarse count value as 20 at time T3, and saves the Stop phase1 and the coarse count value to the data buffer module 104.
In this embodiment, the STOP channel can be used to receive multiple STOP pulses without using a multi-channel TDC or multiple TDCs; as a specific example, the STOP channel may receive a first STOP pulse signal, a second STOP pulse signal, and a third STOP pulse signal. Thus, in fig. 4, at time T4, the second STOP pulse signal arrives, and the fine count phase acquisition means 101 acquires the multiphase clock data DLL phase at that time, denoted as STOP phase2; the coarse count synchronization unit 102 captures a second coarse count value of 26 at time T5, and stores the Stop phase2 and the coarse count value in the data cache module 104; at time T6, the third STOP pulse signal arrives, and the precise count phase capturing unit 101 captures multiphase clock data DLL phase at the time, denoted as STOP phase3; the coarse count synchronization unit 102 captures the third coarse count value as 32 at time T7, and saves the Stop phase3 and the coarse count value to the data buffer module 104.
When the count value of the coarse count synchronization unit 102 reaches the set ranging range, the data buffer module 104 sends the stored data into the arithmetic logic unit 105 under the control of the main control module 106, and performs subsequent arithmetic computation automatically, including decoding the multiphase clock data, taking the decoded data as low-order data of the output value TOF, taking the corresponding coarse count value as high-order data, further taking the corresponding data of the first STOP pulse signal as an example, comparing the data decoded by the STOP phase1 with the data decoded by START PHASE, and judging whether the corresponding first coarse count value needs to be subjected to 1 reduction processing to obtain the first output value TOF1; accordingly, the second output value TOF2 and the third output value TOF3 can be obtained.
It will be readily appreciated by those skilled in the art that the foregoing description is merely a preferred embodiment of the invention and is not intended to limit the invention, but any modifications, equivalents, improvements or alternatives falling within the spirit and principles of the invention are intended to be included within the scope of the invention.
Claims (7)
1. A time-to-digital converter with photon time correlation detection function, comprising: the device comprises a fine count phase capture unit, a coarse count synchronization unit, a time correlation detection unit, a data buffer module, an arithmetic logic unit, a main control unit and a serial data reading circuit, wherein:
The fine counting phase capturing unit is used for capturing multiphase phase data provided by the clock unit according to the START pulse signal and the STOP pulse signal, and further storing the data into the data caching module;
the coarse counting synchronization unit is used for starting counting according to the START pulse signal, generating a synchronization signal according to the STOP pulse signal and outputting the count value of the coarse counter according to the synchronization signal;
The time correlation detection unit is used for recording the number of the triggered SPAD in the sensor array during the duration of the STOP pulse signal; the time correlation detection unit comprises a time window generation circuit and a time correlation judgment circuit; the time window generating circuit comprises an SR TRIGGER, a CONTROL unit and a delay unit, and outputs a pulse signal VALID according to a TRIGGER signal TRIGGER and a CONTROL signal CONTROL generated after the SPAD array is triggered by photons; the TRIGGER signal TRIGGER is triggered and generated by the SPAD array; the CONTROL signal CONTROL acts on the CONTROL unit to CONTROL the time length of the generated pulse signal VALID; the generation mechanism of the VALID signal is: all SPAD outputs in the SPAD array are connected in parallel, any one SPAD TRIGGERs, a TRIGGER pulse signal is generated, an SR TRIGGER is triggered, a later-stage delay unit circuit is enabled to delay and overturn, a CONTROL unit generates a pulse signal effective with a certain gating time length according to a CONTROL signal CONTROL, and the SR TRIGGER is reset after the delay is finished; the time correlation judging circuit records the number N of the SPAD triggered at this time according to the falling edge of the pulse signal effective output by the time window generating circuit, and compares the number N with a set threshold value N to realize time correlation judgment;
The data buffer module is used for storing the multiphase phase data, the SPAD trigger number and the count value of the coarse counter according to the STOP pulse signal, and outputting the stored multiphase phase data, the stored SPAD trigger number and the stored count value of the coarse counter according to the control of the main control unit;
The arithmetic logic unit performs arithmetic operation on the data stored in the data caching module under the control of the main control unit, converts the data into an output result and stores the output result in the data caching module;
the main control unit is used for providing enabling signals and control commands for other units or modules;
the serial data reading circuit is used for reading the output result obtained by the arithmetic logic unit through operation in a serial mode according to a control command of the main control unit.
2. The time-to-digital converter with photon time correlation detection function as claimed in claim 1, wherein the coarse count synchronization unit comprises a counter, a distance judgment unit and a synchronization module, wherein after a START pulse signal arrives, the counter STARTs counting, and when the STOP pulse signal arrives, the synchronization module automatically generates a synchronization signal SYNC, and the SYNC signal triggers to obtain a current counter value and stores the current counter value into the data buffer module; during the working period of the counter, the distance judging unit compares the current count value with the set distance RANGE1, when the count value reaches the set distance RANGE1, the counter is reset, and the data in the data caching module is automatically sent into the arithmetic computing unit at the later stage for subsequent computing processing.
3. A time-to-digital converter with photon time correlation detection function as claimed in claim 1 or 2 wherein the clock unit comprises a phase-locked loop PLL and a delay-locked loop DLL.
4. A time-to-digital converter with a photon time correlation detection function as claimed in claim 1 or 2, wherein the START pulse signal is a START pulse signal generated internally of a circuit or a START pulse signal generated externally of a circuit; the STOP pulse signal is a trigger pulse signal generated by the SPAD array after the emission laser is reflected back to the SPAD array by an object.
5. The time-to-digital converter with photon time correlation detection function according to claim 1 or 2, wherein the STOP pulse signal is a TRIGGER signal TRIGGER generated after the SPAD array in the time correlation detection unit is triggered by photons, the STOP pulse signal is a plurality of pulse signals, and the data buffer module is capable of storing a plurality of groups of corresponding coarse count values, SPAD TRIGGER numbers and multiphase phase data.
6. A time-to-digital converter with photon time correlation detection function as claimed in claim 1 or 2, wherein the arithmetic logic unit comprises a decoder for decoding multiphase phase data in a pipeline manner, the obtained result is used as low-order data of output result TOF, and the coarse count value in the data buffer module is used as high-order data of TOF.
7. A time-to-digital converter with photon time correlation detection as claimed in claim 6 wherein the TOF data is compared with a set measurement RANGE2 such that the output data TOF is within RANGE.
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| CN118713632A (en) * | 2024-08-28 | 2024-09-27 | 杭州宇称电子技术有限公司 | Time domain correlation detection circuit with high timing precision, control method and application thereof |
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